| /external/llvm-project/lld/ELF/Arch/ |
| D | RISCV.cpp | 280 uint16_t imm5 = extractBits(val, 5, 5) << 2; in relocate() local
298 uint16_t imm5 = extractBits(val, 5, 5) << 2; in relocate() local
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| /external/llvm-project/lldb/source/Plugins/Process/Utility/ |
| D | ARMUtils.h | 24 static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, in DecodeImmShift()
68 const uint32_t imm5) { in DecodeImmShift()
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| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 2208 void Assembler::index(const ZRegister& zd, const Register& rn, int imm5) { in index()
2220 void Assembler::index(const ZRegister& zd, int imm5, const Register& rm) { in index()
2795 int imm5) { in cmpeq()
2810 int imm5) { in cmpge()
2825 int imm5) { in cmpgt()
2840 int imm5) { in cmple()
2855 int imm5) { in cmplt()
2870 int imm5) { in cmpne()
4251 int imm5) { in ldff1b()
4284 int imm5) { in ldff1d()
[all …]
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| D | macro-assembler-aarch64.h | 3741 int imm5; in Cmpeq() local
3762 int imm5; in Cmpge() local
3783 int imm5; in Cmpgt() local
3843 int imm5; in Cmple() local
3902 int imm5; in Cmplt() local
3923 int imm5; in Cmpne() local
5044 int imm5) { in Ldff1b()
5060 int imm5) { in Ldff1d()
5076 int imm5) { in Ldff1h()
5092 int imm5) { in Ldff1sb()
[all …]
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| D | assembler-aarch64.h | 6158 static Instr ImmPrefetchOperation(int imm5) { in ImmPrefetchOperation()
6475 int imm5 = (index << (s + 1)) | (1 << s); in ImmNEON5() local
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| D | simulator-aarch64.cc | 5883 int imm5 = instr->GetImmNEON5(); in VisitNEONCopy() local
6944 int imm5 = instr->GetImmNEON5(); in VisitNEONScalarCopy() local
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| D | disasm-aarch64.cc | 10221 unsigned imm5 = instr->GetImmNEON5(); in SubstituteImmediateField() local
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| /external/llvm-project/lldb/source/Plugins/Instruction/MIPS/ |
| D | EmulateInstructionMIPS.cpp | 1502 uint32_t imm5 = insn.getOperand(2).getImm(); in Emulate_SWSP() local
1646 uint32_t imm5 = insn.getOperand(2).getImm(); in Emulate_LWSP() local
1752 int32_t imm5 = insn.getOperand(0).getImm(); in Emulate_JRADDIUSP() local
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| /external/skia/src/core/ |
| D | SkVM.cpp | 2175 void Assembler::sli4s(V d, V n, int imm5) { in sli4s()
2178 void Assembler::shl4s(V d, V n, int imm5) { in shl4s()
2181 void Assembler::sshr4s(V d, V n, int imm5) { in sshr4s()
2184 void Assembler::ushr4s(V d, V n, int imm5) { in ushr4s()
2297 int imm5 = (lane << 3) | 0b100; in movs() local
2301 int imm5 = (lane << 3) | 0b100; in inss() local
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| /external/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| D | EmulateInstructionARM.cpp | 3761 uint32_t imm5; // encoding for the shift amount in EmulateShiftImm() local
5389 uint32_t imm5 = Bits32(opcode, 11, 7); in EmulateSTRRegister() local
6581 uint32_t imm5 = Bits32(opcode, 11, 7); in EmulateLDRRegister() local
7005 uint32_t imm5 = Bits32(opcode, 11, 7); in EmulateLDRBRegister() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 335 IOffsetT imm5) { in encodeShiftRotateImm5()
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