1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include "ixheaacd_type_def.h"
21 #include "ixheaacd_sbr_common.h"
22 #include "ixheaacd_bitbuffer.h"
23 #include "ixheaacd_defines.h"
24 #include "ixheaacd_aac_rom.h"
25
26 #include "ixheaacd_sbrdecsettings.h"
27 #include "ixheaacd_env_extr_part.h"
28 #include "ixheaacd_sbr_rom.h"
29
30 #include "ixheaacd_common_rom.h"
31 #include "ixheaacd_pulsedata.h"
32
33 #include "ixheaacd_pns.h"
34 #include "ixheaacd_drc_data_struct.h"
35
36 #include "ixheaacd_lt_predict.h"
37
38 #include "ixheaacd_channelinfo.h"
39 #include "ixheaacd_drc_dec.h"
40 #include "ixheaacd_sbrdecoder.h"
41
42 #include "ixheaacd_channel.h"
43
44 #include "ixheaacd_audioobjtypes.h"
45 #include "ixheaacd_memory_standards.h"
46 #include "ixheaacd_adts.h"
47 #include "ixheaacd_audioobjtypes.h"
48 #include "ixheaacd_latmdemux.h"
49 #include "ixheaacd_aacdec.h"
50
51 #include "ixheaacd_mps_polyphase.h"
52 #include "ixheaacd_config.h"
53 #include "ixheaacd_mps_dec.h"
54
55 #include "ixheaacd_struct_def.h"
56 #include "ixheaacd_error_codes.h"
57
58 #include "ixheaacd_adts_crc_check.h"
59
ixheaacd_adts_crc_open(ia_adts_crc_info_struct * ptr_adts_crc_info)60 VOID ixheaacd_adts_crc_open(ia_adts_crc_info_struct *ptr_adts_crc_info) {
61 WORD32 i, j;
62 UWORD16 val;
63
64 ptr_adts_crc_info->no_reg = 0;
65 ptr_adts_crc_info->crc_active = 0;
66
67 for (i = 0; i <= 255; ++i) {
68 for (val = i << 8, j = 8; --j >= 0;) {
69 val = (val & 0x8000) ? (val << 1) ^ 0x8005 : val << 1;
70 }
71
72 ptr_adts_crc_info->crc_lookup[i] = val;
73 }
74 }
75
ixheaacd_copy_bit_buf_state(ia_bit_buf_struct * it_bit_buff_src,ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst)76 VOID ixheaacd_copy_bit_buf_state(
77 ia_bit_buf_struct *it_bit_buff_src,
78 ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst) {
79 it_crc_bit_buff_dst->ptr_bit_buf_base = it_bit_buff_src->ptr_bit_buf_base;
80 it_crc_bit_buff_dst->ptr_bit_buf_end = it_bit_buff_src->ptr_bit_buf_end;
81 it_crc_bit_buff_dst->ptr_read_next = it_bit_buff_src->ptr_read_next;
82 it_crc_bit_buff_dst->bit_pos = it_bit_buff_src->bit_pos;
83 it_crc_bit_buff_dst->cnt_bits = it_bit_buff_src->cnt_bits;
84 it_crc_bit_buff_dst->size = it_bit_buff_src->size;
85 }
86
ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct * ptr_adts_crc_info,ia_bit_buf_struct * it_bit_buff_src,WORD32 no_bits)87 WORD32 ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
88 ia_bit_buf_struct *it_bit_buff_src,
89 WORD32 no_bits) {
90 UWORD32 no_bytes;
91
92 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].bit_cnt = 0;
93 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].max_bits =
94 no_bits;
95
96 if (no_bits < 0) {
97 no_bits = -no_bits;
98 }
99
100 if (no_bits == 0) {
101 no_bits = 16 << 3;
102 }
103
104 no_bytes = no_bits >> 3;
105
106 if (no_bytes << 3 < (UWORD32)no_bits) {
107 no_bytes++;
108 }
109
110 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].buf_size =
111 no_bytes;
112 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].active = 1;
113
114 ixheaacd_copy_bit_buf_state(
115 it_bit_buff_src,
116 &(ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg]
117 .str_bit_buf));
118
119 ptr_adts_crc_info->no_reg += 1;
120
121 return (ptr_adts_crc_info->no_reg - 1);
122 }
123
ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct * ptr_adts_crc_info,ia_bit_buf_struct * it_bit_buff_src,WORD32 reg)124 VOID ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
125 ia_bit_buf_struct *it_bit_buff_src, WORD32 reg) {
126 ptr_adts_crc_info->str_crc_reg_data[reg].active = 0;
127 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt =
128 ptr_adts_crc_info->str_crc_reg_data[reg].str_bit_buf.cnt_bits -
129 it_bit_buff_src->cnt_bits;
130 }
131
ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct * ptr_adts_crc_info,UWORD16 * crc_reg,UWORD8 feed)132 VOID ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct *ptr_adts_crc_info,
133 UWORD16 *crc_reg, UWORD8 feed) {
134 *crc_reg =
135 (*crc_reg << 8) ^ ptr_adts_crc_info->crc_lookup[(*crc_reg >> 8) ^ feed];
136 }
137
ixheaacd_adts_crc_slow_crc(UWORD16 * crc_reg,UWORD8 feed,UWORD32 no_bits)138 VOID ixheaacd_adts_crc_slow_crc(UWORD16 *crc_reg, UWORD8 feed,
139 UWORD32 no_bits) {
140 UWORD32 i;
141 UWORD16 tmp;
142 for (i = 0; i < no_bits; i++) {
143 tmp = (feed & (1 << (7 - i))) >> (7 - i);
144 tmp ^= (*crc_reg & (1 << 15)) >> 15;
145 tmp *= 32773;
146 *crc_reg <<= 1;
147 *crc_reg ^= tmp;
148 }
149 }
150
ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct * ptr_adts_crc_info)151 WORD32 ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct *ptr_adts_crc_info) {
152 WORD32 error_code = AAC_DEC_OK;
153 UWORD16 crc = 65535;
154 WORD32 reg;
155 ia_crc_reg_data_struct *ptr_reg_data;
156
157 for (reg = 0; reg < ptr_adts_crc_info->no_reg; reg++) {
158 UWORD8 bits;
159 UWORD32 bits_remaining;
160
161 ptr_reg_data = &ptr_adts_crc_info->str_crc_reg_data[reg];
162
163 if (ptr_reg_data->max_bits > 0) {
164 if (ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt >
165 ptr_reg_data->max_bits)
166 bits_remaining = ptr_reg_data->max_bits;
167 else
168 bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
169 } else {
170 bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
171 }
172
173 while (bits_remaining >= 8) {
174 bits = (UWORD8)ixheaacd_read_bits_buf(
175 (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
176 .str_bit_buf),
177 8);
178 ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, bits);
179 bits_remaining -= 8;
180 }
181
182 bits = (UWORD8)ixheaacd_read_bits_buf(
183 (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
184 .str_bit_buf),
185 bits_remaining);
186 ixheaacd_adts_crc_slow_crc(&crc, (UWORD8)(bits << (8 - bits_remaining)),
187 bits_remaining);
188
189 if (ptr_reg_data->max_bits >
190 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt) {
191 bits_remaining = ptr_reg_data->max_bits -
192 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
193
194 for (; bits_remaining >= 8; bits_remaining -= 8) {
195 ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, 0);
196 }
197
198 ixheaacd_adts_crc_slow_crc(&crc, 0, bits_remaining);
199 }
200 }
201
202 ptr_adts_crc_info->no_reg = 0;
203
204 if (crc != ptr_adts_crc_info->file_value) {
205 return (IA_ENHAACPLUS_DEC_EXE_NONFATAL_ADTS_HDR_CRC_FAIL);
206 }
207
208 return (error_code);
209 }
210