1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <string.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <assert.h>
24
25 #include "ixheaacd_type_def.h"
26
27 #include "ixheaacd_bitbuffer.h"
28
29 #include "ixheaacd_defines.h"
30 #include "ixheaacd_memory_standards.h"
31 #include "ixheaacd_sbrdecsettings.h"
32 #include "ixheaacd_env_extr_part.h"
33 #include "ixheaacd_aac_rom.h"
34 #include "ixheaacd_common_rom.h"
35 #include "ixheaacd_sbr_rom.h"
36 #include "ixheaacd_pulsedata.h"
37 #include "ixheaacd_pns.h"
38
39 #include "ixheaacd_sbr_common.h"
40 #include "ixheaacd_drc_data_struct.h"
41 #include "ixheaacd_drc_dec.h"
42
43 #include "ixheaacd_lt_predict.h"
44
45 #include "ixheaacd_channelinfo.h"
46 #include "ixheaacd_channel.h"
47 #include "ixheaacd_channelinfo.h"
48 #include "ixheaacd_sbrdecoder.h"
49 #include "ixheaacd_audioobjtypes.h"
50 #include "ixheaacd_latmdemux.h"
51 #include "ixheaacd_aacdec.h"
52 #include "ixheaacd_sbr_common.h"
53
54 #include "ixheaacd_mps_polyphase.h"
55 #include "ixheaacd_config.h"
56 #include "ixheaacd_mps_dec.h"
57
58 #include "ixheaacd_struct_def.h"
59
60 #include "ixheaacd_config.h"
61 #include "ixheaacd_interface.h"
62 #include "ixheaacd_info.h"
63 #include "ixheaacd_struct.h"
64 #include "ixheaacd_constants.h"
65 #include "ixheaacd_error_standards.h"
66
67 #include "ixheaacd_error_codes.h"
68
69 static const WORD32 sampling_rate_tbl[] = {
70 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025,
71 8000, 7350, 0, 0, 57600, 51200, 40000, 38400, 34150, 28800, 25600,
72 20000, 19200, 17075, 14400, 12800, 9600, 0, 0, 0};
73
ixheaacd_sbr_ratio(UWORD32 core_sbr_framelength_idx)74 UWORD32 ixheaacd_sbr_ratio(UWORD32 core_sbr_framelength_idx) {
75 UWORD32 sbr_ratio_index = 0x0FF;
76
77 switch (core_sbr_framelength_idx) {
78 case 0:
79 case 1:
80 sbr_ratio_index = USAC_SBR_RATIO_NO_SBR;
81 break;
82 case 2:
83 sbr_ratio_index = USAC_SBR_RATIO_INDEX_8_3;
84 break;
85 case 3:
86 sbr_ratio_index = USAC_SBR_RATIO_INDEX_2_1;
87 break;
88 case 4:
89 sbr_ratio_index = USAC_SBR_RATIO_INDEX_4_1;
90 break;
91 }
92
93 return sbr_ratio_index;
94 }
95
ixheaacd_get_sample_freq_indx(WORD32 sampling_freq)96 static WORD32 ixheaacd_get_sample_freq_indx(WORD32 sampling_freq) {
97 WORD32 index;
98 const WORD32 tbl_size = sizeof(sampling_rate_tbl) / sizeof(WORD32) - 1;
99
100 for (index = 0; index < tbl_size; index++) {
101 if (sampling_rate_tbl[index] == sampling_freq) break;
102 }
103 return index;
104 }
ixheaacd_sbr_params(UWORD32 core_sbr_framelength_idx,WORD32 * output_framelength,WORD32 * block_size,WORD32 * output_samples,WORD32 * sample_rate_layer,UWORD32 * sample_freq_indx)105 UWORD32 ixheaacd_sbr_params(UWORD32 core_sbr_framelength_idx,
106 WORD32 *output_framelength, WORD32 *block_size,
107 WORD32 *output_samples, WORD32 *sample_rate_layer,
108 UWORD32 *sample_freq_indx) {
109 UWORD32 sbr_ratio_index = 0x0FF;
110
111 *output_framelength = -1;
112
113 switch (core_sbr_framelength_idx) {
114 case 0:
115 sbr_ratio_index = USAC_SBR_RATIO_NO_SBR;
116 *output_framelength = USAC_OUT_FRAMELENGTH_768;
117 *block_size = 768;
118 *output_samples = *block_size;
119 break;
120 case 1:
121 sbr_ratio_index = USAC_SBR_RATIO_NO_SBR;
122 *output_framelength = USAC_OUT_FRAMELENGTH_1024;
123 *block_size = 1024;
124 *output_samples = *block_size;
125 break;
126 case 2:
127 sbr_ratio_index = USAC_SBR_RATIO_INDEX_8_3;
128 *output_framelength = USAC_OUT_FRAMELENGTH_2048;
129 *block_size = 768;
130 *output_samples = (*block_size * 8) / 3;
131 *sample_rate_layer = (*sample_rate_layer * 3) >> 3;
132 break;
133 case 3:
134 sbr_ratio_index = USAC_SBR_RATIO_INDEX_2_1;
135 *output_framelength = USAC_OUT_FRAMELENGTH_2048;
136 *block_size = 1024;
137 *output_samples = *block_size * 2;
138 *sample_rate_layer = *sample_rate_layer >> 1;
139 break;
140 case 4:
141 sbr_ratio_index = USAC_SBR_RATIO_INDEX_4_1;
142 *output_framelength = USAC_OUT_FRAMELENGTH_4096;
143 *block_size = 1024;
144 *output_samples = *block_size * 4;
145 *sample_rate_layer = *sample_rate_layer >> 2;
146 break;
147 }
148
149 *sample_freq_indx = ixheaacd_get_sample_freq_indx(*sample_rate_layer);
150
151 return sbr_ratio_index;
152 }
153
ixheaacd_read_escape_value(ia_bit_buf_struct * it_bit_buff,UWORD32 * ext_ele_value,UWORD32 no_bits1,UWORD32 no_bits2,UWORD32 no_bits3)154 VOID ixheaacd_read_escape_value(ia_bit_buf_struct *it_bit_buff,
155 UWORD32 *ext_ele_value, UWORD32 no_bits1,
156 UWORD32 no_bits2, UWORD32 no_bits3) {
157 UWORD32 value = 0;
158 UWORD32 val_add = 0;
159 UWORD32 max_val1 = (1 << no_bits1) - 1;
160 UWORD32 max_val2 = (1 << no_bits2) - 1;
161
162 value = ixheaacd_read_bits_buf(it_bit_buff, no_bits1);
163
164 if (value == max_val1) {
165 val_add = ixheaacd_read_bits_buf(it_bit_buff, no_bits2);
166
167 value += val_add;
168
169 if (val_add == max_val2) {
170 val_add = ixheaacd_read_bits_buf(it_bit_buff, no_bits3);
171
172 value += val_add;
173 }
174 }
175
176 *ext_ele_value = value;
177 }
178
ixheaacd_get_usac_chan_conf(ia_usac_config_struct * pstr_usac_config,UWORD32 ch_config_index)179 static VOID ixheaacd_get_usac_chan_conf(ia_usac_config_struct *pstr_usac_config,
180 UWORD32 ch_config_index) {
181 switch (ch_config_index) {
182 case 1:
183 pstr_usac_config->num_out_channels = 1;
184 pstr_usac_config->output_channel_pos[0] = BS_OUTPUT_CHANNEL_POS_C;
185 break;
186 case 2:
187 pstr_usac_config->num_out_channels = 2;
188 pstr_usac_config->output_channel_pos[0] = BS_OUTPUT_CHANNEL_POS_L;
189 pstr_usac_config->output_channel_pos[1] = BS_OUTPUT_CHANNEL_POS_R;
190 break;
191 case 8:
192 pstr_usac_config->num_out_channels = 2;
193 pstr_usac_config->output_channel_pos[0] = BS_OUTPUT_CHANNEL_POS_NA;
194 pstr_usac_config->output_channel_pos[1] = BS_OUTPUT_CHANNEL_POS_NA;
195 break;
196
197 default:
198 assert(0);
199 break;
200 }
201 }
202
ixheaacd_sbr_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_sbr_config_struct * pstr_usac_sbr_config)203 VOID ixheaacd_sbr_config(ia_bit_buf_struct *it_bit_buff,
204 ia_usac_dec_sbr_config_struct *pstr_usac_sbr_config) {
205 pstr_usac_sbr_config->harmonic_sbr = ixheaacd_read_bits_buf(it_bit_buff, 1);
206 pstr_usac_sbr_config->bs_inter_tes = ixheaacd_read_bits_buf(it_bit_buff, 1);
207 pstr_usac_sbr_config->bs_pvc = ixheaacd_read_bits_buf(it_bit_buff, 1);
208 pstr_usac_sbr_config->dflt_start_freq =
209 ixheaacd_read_bits_buf(it_bit_buff, 4);
210
211 pstr_usac_sbr_config->dflt_stop_freq = ixheaacd_read_bits_buf(it_bit_buff, 4);
212 pstr_usac_sbr_config->dflt_header_extra1 =
213 ixheaacd_read_bits_buf(it_bit_buff, 1);
214 pstr_usac_sbr_config->dflt_header_extra2 =
215 ixheaacd_read_bits_buf(it_bit_buff, 1);
216
217 if (pstr_usac_sbr_config->dflt_header_extra1) {
218 pstr_usac_sbr_config->dflt_freq_scale =
219 ixheaacd_read_bits_buf(it_bit_buff, 2);
220 pstr_usac_sbr_config->dflt_alter_scale =
221 ixheaacd_read_bits_buf(it_bit_buff, 1);
222 pstr_usac_sbr_config->dflt_noise_bands =
223 ixheaacd_read_bits_buf(it_bit_buff, 2);
224 }
225
226 if (pstr_usac_sbr_config->dflt_header_extra2) {
227 pstr_usac_sbr_config->dflt_limiter_bands =
228 ixheaacd_read_bits_buf(it_bit_buff, 2);
229 pstr_usac_sbr_config->dflt_limiter_gains =
230 ixheaacd_read_bits_buf(it_bit_buff, 2);
231 pstr_usac_sbr_config->dflt_interpol_freq =
232 ixheaacd_read_bits_buf(it_bit_buff, 1);
233 pstr_usac_sbr_config->dflt_smoothing_mode =
234 ixheaacd_read_bits_buf(it_bit_buff, 1);
235 }
236 }
237
ixheaacd_ext_element_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_element_config_struct * pstr_usac_element_config,UWORD8 * ptr_usac_ext_ele_payload,WORD32 * ptr_usac_ext_ele_payload_len,WORD32 * preroll_flag)238 WORD32 ixheaacd_ext_element_config(
239 ia_bit_buf_struct *it_bit_buff,
240 ia_usac_dec_element_config_struct *pstr_usac_element_config,
241 UWORD8 *ptr_usac_ext_ele_payload, WORD32 *ptr_usac_ext_ele_payload_len,
242 WORD32 *preroll_flag) {
243 UWORD32 usac_ext_element_type, usac_ext_element_config_length, flag;
244
245 UWORD32 i;
246
247 ixheaacd_read_escape_value(it_bit_buff, &(usac_ext_element_type), 4, 8, 16);
248
249 ixheaacd_read_escape_value(it_bit_buff, &(usac_ext_element_config_length), 4,
250 8, 16);
251 if (usac_ext_element_config_length >= 768) return -1;
252
253 flag = ixheaacd_read_bits_buf(it_bit_buff, 1);
254
255 *ptr_usac_ext_ele_payload_len = 0;
256
257 if (flag) {
258 ixheaacd_read_escape_value(
259 it_bit_buff,
260 (UWORD32 *)(&(pstr_usac_element_config->usac_ext_eleme_def_len)), 8, 16,
261 0);
262 pstr_usac_element_config->usac_ext_eleme_def_len += 1;
263
264 } else {
265 pstr_usac_element_config->usac_ext_eleme_def_len = 0;
266 }
267
268 pstr_usac_element_config->usac_ext_elem_pld_frag =
269 ixheaacd_read_bits_buf(it_bit_buff, 1);
270
271 switch (usac_ext_element_type) {
272 case ID_EXT_ELE_FILL:
273 break;
274 case ID_EXT_ELE_AUDIOPREROLL:
275 *preroll_flag = 1;
276 break;
277 case ID_EXT_ELE_UNI_DRC:
278 for (i = 0; i < usac_ext_element_config_length; i++) {
279 ptr_usac_ext_ele_payload[i] = ixheaacd_read_bits_buf(it_bit_buff, 8);
280 }
281 *ptr_usac_ext_ele_payload_len = usac_ext_element_config_length;
282 break;
283
284 default:
285 if ((it_bit_buff->cnt_bits >> 3) < (WORD32)usac_ext_element_config_length)
286 return -1;
287 it_bit_buff->ptr_read_next += usac_ext_element_config_length;
288 it_bit_buff->cnt_bits -= (usac_ext_element_config_length << 3);
289
290 break;
291 }
292
293 return 0;
294 }
295
ixheaacd_mps212_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_mps_config_struct * pstr_usac_mps212_config,WORD32 stereo_config_index)296 IA_ERRORCODE ixheaacd_mps212_config(
297 ia_bit_buf_struct *it_bit_buff,
298 ia_usac_dec_mps_config_struct *pstr_usac_mps212_config,
299 WORD32 stereo_config_index) {
300 pstr_usac_mps212_config->bs_freq_res = ixheaacd_read_bits_buf(it_bit_buff, 3);
301
302 pstr_usac_mps212_config->bs_fixed_gain_dmx =
303 ixheaacd_read_bits_buf(it_bit_buff, 3);
304
305 pstr_usac_mps212_config->bs_temp_shape_config =
306 ixheaacd_read_bits_buf(it_bit_buff, 2);
307
308 pstr_usac_mps212_config->bs_decorr_config =
309 ixheaacd_read_bits_buf(it_bit_buff, 2);
310 if (pstr_usac_mps212_config->bs_decorr_config > MAX_DECOR_CONFIG_IDX)
311 return IA_FATAL_ERROR;
312
313 pstr_usac_mps212_config->bs_high_rate_mode =
314 ixheaacd_read_bits_buf(it_bit_buff, 1);
315
316 pstr_usac_mps212_config->bs_phase_coding =
317 ixheaacd_read_bits_buf(it_bit_buff, 1);
318
319 pstr_usac_mps212_config->bs_ott_bands_phase_present =
320 ixheaacd_read_bits_buf(it_bit_buff, 1);
321
322 if (pstr_usac_mps212_config->bs_ott_bands_phase_present) {
323 pstr_usac_mps212_config->bs_ott_bands_phase =
324 ixheaacd_read_bits_buf(it_bit_buff, 5);
325 if (pstr_usac_mps212_config->bs_ott_bands_phase > MAX_PARAMETER_BANDS)
326 return IA_FATAL_ERROR;
327 }
328
329 if (stereo_config_index > 1) {
330 pstr_usac_mps212_config->bs_residual_bands =
331 ixheaacd_read_bits_buf(it_bit_buff, 5);
332
333 if (pstr_usac_mps212_config->bs_residual_bands > MAX_PARAMETER_BANDS)
334 return IA_FATAL_ERROR;
335
336 pstr_usac_mps212_config->bs_ott_bands_phase =
337 max(pstr_usac_mps212_config->bs_ott_bands_phase,
338 pstr_usac_mps212_config->bs_residual_bands);
339
340 pstr_usac_mps212_config->bs_pseudo_lr =
341 ixheaacd_read_bits_buf(it_bit_buff, 1);
342 }
343
344 if (pstr_usac_mps212_config->bs_temp_shape_config == 2)
345 pstr_usac_mps212_config->bs_env_quant_mode =
346 ixheaacd_read_bits_buf(it_bit_buff, 1);
347
348 return IA_NO_ERROR;
349 }
350
ixheaacd_cpe_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_element_config_struct * pstr_usac_element_config,WORD32 sbr_ratio_index)351 IA_ERRORCODE ixheaacd_cpe_config(
352 ia_bit_buf_struct *it_bit_buff,
353 ia_usac_dec_element_config_struct *pstr_usac_element_config,
354 WORD32 sbr_ratio_index) {
355 pstr_usac_element_config->tw_mdct = ixheaacd_read_bits_buf(it_bit_buff, 1);
356 pstr_usac_element_config->noise_filling =
357 ixheaacd_read_bits_buf(it_bit_buff, 1);
358
359 if (sbr_ratio_index > 0) {
360 ixheaacd_sbr_config(it_bit_buff,
361 &(pstr_usac_element_config->str_usac_sbr_config));
362 pstr_usac_element_config->stereo_config_index =
363 ixheaacd_read_bits_buf(it_bit_buff, 2);
364
365 } else {
366 pstr_usac_element_config->stereo_config_index = 0;
367 }
368
369 if (pstr_usac_element_config->stereo_config_index > 0)
370 return ixheaacd_mps212_config(
371 it_bit_buff, &(pstr_usac_element_config->str_usac_mps212_config),
372 pstr_usac_element_config->stereo_config_index);
373
374 return IA_NO_ERROR;
375 }
376
ixheaacd_decoder_config(ia_bit_buf_struct * it_bit_buff,ia_usac_decoder_config_struct * pstr_usac_decoder_config,WORD32 sbr_ratio_index,UINT32 * chan)377 WORD32 ixheaacd_decoder_config(
378 ia_bit_buf_struct *it_bit_buff,
379 ia_usac_decoder_config_struct *pstr_usac_decoder_config,
380 WORD32 sbr_ratio_index, UINT32 *chan) {
381 UWORD32 elem_idx = 0;
382 UWORD32 err = 0;
383
384 ixheaacd_read_escape_value(
385 it_bit_buff, &(pstr_usac_decoder_config->num_elements), 4, 8, 16);
386 pstr_usac_decoder_config->num_elements += 1;
387 pstr_usac_decoder_config->preroll_flag = 0;
388
389 if (pstr_usac_decoder_config->num_elements > USAC_MAX_ELEMENTS) {
390 return -1;
391 }
392
393 for (elem_idx = 0; elem_idx < pstr_usac_decoder_config->num_elements;
394 elem_idx++) {
395 ia_usac_dec_element_config_struct *pstr_usac_element_config =
396 &(pstr_usac_decoder_config->str_usac_element_config[elem_idx]);
397
398 pstr_usac_decoder_config->usac_element_type[elem_idx] =
399 ixheaacd_read_bits_buf(it_bit_buff, 2);
400
401 switch (pstr_usac_decoder_config->usac_element_type[elem_idx]) {
402 case ID_USAC_SCE:
403
404 pstr_usac_element_config->tw_mdct =
405 ixheaacd_read_bits_buf(it_bit_buff, 1);
406 pstr_usac_element_config->noise_filling =
407 ixheaacd_read_bits_buf(it_bit_buff, 1);
408 pstr_usac_element_config->stereo_config_index = 0;
409 if (sbr_ratio_index > 0)
410 ixheaacd_sbr_config(it_bit_buff,
411 &(pstr_usac_element_config->str_usac_sbr_config));
412
413 break;
414
415 case ID_USAC_CPE:
416 if (ixheaacd_cpe_config(it_bit_buff, pstr_usac_element_config,
417 sbr_ratio_index) != IA_NO_ERROR)
418 return IA_FATAL_ERROR;
419 if (pstr_usac_element_config->stereo_config_index > 1 && *chan < 2)
420 return -1;
421
422 break;
423
424 case ID_USAC_LFE:
425
426 pstr_usac_element_config->tw_mdct = 0;
427 pstr_usac_element_config->noise_filling = 0;
428 pstr_usac_element_config->stereo_config_index = 0;
429 break;
430
431 case ID_USAC_EXT:
432 err = ixheaacd_ext_element_config(
433 it_bit_buff, pstr_usac_element_config,
434 &pstr_usac_decoder_config->usac_ext_ele_payload_buf[elem_idx][0],
435 &pstr_usac_decoder_config->usac_ext_ele_payload_len[elem_idx],
436 &(pstr_usac_decoder_config->preroll_flag));
437
438 if (pstr_usac_decoder_config->usac_ext_ele_payload_len[elem_idx] > 0) {
439 pstr_usac_decoder_config->usac_ext_ele_payload_present[elem_idx] = 1;
440 } else {
441 pstr_usac_decoder_config->usac_ext_ele_payload_present[elem_idx] = 0;
442 }
443 if (err != 0) return -1;
444 break;
445 default:
446 return -1;
447 break;
448 }
449 }
450 return err;
451 }
452
ixheaacd_config_extension(ia_bit_buf_struct * it_bit_buff,ia_usac_decoder_config_struct * pstr_usac_decoder_config)453 WORD32 ixheaacd_config_extension(
454 ia_bit_buf_struct *it_bit_buff,
455 ia_usac_decoder_config_struct *pstr_usac_decoder_config) {
456 UWORD32 i, j;
457 UWORD32 num_config_extensions;
458 UWORD32 usac_config_ext_type, usac_config_ext_len;
459
460 ixheaacd_read_escape_value(it_bit_buff, &(num_config_extensions), 2, 4, 8);
461 num_config_extensions += 1;
462 if (USAC_MAX_CONFIG_EXTENSIONS < num_config_extensions) {
463 return -1;
464 }
465
466 pstr_usac_decoder_config->num_config_extensions = num_config_extensions;
467 memset(pstr_usac_decoder_config->usac_cfg_ext_info_len, 0,
468 USAC_MAX_CONFIG_EXTENSIONS * sizeof(WORD32));
469 memset(pstr_usac_decoder_config->usac_cfg_ext_info_present, 0,
470 USAC_MAX_CONFIG_EXTENSIONS * sizeof(WORD32));
471
472 for (j = 0; j < num_config_extensions; j++) {
473 UWORD32 tmp;
474 UWORD32 fill_byte_val = 0xa5;
475
476 ixheaacd_read_escape_value(it_bit_buff, &(usac_config_ext_type), 4, 8, 16);
477 ixheaacd_read_escape_value(it_bit_buff, &(usac_config_ext_len), 4, 8, 16);
478
479 if (usac_config_ext_len > 768) return IA_FATAL_ERROR;
480
481 switch (usac_config_ext_type) {
482 case ID_CONFIG_EXT_FILL:
483 for (i = 0; i < usac_config_ext_len; i++) {
484 fill_byte_val = ixheaacd_read_bits_buf(it_bit_buff, 8);
485 if (fill_byte_val != 0xa5) return -1;
486 }
487 break;
488 default:
489 if ((WORD32)usac_config_ext_len > (it_bit_buff->cnt_bits >> 3)) {
490 return -1;
491 }
492 if (ID_CONFIG_EXT_LOUDNESS_INFO == usac_config_ext_type) {
493 for (i = 0; i < usac_config_ext_len; i++) {
494 UWORD8 byte_val = ixheaacd_read_bits_buf(it_bit_buff, 8);
495 pstr_usac_decoder_config->usac_cfg_ext_info_buf[j][i] = byte_val;
496 }
497 pstr_usac_decoder_config->usac_cfg_ext_info_len[j] =
498 usac_config_ext_len;
499 pstr_usac_decoder_config->usac_cfg_ext_info_present[j] = 1;
500 } else {
501 for (i = 0; i < usac_config_ext_len; i++)
502 tmp = ixheaacd_read_bits_buf(it_bit_buff, 8);
503 }
504 break;
505 }
506 }
507
508 return 0;
509 }
510
ixheaacd_config(ia_bit_buf_struct * it_bit_buff,ia_usac_config_struct * pstr_usac_conf,UINT32 * chan)511 WORD32 ixheaacd_config(ia_bit_buf_struct *it_bit_buff,
512 ia_usac_config_struct *pstr_usac_conf, UINT32 *chan) {
513 WORD32 tmp, err;
514 err = 0;
515
516 pstr_usac_conf->usac_sampling_frequency_index =
517 ixheaacd_read_bits_buf(it_bit_buff, 5);
518
519 if (pstr_usac_conf->usac_sampling_frequency_index == 0x1f) {
520 pstr_usac_conf->usac_sampling_frequency =
521 ixheaacd_read_bits_buf(it_bit_buff, 24);
522
523 if (pstr_usac_conf->usac_sampling_frequency > USAC_MAX_SAMPLE_RATE) {
524 return IA_FATAL_ERROR;
525 }
526
527 } else {
528 pstr_usac_conf->usac_sampling_frequency =
529 sampling_rate_tbl[pstr_usac_conf->usac_sampling_frequency_index];
530 }
531
532 pstr_usac_conf->core_sbr_framelength_index =
533 ixheaacd_read_bits_buf(it_bit_buff, 3);
534
535 if (pstr_usac_conf->core_sbr_framelength_index > MAX_CORE_SBR_FRAME_LEN_IDX)
536 return -1;
537
538 pstr_usac_conf->channel_configuration_index =
539 ixheaacd_read_bits_buf(it_bit_buff, 5);
540 if ((pstr_usac_conf->channel_configuration_index >= 3) &&
541 (pstr_usac_conf->channel_configuration_index != 8))
542 return -1;
543
544 if (pstr_usac_conf->channel_configuration_index == 0) {
545 UWORD32 i;
546
547 ixheaacd_read_escape_value(it_bit_buff,
548 (UWORD32 *)(&(pstr_usac_conf->num_out_channels)),
549 5, 8, 16);
550 if (BS_MAX_NUM_OUT_CHANNELS < pstr_usac_conf->num_out_channels) {
551 return IA_ENHAACPLUS_DEC_INIT_FATAL_STREAM_CHAN_GT_MAX;
552 }
553 for (i = 0; i < pstr_usac_conf->num_out_channels; i++)
554 pstr_usac_conf->output_channel_pos[i] =
555 ixheaacd_read_bits_buf(it_bit_buff, 5);
556
557 } else {
558 ixheaacd_get_usac_chan_conf(pstr_usac_conf,
559 pstr_usac_conf->channel_configuration_index);
560 }
561
562 err = ixheaacd_decoder_config(
563 it_bit_buff, &(pstr_usac_conf->str_usac_dec_config),
564 ixheaacd_sbr_ratio(pstr_usac_conf->core_sbr_framelength_index), chan);
565 if (err != 0) return -1;
566
567 tmp = ixheaacd_read_bits_buf(it_bit_buff, 1);
568
569 if (tmp) {
570 err = ixheaacd_config_extension(it_bit_buff,
571 &pstr_usac_conf->str_usac_dec_config);
572 if (err != 0) return -1;
573 }
574
575 return err;
576 }
577
ixheaacd_conf_default(ia_usac_config_struct * pstr_usac_conf)578 VOID ixheaacd_conf_default(ia_usac_config_struct *pstr_usac_conf) {
579 WORD32 i;
580
581 pstr_usac_conf->num_out_channels = 0;
582
583 for (i = 0; i < BS_MAX_NUM_OUT_CHANNELS; i++)
584 pstr_usac_conf->output_channel_pos[i] = BS_OUTPUT_CHANNEL_POS_NA;
585
586 pstr_usac_conf->str_usac_dec_config.num_elements = 0;
587
588 for (i = 0; i < USAC_MAX_ELEMENTS; i++)
589 pstr_usac_conf->str_usac_dec_config.usac_element_type[i] = ID_USAC_INVALID;
590
591 return;
592 }
593