Searched defs:lane0 (Results 1 – 5 of 5) sorted by relevance
/external/mesa3d/prebuilt-intermediates/bifrost/ |
D | bi_generated_pack.h | 234 unsigned lane0 = lane0_temp; in pan_pack_add_fatan_table_f16() local 569 unsigned lane0 = lane0_temp; in pan_pack_add_branchc_i16() local 1031 unsigned lane0 = lane0_temp; in pan_pack_add_mkvec_v2i16() local 1546 unsigned lane0 = lane0_temp; in pan_pack_add_frsq_f16() local 2596 unsigned lane0 = lane0_temp; in pan_pack_fma_s16_to_s32() local 2741 unsigned lane0 = lane0_temp; in pan_pack_fma_f16_to_f32() local 2927 unsigned lane0 = lane0_temp; in pan_pack_add_f16_to_s32() local 2988 unsigned lane0 = lane0_temp; in pan_pack_fma_s8_to_s32() local 4059 unsigned lane0 = lane0_temp; in pan_pack_add_frcp_f16() local 4142 unsigned lane0 = lane0_temp; in pan_pack_add_f16_to_f32() local [all …]
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D | bifrost_gen_disasm.c | 66 const char *lane0 = lane0_table[_BITS(bits, 8, 1)]; in bi_disasm_add_frcp_f16() local 835 const char *lane0 = lane0_table[_BITS(bits, 4, 2)]; in bi_disasm_add_u8_to_u32() local 984 const char *lane0 = lane0_table[_BITS(bits, 4, 1)]; in bi_disasm_add_u16_to_f32() local 1126 const char *lane0 = lane0_table[_BITS(bits, 4, 2)]; in bi_disasm_add_s8_to_f32() local 1299 const char *lane0 = lane0_table[_BITS(bits, 12, 1)]; in bi_disasm_fma_mkvec_v4i8() local 1541 const char *lane0 = lane0_table[_BITS(bits, 4, 1)]; in bi_disasm_fma_u16_to_u32() local 1842 const char *lane0 = lane0_table[_BITS(bits, 4, 1)]; in bi_disasm_add_s16_to_f32() local 2351 const char *lane0 = lane0_table[_BITS(bits, 5, 1)]; in bi_disasm_add_f16_to_s32_1() local 3136 const char *lane0 = lane0_table[_BITS(bits, 4, 2)]; in bi_disasm_fma_u8_to_u32() local 5486 const char *lane0 = lane0_table[_BITS(bits, 4, 1)]; in bi_disasm_fma_s16_to_s32() local [all …]
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/external/libvpx/libvpx/vp9/common/arm/neon/ |
D | vp9_highbd_iht16x16_add_neon.c | 72 #define highbd_iadst_butterfly(in0, in1, c, lane0, lane1, s0, s1) \ argument
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/external/vixl/test/aarch64/ |
D | test-assembler-sve-aarch64.cc | 7404 uint8_t lane0 = 1 - (3 * i); in TEST_SVE() local 7414 uint16_t lane0 = -2 + (5 * i); in TEST_SVE() local 7424 uint32_t lane0 = 3 - (7 * i); in TEST_SVE() local 7434 uint64_t lane0 = -7 + (3 * i); in TEST_SVE() local 7575 uint8_t lane0 = -4 + (11 * i); in TEST_SVE() local 7585 uint16_t lane0 = 6 - (2 * i); in TEST_SVE() local 7596 uint32_t lane0 = -7 + (3 * i); in TEST_SVE() local 7607 uint64_t lane0 = 32 - (11 * i); in TEST_SVE() local 7771 uint8_t lane0 = 1 - (3 * i); in TEST_SVE() local 7783 uint16_t lane0 = -2 + (5 * i); in TEST_SVE() local [all …]
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/external/mesa3d/src/amd/llvm/ |
D | ac_llvm_build.c | 3416 static inline enum dpp_ctrl dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, in dpp_quad_perm() 4261 LLVMValueRef ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned lane0, in ac_build_quad_swizzle()
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