/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/ |
D | asimd-ld4.s | 7 ld4r {v0.2s, v1.2s, v2.2s, v3.2s}, [sp] label 11 ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [sp] label 15 ld4r {v0.2s, v1.2s, v2.2s, v3.2s}, [sp], #16 label 19 ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [sp], #32 label 23 ld4r {v0.2s, v1.2s, v2.2s, v3.2s}, [sp], x0 label 27 ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [sp], x0 label
|
/external/llvm-project/llvm/test/MC/AArch64/ |
D | arm64-simd-ldst.s | 1012 ld4r: label
|
/external/llvm/test/MC/AArch64/ |
D | arm64-simd-ldst.s | 1012 ld4r: label
|
/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1148 __ ld4r(v14.V16B(), v15.V16B(), v16.V16B(), v17.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1149 __ ld4r(v13.V16B(), in GenerateTestSequenceNEON() local 1154 __ ld4r(v9.V16B(), in GenerateTestSequenceNEON() local 1159 __ ld4r(v8.V1D(), v9.V1D(), v10.V1D(), v11.V1D(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1160 __ ld4r(v4.V1D(), in GenerateTestSequenceNEON() local 1165 __ ld4r(v26.V1D(), in GenerateTestSequenceNEON() local 1170 __ ld4r(v19.V2D(), v20.V2D(), v21.V2D(), v22.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1171 __ ld4r(v28.V2D(), in GenerateTestSequenceNEON() local 1176 __ ld4r(v15.V2D(), in GenerateTestSequenceNEON() local 1181 __ ld4r(v31.V2S(), v0.V2S(), v1.V2S(), v2.V2S(), MemOperand(x0)); in GenerateTestSequenceNEON() local [all …]
|
/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 2191 void Assembler::ld4r(const VRegister& vt, in ld4r() function in vixl::aarch64::Assembler
|
D | logic-aarch64.cc | 358 void Simulator::ld4r(VectorFormat vform, in ld4r() function in vixl::aarch64::Simulator
|