| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m4-int.s | 124 ldrh r0, [r1, #2] label
126 ldrh r0, [r1, #-1] label
127 ldrh r0, [r1], #1 label
128 ldrh r0, [r1, #1]! label
129 ldrh r0, #4 label
130 ldrh r0, next label
131 ldrh r0, [r1, r2] label
|
| D | m7-int.s | 120 ldrh r0, [r1, #2] label
122 ldrh r0, [r1, #-1] label
123 ldrh r0, [r1], #1 label
124 ldrh r0, [r1, #1]! label
125 ldrh r0, #4 label
126 ldrh r0, [r1, r2] label
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 944 ldrh w9, [x2], #255 label
945 ldrh w9, [x2], #1 label
946 ldrh w10, [x3], #-256 label
1019 ldrh w9, [x2, #255]! label
1020 ldrh w9, [x2, #1]! label
1021 ldrh w10, [x3, #-256]! label
1105 ldrh w2, [x4] label
1139 ldrh w10, [x30, x7, lsl #1] label
1141 ldrh w12, [x28, xzr, sxtx] label
1143 ldrh w14, [x26, w6, uxtw] label
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-diags.s | 78 ldrh w1, [x3, w3, sxtw #4] label
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-diags.s | 78 ldrh w1, [x3, w3, sxtw #4] label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 191 __ ldrh(w5, MemOperand(x0)); in GenerateTestSequenceBase() local
192 __ ldrh(w5, MemOperand(x1, 2, PostIndex)); in GenerateTestSequenceBase() local
193 __ ldrh(w5, MemOperand(x1, 2, PreIndex)); in GenerateTestSequenceBase() local
194 __ ldrh(x6, MemOperand(x0)); in GenerateTestSequenceBase() local
195 __ ldrh(x6, MemOperand(x1, 2, PostIndex)); in GenerateTestSequenceBase() local
196 __ ldrh(x6, MemOperand(x1, 2, PreIndex)); in GenerateTestSequenceBase() local
|
| D | test-assembler-aarch64.cc | 11343 __ ldrh(w2, MemOperand(x0, offset), RequireScaledOffset); in TEST() local
11570 __ ldrh(w2, MemOperand(x0, preindex, PreIndex)); in TEST() local
11737 __ ldrh(w2, MemOperand(x0, postindex, PostIndex)); in TEST() local
11858 __ ldrh(w2, MemOperand(x0, x10)); in TEST() local
|
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 482 void Assembler::ldrh(Register rd, Address ad, Condition cond) { in ldrh() function in dart::Assembler
|
| /external/skia/src/core/ |
| D | SkVM.cpp | 2253 void Assembler::ldrh(X dst, X src, int imm12) { in ldrh() function in skvm::Assembler
2269 void Assembler::ldrh(V dst, X src, int imm12) { in ldrh() function in skvm::Assembler
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2487 void ldrh(Register rt, const MemOperand& operand) { in ldrh() function
2490 void ldrh(Condition cond, Register rt, const MemOperand& operand) { in ldrh() function
2493 void ldrh(EncodingSize size, Register rt, const MemOperand& operand) { in ldrh() function
2502 void ldrh(Register rt, Location* location) { ldrh(al, rt, location); } in ldrh() function
|
| D | assembler-aarch32.cc | 5940 void Assembler::ldrh(Condition cond, in ldrh() function in vixl::aarch32::Assembler
6115 void Assembler::ldrh(Condition cond, Register rt, Location* location) { in ldrh() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1793 void Disassembler::ldrh(Condition cond, in ldrh() function in vixl::aarch32::Disassembler
1802 void Disassembler::ldrh(Condition cond, Register rt, Location* location) { in ldrh() function in vixl::aarch32::Disassembler
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 1215 void Assembler::ldrh(const Register& rt, in ldrh() function in vixl::aarch64::Assembler
|