1 /*
2 * \file trc_cmp_cfg_etmv4.h
3 * \brief OpenCSD :
4 *
5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
6 */
7
8
9 /*
10 * Redistribution and use in source and binary forms, with or without modification,
11 * are permitted provided that the following conditions are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 *
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
19 *
20 * 3. Neither the name of the copyright holder nor the names of its contributors
21 * may be used to endorse or promote products derived from this software without
22 * specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 #ifndef ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
37 #define ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
38
39 #include "trc_pkt_types_etmv4.h"
40 #include "common/trc_cs_config.h"
41
42
43 /** @addtogroup ocsd_protocol_cfg
44 @{*/
45
46 /** @name ETMv4 configuration
47 @{*/
48
49 /*!
50 * @class EtmV4Config
51 * @brief Interpreter class for etm v4 config structure.
52 *
53 * Provides quick value interpretation methods for the ETMv4 config register values.
54 * Primarily inlined for efficient code.
55 */
56 class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
57 {
58 public:
59 EtmV4Config(); /**< Default constructor */
60 EtmV4Config(const ocsd_etmv4_cfg *cfg_regs);
~EtmV4Config()61 ~EtmV4Config() {}; /**< Default destructor */
62
63 // operations to convert to and from C-API structure
64
65 //! copy assignment operator for base structure into class.
66 EtmV4Config & operator=(const ocsd_etmv4_cfg *p_cfg);
67
68 //! cast operator returning struct const reference
69 operator const ocsd_etmv4_cfg &() const { return m_cfg; };
70 //! cast operator returning struct const pointer
71 operator const ocsd_etmv4_cfg *() const { return &m_cfg; };
72
coreProfile()73 const ocsd_core_profile_t &coreProfile() const { return m_cfg.core_prof; };
archVersion()74 const ocsd_arch_version_t &archVersion() const { return m_cfg.arch_ver; };
75
76 /* idr 0 */
77 const bool LSasInstP0() const;
78 const bool hasDataTrace() const;
79 const bool hasBranchBroadcast() const;
80 const bool hasCondTrace() const;
81 const bool hasCycleCountI() const;
82 const bool hasRetStack() const;
83 const uint8_t numEvents() const;
84 const bool eteHasTSMarker() const;
85
86 typedef enum _condType {
87 COND_PASS_FAIL,
88 COND_HAS_ASPR
89 } condType;
90
91 const condType hasCondType() const;
92
93 typedef enum _QSuppType {
94 Q_NONE,
95 Q_ICOUNT_ONLY,
96 Q_NO_ICOUNT_ONLY,
97 Q_FULL
98 } QSuppType;
99
100 const QSuppType getQSuppType();
101 const bool hasQElem();
102 const bool hasQFilter();
103
104 const bool hasTrcExcpData() const;
105 const uint32_t TimeStampSize() const;
106
107 const bool commitOpt1() const;
108 const bool commTransP0() const;
109
110 /* idr 1 */
111 const uint8_t MajVersion() const;
112 const uint8_t MinVersion() const;
113 const uint8_t FullVersion() const;
114
115 /* idr 2 */
116 const uint32_t iaSizeMax() const;
117 const uint32_t cidSize() const;
118 const uint32_t vmidSize();
119 const uint32_t daSize() const;
120 const uint32_t dvSize() const;
121 const uint32_t ccSize() const;
122 const bool vmidOpt() const;
123 const bool wfiwfeBranch() const;
124
125 /* id regs 8-13*/
126 const uint32_t MaxSpecDepth() const;
127 const uint32_t P0_Key_Max() const;
128 const uint32_t P1_Key_Max() const;
129 const uint32_t P1_Spcl_Key_Max() const;
130 const uint32_t CondKeyMax() const;
131 const uint32_t CondSpecKeyMax() const;
132 const uint32_t CondKeyMaxIncr() const;
133
134 /* trace idr */
135 virtual const uint8_t getTraceID() const; //!< CoreSight Trace ID for this device.
136
137 /* config R */
138 const bool enabledDVTrace() const;
139 const bool enabledDATrace() const;
140 const bool enabledDataTrace() const;
141
142 typedef enum {
143 LSP0_NONE,
144 LSP0_L,
145 LSP0_S,
146 LSP0_LS
147 } LSP0_t;
148
149 const bool enabledLSP0Trace() const;
150 const LSP0_t LSP0Type() const;
151
152 const bool enabledBrBroad() const;
153 const bool enabledCCI() const;
154 const bool enabledCID() const;
155 const bool enabledVMID() const;
156
157 typedef enum {
158 COND_TR_DIS,
159 COND_TR_LD,
160 COND_TR_ST,
161 COND_TR_LDST,
162 COND_TR_ALL
163 } CondITrace_t;
164
165 const CondITrace_t enabledCondITrace();
166
167 const bool enabledTS() const;
168 const bool enabledRetStack() const;
169
170 const bool enabledQE() const;
171
172 private:
173 void PrivateInit();
174 void CalcQSupp();
175 void CalcVMIDSize();
176
177 bool m_QSuppCalc;
178 bool m_QSuppFilter;
179 QSuppType m_QSuppType;
180
181 bool m_VMIDSzCalc;
182 uint32_t m_VMIDSize;
183
184 bool m_condTraceCalc;
185 CondITrace_t m_CondTrace;
186
187 protected:
188 ocsd_etmv4_cfg m_cfg;
189 uint8_t m_MajVer;
190 uint8_t m_MinVer;
191
192 };
193
194 /* idr 0 */
LSasInstP0()195 inline const bool EtmV4Config::LSasInstP0() const
196 {
197 return (bool)((m_cfg.reg_idr0 & 0x6) == 0x6);
198 }
199
hasDataTrace()200 inline const bool EtmV4Config::hasDataTrace() const
201 {
202 return (bool)((m_cfg.reg_idr0 & 0x18) == 0x18);
203 }
204
hasBranchBroadcast()205 inline const bool EtmV4Config::hasBranchBroadcast() const
206 {
207 return (bool)((m_cfg.reg_idr0 & 0x20) == 0x20);
208 }
209
hasCondTrace()210 inline const bool EtmV4Config::hasCondTrace() const
211 {
212 return (bool)((m_cfg.reg_idr0 & 0x40) == 0x40);
213 }
214
hasCycleCountI()215 inline const bool EtmV4Config::hasCycleCountI() const
216 {
217 return (bool)((m_cfg.reg_idr0 & 0x80) == 0x80);
218 }
219
hasRetStack()220 inline const bool EtmV4Config::hasRetStack() const
221 {
222 return (bool)((m_cfg.reg_idr0 & 0x200) == 0x200);
223 }
224
numEvents()225 inline const uint8_t EtmV4Config::numEvents() const
226 {
227 return ((m_cfg.reg_idr0 >> 10) & 0x3) + 1;
228 }
229
hasCondType()230 inline const EtmV4Config::condType EtmV4Config::hasCondType() const
231 {
232 return ((m_cfg.reg_idr0 & 0x3000) == 0x1000) ? EtmV4Config::COND_HAS_ASPR : EtmV4Config::COND_PASS_FAIL;
233 }
234
getQSuppType()235 inline const EtmV4Config::QSuppType EtmV4Config::getQSuppType()
236 {
237 if(!m_QSuppCalc) CalcQSupp();
238 return m_QSuppType;
239 }
240
hasQElem()241 inline const bool EtmV4Config::hasQElem()
242 {
243 if(!m_QSuppCalc) CalcQSupp();
244 return (bool)(m_QSuppType != Q_NONE);
245 }
246
hasQFilter()247 inline const bool EtmV4Config::hasQFilter()
248 {
249 if(!m_QSuppCalc) CalcQSupp();
250 return m_QSuppFilter;
251 }
252
hasTrcExcpData()253 inline const bool EtmV4Config::hasTrcExcpData() const
254 {
255 return (bool)((m_cfg.reg_idr0 & 0x20000) == 0x20000);
256 }
257
eteHasTSMarker()258 inline const bool EtmV4Config::eteHasTSMarker() const
259 {
260 return (FullVersion() >= 0x51) && ((m_cfg.reg_idr0 & 0x800000) == 0x800000);
261 }
262
TimeStampSize()263 inline const uint32_t EtmV4Config::TimeStampSize() const
264 {
265 uint32_t tsSizeF = (m_cfg.reg_idr0 >> 24) & 0x1F;
266 if(tsSizeF == 0x6)
267 return 48;
268 if(tsSizeF == 0x8)
269 return 64;
270 return 0;
271 }
272
commitOpt1()273 inline const bool EtmV4Config::commitOpt1() const
274 {
275 return (bool)((m_cfg.reg_idr0 & 0x20000000) == 0x20000000) && hasCycleCountI();
276 }
277
commTransP0()278 inline const bool EtmV4Config::commTransP0() const
279 {
280 return (bool)((m_cfg.reg_idr0 & 0x40000000) == 0x0);
281 }
282
283 /* idr 1 */
MajVersion()284 inline const uint8_t EtmV4Config::MajVersion() const
285 {
286 return m_MajVer;
287 }
288
MinVersion()289 inline const uint8_t EtmV4Config::MinVersion() const
290 {
291 return m_MinVer;
292 }
293
FullVersion()294 inline const uint8_t EtmV4Config::FullVersion() const
295 {
296 return (m_MajVer << 4) | m_MinVer;
297 }
298
299 /* idr 2 */
iaSizeMax()300 inline const uint32_t EtmV4Config::iaSizeMax() const
301 {
302 return ((m_cfg.reg_idr2 & 0x1F) == 0x8) ? 64 : 32;
303 }
304
cidSize()305 inline const uint32_t EtmV4Config::cidSize() const
306 {
307 return (((m_cfg.reg_idr2 >> 5) & 0x1F) == 0x4) ? 32 : 0;
308 }
309
vmidSize()310 inline const uint32_t EtmV4Config::vmidSize()
311 {
312 if(!m_VMIDSzCalc)
313 {
314 CalcVMIDSize();
315 }
316 return m_VMIDSize;
317 }
318
daSize()319 inline const uint32_t EtmV4Config::daSize() const
320 {
321 uint32_t daSizeF = ((m_cfg.reg_idr2 >> 15) & 0x1F);
322 if(daSizeF)
323 return (((m_cfg.reg_idr2 >> 15) & 0x1F) == 0x8) ? 64 : 32;
324 return 0;
325 }
326
dvSize()327 inline const uint32_t EtmV4Config::dvSize() const
328 {
329 uint32_t dvSizeF = ((m_cfg.reg_idr2 >> 20) & 0x1F);
330 if(dvSizeF)
331 return (((m_cfg.reg_idr2 >> 20) & 0x1F) == 0x8) ? 64 : 32;
332 return 0;
333 }
334
ccSize()335 inline const uint32_t EtmV4Config::ccSize() const
336 {
337 return ((m_cfg.reg_idr2 >> 25) & 0xF) + 12;
338 }
339
vmidOpt()340 inline const bool EtmV4Config::vmidOpt() const
341 {
342 return (bool)((m_cfg.reg_idr2 & 0x20000000) == 0x20000000) && (MinVersion() > 0);
343 }
344
wfiwfeBranch()345 inline const bool EtmV4Config::wfiwfeBranch() const
346 {
347 return (bool)((m_cfg.reg_idr2 & 0x80000000) && (FullVersion() >= 0x43));
348 }
349
350
351 /* id regs 8-13*/
352
MaxSpecDepth()353 inline const uint32_t EtmV4Config::MaxSpecDepth() const
354 {
355 return m_cfg.reg_idr8;
356 }
357
P0_Key_Max()358 inline const uint32_t EtmV4Config::P0_Key_Max() const
359 {
360 return (m_cfg.reg_idr9 == 0) ? 1 : m_cfg.reg_idr9;
361 }
362
P1_Key_Max()363 inline const uint32_t EtmV4Config::P1_Key_Max() const
364 {
365 return m_cfg.reg_idr10;
366 }
367
P1_Spcl_Key_Max()368 inline const uint32_t EtmV4Config::P1_Spcl_Key_Max() const
369 {
370 return m_cfg.reg_idr11;
371 }
372
CondKeyMax()373 inline const uint32_t EtmV4Config::CondKeyMax() const
374 {
375 return m_cfg.reg_idr12;
376 }
377
CondSpecKeyMax()378 inline const uint32_t EtmV4Config::CondSpecKeyMax() const
379 {
380 return m_cfg.reg_idr13;
381 }
382
CondKeyMaxIncr()383 inline const uint32_t EtmV4Config::CondKeyMaxIncr() const
384 {
385 return m_cfg.reg_idr12 - m_cfg.reg_idr13;
386 }
387
getTraceID()388 inline const uint8_t EtmV4Config::getTraceID() const
389 {
390 return (uint8_t)(m_cfg.reg_traceidr & 0x7F);
391 }
392
393 /* config R */
enabledDVTrace()394 inline const bool EtmV4Config::enabledDVTrace() const
395 {
396 return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 17)) != 0);
397 }
398
enabledDATrace()399 inline const bool EtmV4Config::enabledDATrace() const
400 {
401 return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 16)) != 0);
402 }
403
enabledDataTrace()404 inline const bool EtmV4Config::enabledDataTrace() const
405 {
406 return enabledDATrace() || enabledDVTrace();
407 }
408
enabledLSP0Trace()409 inline const bool EtmV4Config::enabledLSP0Trace() const
410 {
411 return ((m_cfg.reg_configr & 0x6) != 0);
412 }
413
LSP0Type()414 inline const EtmV4Config::LSP0_t EtmV4Config::LSP0Type() const
415 {
416 return (LSP0_t)((m_cfg.reg_configr & 0x6) >> 1);
417 }
418
enabledBrBroad()419 inline const bool EtmV4Config::enabledBrBroad() const
420 {
421 return ((m_cfg.reg_configr & (0x1 << 3)) != 0);
422 }
423
enabledCCI()424 inline const bool EtmV4Config::enabledCCI() const
425 {
426 return ((m_cfg.reg_configr & (0x1 << 4)) != 0);
427 }
428
enabledCID()429 inline const bool EtmV4Config::enabledCID() const
430 {
431 return ((m_cfg.reg_configr & (0x1 << 6)) != 0);
432 }
433
enabledVMID()434 inline const bool EtmV4Config::enabledVMID() const
435 {
436 return ((m_cfg.reg_configr & (0x1 << 7)) != 0);
437 }
438
enabledCondITrace()439 inline const EtmV4Config::CondITrace_t EtmV4Config::enabledCondITrace()
440 {
441 if(!m_condTraceCalc)
442 {
443 switch((m_cfg.reg_configr >> 8) & 0x7)
444 {
445 default:
446 case 0: m_CondTrace = COND_TR_DIS; break;
447 case 1: m_CondTrace = COND_TR_LD; break;
448 case 2: m_CondTrace = COND_TR_ST; break;
449 case 3: m_CondTrace = COND_TR_LDST; break;
450 case 7: m_CondTrace = COND_TR_ALL; break;
451 }
452 m_condTraceCalc = true;
453 }
454 return m_CondTrace;
455 }
456
enabledTS()457 inline const bool EtmV4Config::enabledTS() const
458 {
459 return ((m_cfg.reg_configr & (0x1 << 11)) != 0);
460 }
461
enabledRetStack()462 inline const bool EtmV4Config::enabledRetStack() const
463 {
464 return ((m_cfg.reg_configr & (0x1 << 12)) != 0);
465 }
466
enabledQE()467 inline const bool EtmV4Config::enabledQE() const
468 {
469 return ((m_cfg.reg_configr & (0x3 << 13)) != 0);
470 }
471
472 /** @}*/
473 /** @}*/
474
475 #endif // ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
476
477 /* End of File trc_cmp_cfg_etmv4.h */
478