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1 /*
2  * \file       trc_pkt_decode_etmv4i.h
3  * \brief      OpenCSD : ETMv4 instruction decoder
4  *
5  * \copyright  Copyright (c) 2015, ARM Limited. All Rights Reserved.
6  */
7 
8 /*
9  * Redistribution and use in source and binary forms, with or without modification,
10  * are permitted provided that the following conditions are met:
11  *
12  * 1. Redistributions of source code must retain the above copyright notice,
13  * this list of conditions and the following disclaimer.
14  *
15  * 2. Redistributions in binary form must reproduce the above copyright notice,
16  * this list of conditions and the following disclaimer in the documentation
17  * and/or other materials provided with the distribution.
18  *
19  * 3. Neither the name of the copyright holder nor the names of its contributors
20  * may be used to endorse or promote products derived from this software without
21  * specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #ifndef ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED
36 #define ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED
37 
38 #include "common/trc_pkt_decode_base.h"
39 #include "opencsd/etmv4/trc_pkt_elem_etmv4i.h"
40 #include "opencsd/etmv4/trc_cmp_cfg_etmv4.h"
41 #include "common/trc_gen_elem.h"
42 #include "common/trc_ret_stack.h"
43 #include "common/ocsd_gen_elem_stack.h"
44 #include "opencsd/etmv4/trc_etmv4_stack_elem.h"
45 
46 class TrcStackElem;
47 class TrcStackElemParam;
48 class TrcStackElemCtxt;
49 
50 class TrcPktDecodeEtmV4I : public TrcPktDecodeBase<EtmV4ITrcPacket, EtmV4Config>
51 {
52 public:
53     TrcPktDecodeEtmV4I();
54     TrcPktDecodeEtmV4I(int instIDNum);
55     virtual ~TrcPktDecodeEtmV4I();
56 
57 protected:
58     /* implementation packet decoding interface */
59     virtual ocsd_datapath_resp_t processPacket();
60     virtual ocsd_datapath_resp_t onEOT();
61     virtual ocsd_datapath_resp_t onReset();
62     virtual ocsd_datapath_resp_t onFlush();
63     virtual ocsd_err_t onProtocolConfig();
getCoreSightTraceID()64     virtual const uint8_t getCoreSightTraceID() { return m_CSID; };
65 
66     /* local decode methods */
67     void initDecoder();      // initial state on creation (zeros all config)
68     void resetDecoder();     // reset state to start of decode. (moves state, retains config)
69     virtual void onFirstInitOK(); // override to set init related info.
70 
71     ocsd_err_t decodePacket();    // decode packet into trace elements. return true to indicate decode complete - can change FSM to commit state - return is false.
72     ocsd_datapath_resp_t resolveElements();   // commit/cancel trace elements generated from latest / prior packets & send to output - may get wait response, or flag completion.
73     ocsd_err_t commitElements(); // commit elements - process element stack to generate output packets.
74     ocsd_err_t commitElemOnEOT();
75     ocsd_err_t cancelElements();    // cancel elements. These not output
76     ocsd_err_t mispredictAtom();    // mispredict an atom
77     ocsd_err_t discardElements();   // discard elements and flush
78 
79     void doTraceInfoPacket();
80     void updateContext(TrcStackElemCtxt *pCtxtElem, OcsdTraceElement &elem);
81 
82     // process atom will create instruction trace, or no memory access trace output elements.
83     ocsd_err_t processAtom(const ocsd_atm_val atom);
84 
85     // process an exception element - output instruction trace + exception generic type.
86     ocsd_err_t processException();
87 
88     // process Q element
89     ocsd_err_t processQElement();
90 
91     // process a source address element
92     ocsd_err_t processSourceAddress();
93 
94     // process an element that cannot be cancelled / discarded
95     ocsd_err_t processTS_CC_EventElem(TrcStackElem *pElem);
96 
97     // process marker elements
98     ocsd_err_t processMarkerElem(TrcStackElem *pElem);
99 
100     // process a transaction element
101     ocsd_err_t processTransElem(TrcStackElem *pElem);
102 
103     // process a bad packet
104     ocsd_err_t handleBadPacket(const char *reason);
105 
106     ocsd_err_t addElemCC(TrcStackElemParam *pParamElem);
107     ocsd_err_t addElemTS(TrcStackElemParam *pParamElem, bool withCC);
108     ocsd_err_t addElemEvent(TrcStackElemParam *pParamElem);
109 
110 private:
111     void SetInstrInfoInAddrISA(const ocsd_vaddr_t addr_val, const uint8_t isa);
calcISA(const bool SF,const uint8_t IS)112     const ocsd_isa calcISA(const bool SF, const uint8_t IS) const
113     {
114         if (SF)
115             return ocsd_isa_aarch64;
116         return (IS == 0) ? ocsd_isa_arm : ocsd_isa_thumb2;
117     }
118     typedef enum {
119         WP_NOT_FOUND,
120         WP_FOUND,
121         WP_NACC
122     } WP_res_t;
123 
124     typedef struct {
125         ocsd_vaddr_t st_addr;
126         ocsd_vaddr_t en_addr;
127         uint32_t num_instr;
128     } instr_range_t;
129 
130     //!< follow instructions from the current address to a WP. true if good, false if memory cannot be accessed.
131     ocsd_err_t traceInstrToWP(instr_range_t &instr_range, WP_res_t &WPRes, const bool traceToAddrNext = false, const ocsd_vaddr_t nextAddrMatch = 0);
132 
WPFound(WP_res_t res)133     inline const bool WPFound(WP_res_t res) const { return (res == WP_FOUND); };
WPNacc(WP_res_t res)134     inline const bool WPNacc(WP_res_t res) const { return (res == WP_NACC); };
135 
136     ocsd_err_t returnStackPop();  // pop return stack and update instruction address.
137 
138     void setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range, const bool executed, ocsd_trc_index_t index);
139     void setElemTraceRangeInstr(OcsdTraceElement &elemIn, const instr_range_t &addr_range,
140                                 const bool executed, ocsd_trc_index_t index, ocsd_instr_info &instr);
141 
142     // true if we are ETE configured.
isETEConfig()143     inline bool isETEConfig() {
144         return (m_config->MajVersion() >= ETE_ARCH_VERSION);
145     }
146 
147     ocsd_mem_space_acc_t getCurrMemSpace();
148 
149 //** intra packet state (see ETMv4 spec 6.2.1);
150 
151     // timestamping
152     uint64_t m_timestamp;   // last broadcast global Timestamp.
153     bool m_ete_first_ts_marker;
154 
155     // state and context
156     uint32_t m_context_id;              // most recent context ID
157     uint32_t m_vmid_id;                 // most recent VMID
158     bool m_is_secure;                   // true if Secure
159     bool m_is_64bit;                    // true if 64 bit
160     uint8_t m_last_IS;                  // last instruction set value from address packet.
161 
162     // cycle counts
163     int m_cc_threshold;
164 
165     // speculative trace
166     int m_curr_spec_depth;
167     int m_max_spec_depth;   // nax depth - from ID reg, beyond which auto-commit occurs
168     int m_unseen_spec_elem; // speculative elements at decode start
169 
170 /** Remove elements that are associated with data trace */
171 #ifdef DATA_TRACE_SUPPORTED
172     // data trace associative elements (unsupported at present in the decoder).
173     int m_p0_key;
174     int m_p0_key_max;
175 
176     // conditional non-branch trace - when data trace active (unsupported at present in the decoder)
177     int m_cond_c_key;
178     int m_cond_r_key;
179     int m_cond_key_max_incr;
180 #endif
181 
182     uint8_t m_CSID; //!< Coresight trace ID for this decoder.
183 
184     bool m_IASize64;    //!< True if 64 bit instruction addresses supported.
185 
186 //** Other processor state;
187 
188     // trace decode FSM
189     typedef enum {
190         NO_SYNC,        //!< pre start trace - init state or after reset or overflow, loss of sync.
191         WAIT_SYNC,      //!< waiting for sync packet.
192         WAIT_TINFO,     //!< waiting for trace info packet.
193         DECODE_PKTS,    //!< processing packets - creating decode elements on stack
194         RESOLVE_ELEM,   //!< analyze / resolve decode elements - create generic trace elements and pass on.
195     } processor_state_t;
196 
197     processor_state_t m_curr_state;
198     unsync_info_t m_unsync_eot_info;   //!< addition info when / why unsync / eot
199 
200 //** P0 element stack
201     EtmV4P0Stack m_P0_stack;    //!< P0 decode element stack
202 
203     // element resolution
204     struct {
205         int P0_commit;    //!< number of elements to commit
206         int P0_cancel;    //!< elements to cancel
207         bool mispredict;  //!< mispredict latest atom
208         bool discard;     //!< discard elements
209     } m_elem_res;
210 
211     //! true if any of the element resolution fields are non-zero
isElemForRes()212     const bool isElemForRes() const {
213         return (m_elem_res.P0_commit || m_elem_res.P0_cancel ||
214             m_elem_res.mispredict || m_elem_res.discard);
215     }
216 
clearElemRes()217     void clearElemRes() {
218         m_elem_res.P0_commit = 0;
219         m_elem_res.P0_cancel = 0;
220         m_elem_res.mispredict = false;
221         m_elem_res.discard = false;
222     }
223 
224     // packet decode state
225     bool m_need_ctxt;   //!< need context to continue
226     bool m_need_addr;   //!< need an address to continue
227     bool m_elem_pending_addr;    //!< next address packet is needed for prev element.
228 
229     ocsd_instr_info m_instr_info;  //!< instruction info for code follower - in address is the next to be decoded.
230 
231     etmv4_trace_info_t m_trace_info; //!< trace info for this trace run.
232 
233     bool m_prev_overflow;
234 
235     TrcAddrReturnStack m_return_stack;  //!< the address return stack.
236 
237 //** output element handling
238     OcsdGenElemStack m_out_elem;  //!< output element stack.
outElem()239     OcsdTraceElement &outElem() { return m_out_elem.getCurrElem(); };   //!< current  out element
240 };
241 
242 #endif // ARM_TRC_PKT_DECODE_ETMV4I_H_INCLUDED
243 
244 /* End of File trc_pkt_decode_etmv4i.h */
245