1 /**********************************************************
2 * Copyright 2009-2015 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * @file
28 * Common definitions for the VMware SVGA winsys.
29 *
30 * @author Jose Fonseca <jfonseca@vmware.com>
31 */
32
33
34 #ifndef VMW_SCREEN_H_
35 #define VMW_SCREEN_H_
36
37
38 #include "pipe/p_compiler.h"
39 #include "pipe/p_state.h"
40
41 #include "svga_winsys.h"
42 #include "pipebuffer/pb_buffer_fenced.h"
43 #include <os/os_thread.h>
44 #include <sys/types.h>
45
46 #define VMW_GMR_POOL_SIZE (16*1024*1024)
47 #define VMW_QUERY_POOL_SIZE (8192)
48 #define VMW_DEBUG_FLUSH_STACK 10
49
50 /*
51 * Something big, but arbitrary. The kernel reports an error if it can't
52 * handle this, and the svga driver will resort to multiple partial
53 * uploads.
54 */
55 #define VMW_MAX_BUFFER_SIZE (512*1024*1024)
56
57 struct pb_manager;
58 struct vmw_region;
59
60 struct vmw_cap_3d {
61 boolean has_cap;
62 SVGA3dDevCapResult result;
63 };
64
65 struct vmw_winsys_screen
66 {
67 struct svga_winsys_screen base;
68
69 struct {
70 int drm_fd;
71 uint32_t hwversion;
72 uint32_t num_cap_3d;
73 struct vmw_cap_3d *cap_3d;
74 uint64_t max_mob_memory;
75 uint64_t max_surface_memory;
76 uint64_t max_texture_size;
77 boolean have_drm_2_6;
78 boolean have_drm_2_9;
79 uint32_t drm_execbuf_version;
80 boolean have_drm_2_15;
81 boolean have_drm_2_16;
82 boolean have_drm_2_17;
83 boolean have_drm_2_18;
84 } ioctl;
85
86 struct {
87 struct pb_manager *gmr;
88 struct pb_manager *gmr_mm;
89 struct pb_manager *gmr_fenced;
90 struct pb_manager *gmr_slab;
91 struct pb_manager *gmr_slab_fenced;
92 struct pb_manager *query_mm;
93 struct pb_manager *query_fenced;
94 struct pb_manager *mob_fenced;
95 struct pb_manager *mob_cache;
96 struct pb_manager *mob_shader_slab;
97 struct pb_manager *mob_shader_slab_fenced;
98 } pools;
99
100 struct pb_fence_ops *fence_ops;
101
102 /*
103 * Screen instances
104 */
105 dev_t device;
106 int open_count;
107
108 cnd_t cs_cond;
109 mtx_t cs_mutex;
110
111 boolean force_coherent;
112 boolean cache_maps;
113 };
114
115
116 static inline struct vmw_winsys_screen *
vmw_winsys_screen(struct svga_winsys_screen * base)117 vmw_winsys_screen(struct svga_winsys_screen *base)
118 {
119 return (struct vmw_winsys_screen *)base;
120 }
121
122 /* */
123 uint32_t
124 vmw_region_size(struct vmw_region *region);
125
126 uint32
127 vmw_ioctl_context_create(struct vmw_winsys_screen *vws);
128
129 uint32
130 vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws,
131 boolean vgpu10);
132
133 void
134 vmw_ioctl_context_destroy(struct vmw_winsys_screen *vws,
135 uint32 cid);
136
137 uint32
138 vmw_ioctl_surface_create(struct vmw_winsys_screen *vws,
139 SVGA3dSurface1Flags flags,
140 SVGA3dSurfaceFormat format,
141 unsigned usage,
142 SVGA3dSize size,
143 uint32 numFaces,
144 uint32 numMipLevels,
145 unsigned sampleCount);
146 uint32
147 vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws,
148 SVGA3dSurfaceAllFlags flags,
149 SVGA3dSurfaceFormat format,
150 unsigned usage,
151 SVGA3dSize size,
152 uint32 numFaces,
153 uint32 numMipLevels,
154 unsigned sampleCount,
155 uint32 buffer_handle,
156 SVGA3dMSPattern multisamplePattern,
157 SVGA3dMSQualityLevel qualityLevel,
158 struct vmw_region **p_region);
159
160 int
161 vmw_ioctl_gb_surface_ref(struct vmw_winsys_screen *vws,
162 const struct winsys_handle *whandle,
163 SVGA3dSurfaceAllFlags *flags,
164 SVGA3dSurfaceFormat *format,
165 uint32_t *numMipLevels,
166 uint32_t *handle,
167 struct vmw_region **p_region);
168
169 void
170 vmw_ioctl_surface_destroy(struct vmw_winsys_screen *vws,
171 uint32 sid);
172
173 void
174 vmw_ioctl_command(struct vmw_winsys_screen *vws,
175 int32_t cid,
176 uint32_t throttle_us,
177 void *commands,
178 uint32_t size,
179 struct pipe_fence_handle **fence,
180 int32_t imported_fence_fd,
181 uint32_t flags);
182
183 struct vmw_region *
184 vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size);
185
186 void
187 vmw_ioctl_region_destroy(struct vmw_region *region);
188
189 struct SVGAGuestPtr
190 vmw_ioctl_region_ptr(struct vmw_region *region);
191
192 void *
193 vmw_ioctl_region_map(struct vmw_region *region);
194 void
195 vmw_ioctl_region_unmap(struct vmw_region *region);
196
197
198 int
199 vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws,
200 uint32_t handle, uint32_t flags);
201
202 int
203 vmw_ioctl_fence_signalled(struct vmw_winsys_screen *vws,
204 uint32_t handle, uint32_t flags);
205
206 void
207 vmw_ioctl_fence_unref(struct vmw_winsys_screen *vws,
208 uint32_t handle);
209
210 uint32
211 vmw_ioctl_shader_create(struct vmw_winsys_screen *vws,
212 SVGA3dShaderType type,
213 uint32 code_len);
214 void
215 vmw_ioctl_shader_destroy(struct vmw_winsys_screen *vws, uint32 shid);
216
217 int
218 vmw_ioctl_syncforcpu(struct vmw_region *region,
219 boolean dont_block,
220 boolean readonly,
221 boolean allow_cs);
222 void
223 vmw_ioctl_releasefromcpu(struct vmw_region *region,
224 boolean readonly,
225 boolean allow_cs);
226 /* Initialize parts of vmw_winsys_screen at startup:
227 */
228 boolean vmw_ioctl_init(struct vmw_winsys_screen *vws);
229 boolean vmw_pools_init(struct vmw_winsys_screen *vws);
230 boolean vmw_query_pools_init(struct vmw_winsys_screen *vws);
231 boolean vmw_mob_pools_init(struct vmw_winsys_screen *vws);
232 boolean vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws);
233
234 void vmw_ioctl_cleanup(struct vmw_winsys_screen *vws);
235 void vmw_pools_cleanup(struct vmw_winsys_screen *vws);
236
237 struct vmw_winsys_screen *vmw_winsys_create(int fd);
238 void vmw_winsys_destroy(struct vmw_winsys_screen *sws);
239 void vmw_winsys_screen_set_throttling(struct pipe_screen *screen,
240 uint32_t throttle_us);
241
242 struct pb_manager *
243 simple_fenced_bufmgr_create(struct pb_manager *provider,
244 struct pb_fence_ops *ops);
245 void
246 vmw_fences_signal(struct pb_fence_ops *fence_ops,
247 uint32_t signaled,
248 uint32_t emitted,
249 boolean has_emitted);
250
251 struct svga_winsys_gb_shader *
252 vmw_svga_winsys_shader_create(struct svga_winsys_screen *sws,
253 SVGA3dShaderType type,
254 const uint32 *bytecode,
255 uint32 bytecodeLen);
256 void
257 vmw_svga_winsys_shader_destroy(struct svga_winsys_screen *sws,
258 struct svga_winsys_gb_shader *shader);
259
260 #endif /* VMW_SCREEN_H_ */
261