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1 /*
2  * Copyright © 2014 Connor Abbott
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23 
24 #include "nir_instr_set.h"
25 #include "nir_vla.h"
26 #include "util/half_float.h"
27 
28 static bool
src_is_ssa(nir_src * src,void * data)29 src_is_ssa(nir_src *src, void *data)
30 {
31    (void) data;
32    return src->is_ssa;
33 }
34 
35 static bool
dest_is_ssa(nir_dest * dest,void * data)36 dest_is_ssa(nir_dest *dest, void *data)
37 {
38    (void) data;
39    return dest->is_ssa;
40 }
41 
42 ASSERTED static inline bool
instr_each_src_and_dest_is_ssa(const nir_instr * instr)43 instr_each_src_and_dest_is_ssa(const nir_instr *instr)
44 {
45    if (!nir_foreach_dest((nir_instr *)instr, dest_is_ssa, NULL) ||
46        !nir_foreach_src((nir_instr *)instr, src_is_ssa, NULL))
47       return false;
48 
49    return true;
50 }
51 
52 /* This function determines if uses of an instruction can safely be rewritten
53  * to use another identical instruction instead. Note that this function must
54  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
55  * instructions that pass this test will be handed on to those functions, and
56  * conversely they must handle everything that this function returns true for.
57  */
58 static bool
instr_can_rewrite(const nir_instr * instr)59 instr_can_rewrite(const nir_instr *instr)
60 {
61    /* We only handle SSA. */
62    assert(instr_each_src_and_dest_is_ssa(instr));
63 
64    switch (instr->type) {
65    case nir_instr_type_alu:
66    case nir_instr_type_deref:
67    case nir_instr_type_tex:
68    case nir_instr_type_load_const:
69    case nir_instr_type_phi:
70       return true;
71    case nir_instr_type_intrinsic:
72       return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
73    case nir_instr_type_call:
74    case nir_instr_type_jump:
75    case nir_instr_type_ssa_undef:
76       return false;
77    case nir_instr_type_parallel_copy:
78    default:
79       unreachable("Invalid instruction type");
80    }
81 
82    return false;
83 }
84 
85 
86 #define HASH(hash, data) XXH32(&(data), sizeof(data), hash)
87 
88 static uint32_t
hash_src(uint32_t hash,const nir_src * src)89 hash_src(uint32_t hash, const nir_src *src)
90 {
91    assert(src->is_ssa);
92    hash = HASH(hash, src->ssa);
93    return hash;
94 }
95 
96 static uint32_t
hash_alu_src(uint32_t hash,const nir_alu_src * src,unsigned num_components)97 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
98 {
99    hash = HASH(hash, src->abs);
100    hash = HASH(hash, src->negate);
101 
102    for (unsigned i = 0; i < num_components; i++)
103       hash = HASH(hash, src->swizzle[i]);
104 
105    hash = hash_src(hash, &src->src);
106    return hash;
107 }
108 
109 static uint32_t
hash_alu(uint32_t hash,const nir_alu_instr * instr)110 hash_alu(uint32_t hash, const nir_alu_instr *instr)
111 {
112    hash = HASH(hash, instr->op);
113 
114    /* We explicitly don't hash instr->exact. */
115    uint8_t flags = instr->no_signed_wrap |
116                    instr->no_unsigned_wrap << 1;
117    hash = HASH(hash, flags);
118 
119    hash = HASH(hash, instr->dest.dest.ssa.num_components);
120    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
121 
122    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
123       assert(nir_op_infos[instr->op].num_inputs >= 2);
124 
125       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
126                                     nir_ssa_alu_instr_src_components(instr, 0));
127       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
128                                     nir_ssa_alu_instr_src_components(instr, 1));
129       /* For commutative operations, we need some commutative way of
130        * combining the hashes.  One option would be to XOR them but that
131        * means that anything with two identical sources will hash to 0 and
132        * that's common enough we probably don't want the guaranteed
133        * collision.  Either addition or multiplication will also work.
134        */
135       hash = hash0 * hash1;
136 
137       for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
138          hash = hash_alu_src(hash, &instr->src[i],
139                              nir_ssa_alu_instr_src_components(instr, i));
140       }
141    } else {
142       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
143          hash = hash_alu_src(hash, &instr->src[i],
144                              nir_ssa_alu_instr_src_components(instr, i));
145       }
146    }
147 
148    return hash;
149 }
150 
151 static uint32_t
hash_deref(uint32_t hash,const nir_deref_instr * instr)152 hash_deref(uint32_t hash, const nir_deref_instr *instr)
153 {
154    hash = HASH(hash, instr->deref_type);
155    hash = HASH(hash, instr->modes);
156    hash = HASH(hash, instr->type);
157 
158    if (instr->deref_type == nir_deref_type_var)
159       return HASH(hash, instr->var);
160 
161    hash = hash_src(hash, &instr->parent);
162 
163    switch (instr->deref_type) {
164    case nir_deref_type_struct:
165       hash = HASH(hash, instr->strct.index);
166       break;
167 
168    case nir_deref_type_array:
169    case nir_deref_type_ptr_as_array:
170       hash = hash_src(hash, &instr->arr.index);
171       break;
172 
173    case nir_deref_type_cast:
174       hash = HASH(hash, instr->cast.ptr_stride);
175       hash = HASH(hash, instr->cast.align_mul);
176       hash = HASH(hash, instr->cast.align_offset);
177       break;
178 
179    case nir_deref_type_var:
180    case nir_deref_type_array_wildcard:
181       /* Nothing to do */
182       break;
183 
184    default:
185       unreachable("Invalid instruction deref type");
186    }
187 
188    return hash;
189 }
190 
191 static uint32_t
hash_load_const(uint32_t hash,const nir_load_const_instr * instr)192 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
193 {
194    hash = HASH(hash, instr->def.num_components);
195 
196    if (instr->def.bit_size == 1) {
197       for (unsigned i = 0; i < instr->def.num_components; i++) {
198          uint8_t b = instr->value[i].b;
199          hash = HASH(hash, b);
200       }
201    } else {
202       unsigned size = instr->def.num_components * sizeof(*instr->value);
203       hash = XXH32(instr->value, size, hash);
204    }
205 
206    return hash;
207 }
208 
209 static int
cmp_phi_src(const void * data1,const void * data2)210 cmp_phi_src(const void *data1, const void *data2)
211 {
212    nir_phi_src *src1 = *(nir_phi_src **)data1;
213    nir_phi_src *src2 = *(nir_phi_src **)data2;
214    return src1->pred - src2->pred;
215 }
216 
217 static uint32_t
hash_phi(uint32_t hash,const nir_phi_instr * instr)218 hash_phi(uint32_t hash, const nir_phi_instr *instr)
219 {
220    hash = HASH(hash, instr->instr.block);
221 
222    /* sort sources by predecessor, since the order shouldn't matter */
223    unsigned num_preds = instr->instr.block->predecessors->entries;
224    NIR_VLA(nir_phi_src *, srcs, num_preds);
225    unsigned i = 0;
226    nir_foreach_phi_src(src, instr) {
227       srcs[i++] = src;
228    }
229 
230    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
231 
232    for (i = 0; i < num_preds; i++) {
233       hash = hash_src(hash, &srcs[i]->src);
234       hash = HASH(hash, srcs[i]->pred);
235    }
236 
237    return hash;
238 }
239 
240 static uint32_t
hash_intrinsic(uint32_t hash,const nir_intrinsic_instr * instr)241 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
242 {
243    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
244    hash = HASH(hash, instr->intrinsic);
245 
246    if (info->has_dest) {
247       hash = HASH(hash, instr->dest.ssa.num_components);
248       hash = HASH(hash, instr->dest.ssa.bit_size);
249    }
250 
251    hash = XXH32(instr->const_index, info->num_indices * sizeof(instr->const_index[0]), hash);
252 
253    for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++)
254       hash = hash_src(hash, &instr->src[i]);
255 
256    return hash;
257 }
258 
259 static uint32_t
hash_tex(uint32_t hash,const nir_tex_instr * instr)260 hash_tex(uint32_t hash, const nir_tex_instr *instr)
261 {
262    hash = HASH(hash, instr->op);
263    hash = HASH(hash, instr->num_srcs);
264 
265    for (unsigned i = 0; i < instr->num_srcs; i++) {
266       hash = HASH(hash, instr->src[i].src_type);
267       hash = hash_src(hash, &instr->src[i].src);
268    }
269 
270    hash = HASH(hash, instr->coord_components);
271    hash = HASH(hash, instr->sampler_dim);
272    hash = HASH(hash, instr->is_array);
273    hash = HASH(hash, instr->is_shadow);
274    hash = HASH(hash, instr->is_new_style_shadow);
275    unsigned component = instr->component;
276    hash = HASH(hash, component);
277    for (unsigned i = 0; i < 4; ++i)
278       for (unsigned j = 0; j < 2; ++j)
279          hash = HASH(hash, instr->tg4_offsets[i][j]);
280    hash = HASH(hash, instr->texture_index);
281    hash = HASH(hash, instr->sampler_index);
282    hash = HASH(hash, instr->texture_non_uniform);
283    hash = HASH(hash, instr->sampler_non_uniform);
284 
285    return hash;
286 }
287 
288 /* Computes a hash of an instruction for use in a hash table. Note that this
289  * will only work for instructions where instr_can_rewrite() returns true, and
290  * it should return identical hashes for two instructions that are the same
291  * according nir_instrs_equal().
292  */
293 
294 static uint32_t
hash_instr(const void * data)295 hash_instr(const void *data)
296 {
297    const nir_instr *instr = data;
298    uint32_t hash = 0;
299 
300    switch (instr->type) {
301    case nir_instr_type_alu:
302       hash = hash_alu(hash, nir_instr_as_alu(instr));
303       break;
304    case nir_instr_type_deref:
305       hash = hash_deref(hash, nir_instr_as_deref(instr));
306       break;
307    case nir_instr_type_load_const:
308       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
309       break;
310    case nir_instr_type_phi:
311       hash = hash_phi(hash, nir_instr_as_phi(instr));
312       break;
313    case nir_instr_type_intrinsic:
314       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
315       break;
316    case nir_instr_type_tex:
317       hash = hash_tex(hash, nir_instr_as_tex(instr));
318       break;
319    default:
320       unreachable("Invalid instruction type");
321    }
322 
323    return hash;
324 }
325 
326 bool
nir_srcs_equal(nir_src src1,nir_src src2)327 nir_srcs_equal(nir_src src1, nir_src src2)
328 {
329    if (src1.is_ssa) {
330       if (src2.is_ssa) {
331          return src1.ssa == src2.ssa;
332       } else {
333          return false;
334       }
335    } else {
336       if (src2.is_ssa) {
337          return false;
338       } else {
339          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
340             return false;
341 
342          if (src1.reg.indirect) {
343             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
344                return false;
345          }
346 
347          return src1.reg.reg == src2.reg.reg &&
348                 src1.reg.base_offset == src2.reg.base_offset;
349       }
350    }
351 }
352 
353 /**
354  * If the \p s is an SSA value that was generated by a negation instruction,
355  * that instruction is returned as a \c nir_alu_instr.  Otherwise \c NULL is
356  * returned.
357  */
358 static nir_alu_instr *
get_neg_instr(nir_src s)359 get_neg_instr(nir_src s)
360 {
361    nir_alu_instr *alu = nir_src_as_alu_instr(s);
362 
363    return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
364           ? alu : NULL;
365 }
366 
367 bool
nir_const_value_negative_equal(nir_const_value c1,nir_const_value c2,nir_alu_type full_type)368 nir_const_value_negative_equal(nir_const_value c1,
369                                nir_const_value c2,
370                                nir_alu_type full_type)
371 {
372    assert(nir_alu_type_get_base_type(full_type) != nir_type_invalid);
373    assert(nir_alu_type_get_type_size(full_type) != 0);
374 
375    switch (full_type) {
376    case nir_type_float16:
377       return _mesa_half_to_float(c1.u16) == -_mesa_half_to_float(c2.u16);
378 
379    case nir_type_float32:
380       return c1.f32 == -c2.f32;
381 
382    case nir_type_float64:
383       return c1.f64 == -c2.f64;
384 
385    case nir_type_int8:
386    case nir_type_uint8:
387       return c1.i8 == -c2.i8;
388 
389    case nir_type_int16:
390    case nir_type_uint16:
391       return c1.i16 == -c2.i16;
392 
393    case nir_type_int32:
394    case nir_type_uint32:
395       return c1.i32 == -c2.i32;
396 
397    case nir_type_int64:
398    case nir_type_uint64:
399       return c1.i64 == -c2.i64;
400 
401    default:
402       break;
403    }
404 
405    return false;
406 }
407 
408 /**
409  * Shallow compare of ALU srcs to determine if one is the negation of the other
410  *
411  * This function detects cases where \p alu1 is a constant and \p alu2 is a
412  * constant that is its negation.  It will also detect cases where \p alu2 is
413  * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
414  *
415  * This function does not detect the general case when \p alu1 and \p alu2 are
416  * SSA values that are the negations of each other (e.g., \p alu1 represents
417  * (a * b) and \p alu2 represents (-a * b)).
418  *
419  * \warning
420  * It is the responsibility of the caller to ensure that the component counts,
421  * write masks, and base types of the sources being compared are compatible.
422  */
423 bool
nir_alu_srcs_negative_equal(const nir_alu_instr * alu1,const nir_alu_instr * alu2,unsigned src1,unsigned src2)424 nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
425                             const nir_alu_instr *alu2,
426                             unsigned src1, unsigned src2)
427 {
428 #ifndef NDEBUG
429    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
430       assert(nir_alu_instr_channel_used(alu1, src1, i) ==
431              nir_alu_instr_channel_used(alu2, src2, i));
432    }
433 
434    if (nir_op_infos[alu1->op].input_types[src1] == nir_type_float) {
435       assert(nir_op_infos[alu1->op].input_types[src1] ==
436              nir_op_infos[alu2->op].input_types[src2]);
437    } else {
438       assert(nir_op_infos[alu1->op].input_types[src1] == nir_type_int);
439       assert(nir_op_infos[alu2->op].input_types[src2] == nir_type_int);
440    }
441 #endif
442 
443    if (alu1->src[src1].abs != alu2->src[src2].abs)
444       return false;
445 
446    bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
447 
448    /* Handling load_const instructions is tricky. */
449 
450    const nir_const_value *const const1 =
451       nir_src_as_const_value(alu1->src[src1].src);
452 
453    if (const1 != NULL) {
454       /* Assume that constant folding will eliminate source mods and unary
455        * ops.
456        */
457       if (parity)
458          return false;
459 
460       const nir_const_value *const const2 =
461          nir_src_as_const_value(alu2->src[src2].src);
462 
463       if (const2 == NULL)
464          return false;
465 
466       if (nir_src_bit_size(alu1->src[src1].src) !=
467           nir_src_bit_size(alu2->src[src2].src))
468          return false;
469 
470       const nir_alu_type full_type = nir_op_infos[alu1->op].input_types[src1] |
471                                      nir_src_bit_size(alu1->src[src1].src);
472       for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
473          if (nir_alu_instr_channel_used(alu1, src1, i) &&
474              !nir_const_value_negative_equal(const1[alu1->src[src1].swizzle[i]],
475                                              const2[alu2->src[src2].swizzle[i]],
476                                              full_type))
477             return false;
478       }
479 
480       return true;
481    }
482 
483    uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
484    nir_src alu1_actual_src;
485    nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
486 
487    if (neg1) {
488       parity = !parity;
489       alu1_actual_src = neg1->src[0].src;
490 
491       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
492          alu1_swizzle[i] = neg1->src[0].swizzle[i];
493    } else {
494       alu1_actual_src = alu1->src[src1].src;
495 
496       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
497          alu1_swizzle[i] = i;
498    }
499 
500    uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
501    nir_src alu2_actual_src;
502    nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
503 
504    if (neg2) {
505       parity = !parity;
506       alu2_actual_src = neg2->src[0].src;
507 
508       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
509          alu2_swizzle[i] = neg2->src[0].swizzle[i];
510    } else {
511       alu2_actual_src = alu2->src[src2].src;
512 
513       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
514          alu2_swizzle[i] = i;
515    }
516 
517    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
518       if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
519           alu2_swizzle[alu2->src[src2].swizzle[i]])
520          return false;
521    }
522 
523    return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
524 }
525 
526 bool
nir_alu_srcs_equal(const nir_alu_instr * alu1,const nir_alu_instr * alu2,unsigned src1,unsigned src2)527 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
528                    unsigned src1, unsigned src2)
529 {
530    if (alu1->src[src1].abs != alu2->src[src2].abs ||
531        alu1->src[src1].negate != alu2->src[src2].negate)
532       return false;
533 
534    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
535       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
536          return false;
537    }
538 
539    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
540 }
541 
542 /* Returns "true" if two instructions are equal. Note that this will only
543  * work for the subset of instructions defined by instr_can_rewrite(). Also,
544  * it should only return "true" for instructions that hash_instr() will return
545  * the same hash for (ignoring collisions, of course).
546  */
547 
548 bool
nir_instrs_equal(const nir_instr * instr1,const nir_instr * instr2)549 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
550 {
551    assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2));
552 
553    if (instr1->type != instr2->type)
554       return false;
555 
556    switch (instr1->type) {
557    case nir_instr_type_alu: {
558       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
559       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
560 
561       if (alu1->op != alu2->op)
562          return false;
563 
564       /* We explicitly don't compare instr->exact. */
565 
566       if (alu1->no_signed_wrap != alu2->no_signed_wrap)
567          return false;
568 
569       if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
570          return false;
571 
572       /* TODO: We can probably acutally do something more inteligent such
573        * as allowing different numbers and taking a maximum or something
574        * here */
575       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
576          return false;
577 
578       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
579          return false;
580 
581       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
582          if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
583               !nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
584              (!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
585               !nir_alu_srcs_equal(alu1, alu2, 1, 0)))
586             return false;
587 
588          for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
589             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
590                return false;
591          }
592       } else {
593          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
594             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
595                return false;
596          }
597       }
598       return true;
599    }
600    case nir_instr_type_deref: {
601       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
602       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
603 
604       if (deref1->deref_type != deref2->deref_type ||
605           deref1->modes != deref2->modes ||
606           deref1->type != deref2->type)
607          return false;
608 
609       if (deref1->deref_type == nir_deref_type_var)
610          return deref1->var == deref2->var;
611 
612       if (!nir_srcs_equal(deref1->parent, deref2->parent))
613          return false;
614 
615       switch (deref1->deref_type) {
616       case nir_deref_type_struct:
617          if (deref1->strct.index != deref2->strct.index)
618             return false;
619          break;
620 
621       case nir_deref_type_array:
622       case nir_deref_type_ptr_as_array:
623          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
624             return false;
625          break;
626 
627       case nir_deref_type_cast:
628          if (deref1->cast.ptr_stride != deref2->cast.ptr_stride ||
629              deref1->cast.align_mul != deref2->cast.align_mul ||
630              deref1->cast.align_offset != deref2->cast.align_offset)
631             return false;
632          break;
633 
634       case nir_deref_type_var:
635       case nir_deref_type_array_wildcard:
636          /* Nothing to do */
637          break;
638 
639       default:
640          unreachable("Invalid instruction deref type");
641       }
642       return true;
643    }
644    case nir_instr_type_tex: {
645       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
646       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
647 
648       if (tex1->op != tex2->op)
649          return false;
650 
651       if (tex1->num_srcs != tex2->num_srcs)
652          return false;
653       for (unsigned i = 0; i < tex1->num_srcs; i++) {
654          if (tex1->src[i].src_type != tex2->src[i].src_type ||
655              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
656             return false;
657          }
658       }
659 
660       if (tex1->coord_components != tex2->coord_components ||
661           tex1->sampler_dim != tex2->sampler_dim ||
662           tex1->is_array != tex2->is_array ||
663           tex1->is_shadow != tex2->is_shadow ||
664           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
665           tex1->component != tex2->component ||
666          tex1->texture_index != tex2->texture_index ||
667          tex1->sampler_index != tex2->sampler_index) {
668          return false;
669       }
670 
671       if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
672                  sizeof(tex1->tg4_offsets)))
673          return false;
674 
675       return true;
676    }
677    case nir_instr_type_load_const: {
678       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
679       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
680 
681       if (load1->def.num_components != load2->def.num_components)
682          return false;
683 
684       if (load1->def.bit_size != load2->def.bit_size)
685          return false;
686 
687       if (load1->def.bit_size == 1) {
688          for (unsigned i = 0; i < load1->def.num_components; ++i) {
689             if (load1->value[i].b != load2->value[i].b)
690                return false;
691          }
692       } else {
693          unsigned size = load1->def.num_components * sizeof(*load1->value);
694          if (memcmp(load1->value, load2->value, size) != 0)
695             return false;
696       }
697       return true;
698    }
699    case nir_instr_type_phi: {
700       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
701       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
702 
703       if (phi1->instr.block != phi2->instr.block)
704          return false;
705 
706       nir_foreach_phi_src(src1, phi1) {
707          nir_foreach_phi_src(src2, phi2) {
708             if (src1->pred == src2->pred) {
709                if (!nir_srcs_equal(src1->src, src2->src))
710                   return false;
711 
712                break;
713             }
714          }
715       }
716 
717       return true;
718    }
719    case nir_instr_type_intrinsic: {
720       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
721       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
722       const nir_intrinsic_info *info =
723          &nir_intrinsic_infos[intrinsic1->intrinsic];
724 
725       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
726           intrinsic1->num_components != intrinsic2->num_components)
727          return false;
728 
729       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
730                             intrinsic2->dest.ssa.num_components)
731          return false;
732 
733       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
734                             intrinsic2->dest.ssa.bit_size)
735          return false;
736 
737       for (unsigned i = 0; i < info->num_srcs; i++) {
738          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
739             return false;
740       }
741 
742       for (unsigned i = 0; i < info->num_indices; i++) {
743          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
744             return false;
745       }
746 
747       return true;
748    }
749    case nir_instr_type_call:
750    case nir_instr_type_jump:
751    case nir_instr_type_ssa_undef:
752    case nir_instr_type_parallel_copy:
753    default:
754       unreachable("Invalid instruction type");
755    }
756 
757    unreachable("All cases in the above switch should return");
758 }
759 
760 static nir_ssa_def *
nir_instr_get_dest_ssa_def(nir_instr * instr)761 nir_instr_get_dest_ssa_def(nir_instr *instr)
762 {
763    switch (instr->type) {
764    case nir_instr_type_alu:
765       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
766       return &nir_instr_as_alu(instr)->dest.dest.ssa;
767    case nir_instr_type_deref:
768       assert(nir_instr_as_deref(instr)->dest.is_ssa);
769       return &nir_instr_as_deref(instr)->dest.ssa;
770    case nir_instr_type_load_const:
771       return &nir_instr_as_load_const(instr)->def;
772    case nir_instr_type_phi:
773       assert(nir_instr_as_phi(instr)->dest.is_ssa);
774       return &nir_instr_as_phi(instr)->dest.ssa;
775    case nir_instr_type_intrinsic:
776       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
777       return &nir_instr_as_intrinsic(instr)->dest.ssa;
778    case nir_instr_type_tex:
779       assert(nir_instr_as_tex(instr)->dest.is_ssa);
780       return &nir_instr_as_tex(instr)->dest.ssa;
781    default:
782       unreachable("We never ask for any of these");
783    }
784 }
785 
786 static bool
cmp_func(const void * data1,const void * data2)787 cmp_func(const void *data1, const void *data2)
788 {
789    return nir_instrs_equal(data1, data2);
790 }
791 
792 struct set *
nir_instr_set_create(void * mem_ctx)793 nir_instr_set_create(void *mem_ctx)
794 {
795    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
796 }
797 
798 void
nir_instr_set_destroy(struct set * instr_set)799 nir_instr_set_destroy(struct set *instr_set)
800 {
801    _mesa_set_destroy(instr_set, NULL);
802 }
803 
804 bool
nir_instr_set_add_or_rewrite(struct set * instr_set,nir_instr * instr)805 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
806 {
807    if (!instr_can_rewrite(instr))
808       return false;
809 
810    struct set_entry *e = _mesa_set_search_or_add(instr_set, instr);
811    nir_instr *match = (nir_instr *) e->key;
812    if (match != instr) {
813       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
814       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
815 
816       /* It's safe to replace an exact instruction with an inexact one as
817        * long as we make it exact.  If we got here, the two instructions are
818        * exactly identical in every other way so, once we've set the exact
819        * bit, they are the same.
820        */
821       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
822          nir_instr_as_alu(match)->exact = true;
823 
824       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
825       return true;
826    }
827 
828    return false;
829 }
830 
831 void
nir_instr_set_remove(struct set * instr_set,nir_instr * instr)832 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
833 {
834    if (!instr_can_rewrite(instr))
835       return;
836 
837    struct set_entry *entry = _mesa_set_search(instr_set, instr);
838    if (entry)
839       _mesa_set_remove(instr_set, entry);
840 }
841 
842