| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | orn-diagnostics.s | 6 orn z5.b, z5.b, #0xfa label
11 orn z5.b, z5.b, #0xfff9 label
16 orn z5.h, z5.h, #0xfffa label
21 orn z5.h, z5.h, #0xfffffff9 label
26 orn z5.s, z5.s, #0xfffffffa label
31 orn z5.s, z5.s, #0xffffffffffffff9 label
36 orn z15.d, z15.d, #0xfffffffffffffffa label
44 orn z7.d, z8.d, #254 label
49 orn z7.d, z8.d, #254 label
58 orn p0.h, p0/z, p0.h, p1.h label
[all …]
|
| D | orn.s | 10 orn z5.b, z5.b, #0xf9 label
16 orn z23.h, z23.h, #0xfff9 label
22 orn z0.s, z0.s, #0xfffffff9 label
28 orn z0.d, z0.d, #0xfffffffffffffff9 label
34 orn z5.b, z5.b, #0x6 label
40 orn z23.h, z23.h, #0x6 label
46 orn z0.s, z0.s, #0x6 label
52 orn z0.d, z0.d, #0x6 label
58 orn p0.b, p0/z, p0.b, p0.b label
64 orn p15.b, p15/z, p15.b, p15.b label
[all …]
|
| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | rv32zbbp-valid.s | 27 orn t0, t1, t2 label
|
| D | rv32zbbp-invalid.s | 6 orn t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 185 orn r0, r1, #1 label
187 orn r0, r1, r2 label
189 orn r0, r1, r2, LSL #1 label
|
| D | m4-int.s | 191 orn r0, r1, #1 label
193 orn r0, r1, r2 label
195 orn r0, r1, r2, LSL #1 label
|
| /external/vixl/test/aarch64/ |
| D | test-api-movprfx-aarch64.cc | 1103 __ orn(z5.VnS(), z5.VnS(), 4); in TEST() local
1106 __ orn(z5.VnS(), z5.VnS(), 4); in TEST() local
1438 __ orn(z14.VnS(), z14.VnS(), 4); in TEST() local
1441 __ orn(z14.VnS(), z14.VnS(), 4); in TEST() local
|
| D | test-trace-aarch64.cc | 266 __ orn(w28, w29, w2); in GenerateTestSequenceBase() local
267 __ orn(x3, x4, x5); in GenerateTestSequenceBase() local
1308 __ orn(v13.V16B(), v11.V16B(), v31.V16B()); in GenerateTestSequenceNEON() local
1309 __ orn(v22.V8B(), v16.V8B(), v22.V8B()); in GenerateTestSequenceNEON() local
|
| D | test-assembler-aarch64.cc | 549 TEST(orn) { in TEST() argument
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 1306 orn x3, x5, x7, asr #2 label
1307 orn w2, w5, w29 label
|
| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 6070 void Assembler::orn(const PRegisterWithLaneSize& pd, in orn() function in vixl::aarch64::Assembler
6362 void Assembler::orn(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in orn() function in vixl::aarch64::Assembler
|
| D | assembler-aarch64.cc | 621 void Assembler::orn(const Register& rd, in orn() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 1243 LogicVRegister Simulator::orn(VectorFormat vform, in orn() function in vixl::aarch64::Simulator
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2720 void orn(Register rd, Register rn, const Operand& operand) { in orn() function
|
| D | assembler-aarch32.cc | 7695 void Assembler::orn(Condition cond, in orn() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1999 void Disassembler::orn(Condition cond, in orn() function in vixl::aarch32::Disassembler
|