1 /* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef TEGRA_GIC_H 9 #define TEGRA_GIC_H 10 11 #include <common/interrupt_props.h> 12 13 /******************************************************************************* 14 * Per-CPU struct describing FIQ state to be stored 15 ******************************************************************************/ 16 typedef struct pcpu_fiq_state { 17 uint64_t elr_el3; 18 uint64_t spsr_el3; 19 } pcpu_fiq_state_t; 20 21 /******************************************************************************* 22 * Fucntion declarations 23 ******************************************************************************/ 24 void tegra_gic_cpuif_deactivate(void); 25 void tegra_gic_init(void); 26 void tegra_gic_pcpu_init(void); 27 void tegra_gic_setup(const interrupt_prop_t *interrupt_props, 28 unsigned int interrupt_props_num); 29 30 #endif /* TEGRA_GIC_H */ 31