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1 /*
2  * Copyright © 2009 Red Hat Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  */
26 /*
27  */
28 #include <assert.h>
29 #include <errno.h>
30 #include <stdlib.h>
31 #include "libdrm_macros.h"
32 #include "radeon_cs.h"
33 #include "radeon_bo_int.h"
34 #include "radeon_cs_int.h"
35 
36 struct rad_sizes {
37     int32_t op_read;
38     int32_t op_gart_write;
39     int32_t op_vram_write;
40 };
41 
radeon_cs_setup_bo(struct radeon_cs_space_check * sc,struct rad_sizes * sizes)42 static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct rad_sizes *sizes)
43 {
44     uint32_t read_domains, write_domain;
45     struct radeon_bo_int *bo;
46 
47     bo = sc->bo;
48     sc->new_accounted = 0;
49     read_domains = sc->read_domains;
50     write_domain = sc->write_domain;
51 
52     /* legacy needs a static check */
53     if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) {
54         bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
55         return 0;
56     }
57 
58     /* already accounted this bo */
59     if (write_domain && (write_domain == bo->space_accounted)) {
60         sc->new_accounted = bo->space_accounted;
61         return 0;
62     }
63     if (read_domains && ((read_domains << 16) == bo->space_accounted)) {
64         sc->new_accounted = bo->space_accounted;
65         return 0;
66     }
67 
68     if (bo->space_accounted == 0) {
69         if (write_domain) {
70             if (write_domain == RADEON_GEM_DOMAIN_VRAM)
71                 sizes->op_vram_write += bo->size;
72             else if (write_domain == RADEON_GEM_DOMAIN_GTT)
73                 sizes->op_gart_write += bo->size;
74             sc->new_accounted = write_domain;
75         } else {
76             sizes->op_read += bo->size;
77             sc->new_accounted = read_domains << 16;
78         }
79     } else {
80         uint16_t old_read, old_write;
81 
82         old_read = bo->space_accounted >> 16;
83         old_write = bo->space_accounted & 0xffff;
84 
85         if (write_domain && (old_read & write_domain)) {
86             sc->new_accounted = write_domain;
87             /* moving from read to a write domain */
88             if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
89                 sizes->op_read -= bo->size;
90                 sizes->op_vram_write += bo->size;
91             } else if (write_domain == RADEON_GEM_DOMAIN_GTT) {
92                 sizes->op_read -= bo->size;
93                 sizes->op_gart_write += bo->size;
94             }
95         } else if (read_domains & old_write) {
96             sc->new_accounted = bo->space_accounted & 0xffff;
97         } else {
98             /* rewrite the domains */
99             if (write_domain != old_write)
100                 fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
101             if (read_domains != old_read)
102                fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
103             return RADEON_CS_SPACE_FLUSH;
104         }
105     }
106     return 0;
107 }
108 
radeon_cs_do_space_check(struct radeon_cs_int * cs,struct radeon_cs_space_check * new_tmp)109 static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_space_check *new_tmp)
110 {
111     struct radeon_cs_manager *csm = cs->csm;
112     int i;
113     struct radeon_bo_int *bo;
114     struct rad_sizes sizes;
115     int ret;
116 
117     /* check the totals for this operation */
118 
119     if (cs->bo_count == 0 && !new_tmp)
120         return 0;
121 
122     memset(&sizes, 0, sizeof(struct rad_sizes));
123 
124     /* prepare */
125     for (i = 0; i < cs->bo_count; i++) {
126         ret = radeon_cs_setup_bo(&cs->bos[i], &sizes);
127         if (ret)
128             return ret;
129     }
130 
131     if (new_tmp) {
132         ret = radeon_cs_setup_bo(new_tmp, &sizes);
133         if (ret)
134             return ret;
135     }
136 
137     if (sizes.op_read < 0)
138         sizes.op_read = 0;
139 
140     /* check sizes - operation first */
141     if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) ||
142         (sizes.op_vram_write > csm->vram_limit)) {
143         return RADEON_CS_SPACE_OP_TO_BIG;
144     }
145 
146     if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) ||
147         ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) {
148         return RADEON_CS_SPACE_FLUSH;
149     }
150 
151     csm->gart_write_used += sizes.op_gart_write;
152     csm->vram_write_used += sizes.op_vram_write;
153     csm->read_used += sizes.op_read;
154     /* commit */
155     for (i = 0; i < cs->bo_count; i++) {
156         bo = cs->bos[i].bo;
157         bo->space_accounted = cs->bos[i].new_accounted;
158     }
159     if (new_tmp)
160         new_tmp->bo->space_accounted = new_tmp->new_accounted;
161 
162     return RADEON_CS_SPACE_OK;
163 }
164 
165 drm_public void
radeon_cs_space_add_persistent_bo(struct radeon_cs * cs,struct radeon_bo * bo,uint32_t read_domains,uint32_t write_domain)166 radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *bo,
167                                   uint32_t read_domains, uint32_t write_domain)
168 {
169     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
170     struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
171     int i;
172     for (i = 0; i < csi->bo_count; i++) {
173         if (csi->bos[i].bo == boi &&
174             csi->bos[i].read_domains == read_domains &&
175             csi->bos[i].write_domain == write_domain)
176             return;
177     }
178     radeon_bo_ref(bo);
179     i = csi->bo_count;
180     csi->bos[i].bo = boi;
181     csi->bos[i].read_domains = read_domains;
182     csi->bos[i].write_domain = write_domain;
183     csi->bos[i].new_accounted = 0;
184     csi->bo_count++;
185 
186     assert(csi->bo_count < MAX_SPACE_BOS);
187 }
188 
radeon_cs_check_space_internal(struct radeon_cs_int * cs,struct radeon_cs_space_check * tmp_bo)189 static int radeon_cs_check_space_internal(struct radeon_cs_int *cs,
190                       struct radeon_cs_space_check *tmp_bo)
191 {
192     int ret;
193     int flushed = 0;
194 
195 again:
196     ret = radeon_cs_do_space_check(cs, tmp_bo);
197     if (ret == RADEON_CS_SPACE_OP_TO_BIG)
198         return -1;
199     if (ret == RADEON_CS_SPACE_FLUSH) {
200         (*cs->space_flush_fn)(cs->space_flush_data);
201         if (flushed)
202             return -1;
203         flushed = 1;
204         goto again;
205     }
206     return 0;
207 }
208 
209 drm_public int
radeon_cs_space_check_with_bo(struct radeon_cs * cs,struct radeon_bo * bo,uint32_t read_domains,uint32_t write_domain)210 radeon_cs_space_check_with_bo(struct radeon_cs *cs, struct radeon_bo *bo,
211                               uint32_t read_domains, uint32_t write_domain)
212 {
213     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
214     struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
215     struct radeon_cs_space_check temp_bo;
216 
217     int ret = 0;
218 
219     if (bo) {
220         temp_bo.bo = boi;
221         temp_bo.read_domains = read_domains;
222         temp_bo.write_domain = write_domain;
223         temp_bo.new_accounted = 0;
224     }
225 
226     ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL);
227     return ret;
228 }
229 
radeon_cs_space_check(struct radeon_cs * cs)230 drm_public int radeon_cs_space_check(struct radeon_cs *cs)
231 {
232     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
233     return radeon_cs_check_space_internal(csi, NULL);
234 }
235 
radeon_cs_space_reset_bos(struct radeon_cs * cs)236 drm_public void radeon_cs_space_reset_bos(struct radeon_cs *cs)
237 {
238     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
239     int i;
240     for (i = 0; i < csi->bo_count; i++) {
241         radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo);
242         csi->bos[i].bo = NULL;
243         csi->bos[i].read_domains = 0;
244         csi->bos[i].write_domain = 0;
245         csi->bos[i].new_accounted = 0;
246     }
247     csi->bo_count = 0;
248 }
249