| /external/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hisi_dvfs.c | 106 uint32_t reg0 = 0; in acpu_dvfs_syspll_cfg() local
190 unsigned int reg0 = 0; in acpu_dvfs_freq_ascend() local
400 unsigned int reg0 = 0; in acpu_dvfs_freq_descend() local
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| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | idct32x32_msa.c | 45 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
129 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
355 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
435 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
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| D | txfm_macros_msa.h | 16 #define DOTP_CONST_PAIR(reg0, reg1, cnst0, cnst1, out0, out1) \ argument
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| D | idct16x16_msa.c | 16 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_rows_msa() local
110 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_columns_addblk_msa() local
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| /external/libyuv/files/source/ |
| D | compare_msa.cc | 59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
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| D | scale_msa.cc | 78 v8u16 reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_MSA() local
141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
304 v4u32 reg0, reg1, reg2, reg3; in ScaleRowDown4Box_MSA() local
567 v8u16 reg0, reg1; in ScaleFilterCols_MSA() local
669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local
766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local
860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
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| D | row_msa.cc | 481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local
570 v8u16 reg0, reg1, reg2; in I422ToARGB4444Row_MSA() local
610 v8u16 reg0, reg1, reg2; in I422ToARGB1555Row_MSA() local
774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1089 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local
1163 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local
1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1311 v8i16 reg0, reg1, reg2; in ARGBToRGB565DitherRow_MSA() local
1379 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local
[all …]
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| D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
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| /external/libvpx/libvpx/third_party/libyuv/source/ |
| D | compare_msa.cc | 59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
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| D | scale_msa.cc | 78 v8u16 reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_MSA() local
141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
304 v4u32 reg0, reg1, reg2, reg3; in ScaleRowDown4Box_MSA() local
567 v8u16 reg0, reg1; in ScaleFilterCols_MSA() local
669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local
766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local
860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
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| D | row_msa.cc | 481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local
570 v8u16 reg0, reg1, reg2; in I422ToARGB4444Row_MSA() local
610 v8u16 reg0, reg1, reg2; in I422ToARGB1555Row_MSA() local
774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1089 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local
1163 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local
1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1311 v8i16 reg0, reg1, reg2; in ARGBToRGB565DitherRow_MSA() local
1379 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local
[all …]
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| D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_fragshader.c | 48 GLuint reg0 = 0; in r200SetFragShaderArg() local
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| /external/libhevc/encoder/arm/ |
| D | ihevce_common_utils_neon.c | 112 int32x4_t reg0[4], reg1[4]; in ihevce_wt_avg_2d_16x1_neon() local
232 int32x4_t reg0[4], reg1[4]; in ihevce_wt_avg_2d_4xn_neon() local
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| /external/vixl/test/aarch64/ |
| D | test-utils-aarch64.cc | 268 bool Equal64(const Register& reg0, in Equal64()
279 bool NotEqual64(const Register& reg0, in NotEqual64()
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| /external/llvm-project/clang/test/OpenMP/ |
| D | taskloop_simd_loop_messages.cpp | 23 int reg0; variable
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| D | master_taskloop_simd_loop_messages.cpp | 23 int reg0; variable
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| D | parallel_master_taskloop_loop_messages.cpp | 23 int reg0; variable
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| D | master_taskloop_loop_messages.cpp | 23 int reg0; variable
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| D | parallel_master_taskloop_simd_loop_messages.cpp | 23 int reg0; variable
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| D | taskloop_loop_messages.cpp | 23 int reg0; variable
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| /external/clang/test/OpenMP/ |
| D | taskloop_loop_messages.cpp | 19 int reg0; variable
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| D | taskloop_simd_loop_messages.cpp | 19 int reg0; variable
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| D | for_loop_messages.cpp | 19 int reg0; variable
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| /external/tensorflow/tensorflow/lite/ |
| D | model_test.cc | 238 const TfLiteRegistration& reg0 = node_and_reg0->second; in TEST() local
|