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Searched defs:reg1 (Results 1 – 25 of 44) sorted by relevance

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/external/libvpx/libvpx/vpx_ports/
Dasmdefs_mmi.h21 #define MMI_ADDU(reg1, reg2, reg3) \ argument
24 #define MMI_ADDIU(reg1, reg2, immediate) \ argument
27 #define MMI_ADDI(reg1, reg2, immediate) \ argument
30 #define MMI_SUBU(reg1, reg2, reg3) \ argument
36 #define MMI_SRL(reg1, reg2, shift) \ argument
39 #define MMI_SLL(reg1, reg2, shift) \ argument
50 #define MMI_ADDU(reg1, reg2, reg3) \ argument
53 #define MMI_ADDIU(reg1, reg2, immediate) \ argument
56 #define MMI_ADDI(reg1, reg2, immediate) \ argument
59 #define MMI_SUBU(reg1, reg2, reg3) \ argument
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/external/vixl/src/aarch64/
Dregisters-aarch64.cc173 bool AreAliased(const CPURegister& reg1, in AreAliased()
224 bool AreSameSizeAndType(const CPURegister& reg1, in AreSameSizeAndType()
244 bool AreEven(const CPURegister& reg1, in AreEven()
264 bool AreConsecutive(const CPURegister& reg1, in AreConsecutive()
294 bool AreSameFormat(const CPURegister& reg1, in AreSameFormat()
306 bool AreSameLaneSize(const CPURegister& reg1, in AreSameLaneSize()
/external/arm-trusted-firmware/plat/mediatek/mt8192/drivers/gpio/
Dmtgpio.c135 uintptr_t reg1; in mt_gpio_set_spec_pull_pupd() local
160 uintptr_t reg1; in mt_gpio_set_pull_pu_pd() local
199 uintptr_t reg1; in mt_gpio_get_spec_pull_pupd() local
227 uintptr_t reg1; in mt_gpio_get_pull_pu_pd() local
/external/libabigail/tests/data/test-abidiff-exit/
Dtest-decl-enum-v1.c4 void reg1(const enum embodied_enum * foo) { (void)foo; } in reg1() function
Dtest-decl-enum-v0.c4 void reg1(const enum embodied_enum * foo) { (void)foo; } in reg1() function
Dtest-decl-struct-v1.c4 void reg1(const struct embodied * foo) { (void)foo; } in reg1() function
Dtest-decl-struct-v0.c4 void reg1(const struct embodied * foo) { (void)foo; } in reg1() function
Dtest-member-size-v0.cc25 void reg1(S*, T*, T*) { } in reg1() function
Dtest-member-size-v1.cc26 void reg1(S*, T*, T*) { } in reg1() function
/external/libvpx/libvpx/vpx_dsp/mips/
Didct32x32_msa.c45 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
129 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
355 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
435 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
Dtxfm_macros_msa.h16 #define DOTP_CONST_PAIR(reg0, reg1, cnst0, cnst1, out0, out1) \ argument
/external/libyuv/files/source/
Dcompare_msa.cc59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
Dscale_msa.cc78 v8u16 reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_MSA() local
141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
304 v4u32 reg0, reg1, reg2, reg3; in ScaleRowDown4Box_MSA() local
567 v8u16 reg0, reg1; in ScaleFilterCols_MSA() local
669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local
766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local
860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
Drow_msa.cc481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local
570 v8u16 reg0, reg1, reg2; in I422ToARGB4444Row_MSA() local
610 v8u16 reg0, reg1, reg2; in I422ToARGB1555Row_MSA() local
774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1089 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local
1163 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local
1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1311 v8i16 reg0, reg1, reg2; in ARGBToRGB565DitherRow_MSA() local
1379 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local
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Drotate_msa.cc85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
/external/libvpx/libvpx/third_party/libyuv/source/
Dcompare_msa.cc59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
Dscale_msa.cc78 v8u16 reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_MSA() local
141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
304 v4u32 reg0, reg1, reg2, reg3; in ScaleRowDown4Box_MSA() local
567 v8u16 reg0, reg1; in ScaleFilterCols_MSA() local
669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local
766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local
860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
Drow_msa.cc481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local
570 v8u16 reg0, reg1, reg2; in I422ToARGB4444Row_MSA() local
610 v8u16 reg0, reg1, reg2; in I422ToARGB1555Row_MSA() local
774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1089 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local
1163 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local
1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1311 v8i16 reg0, reg1, reg2; in ARGBToRGB565DitherRow_MSA() local
1379 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local
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Drotate_msa.cc85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
/external/capstone/arch/X86/
DX86Mapping.c2694 x86_reg reg1, reg2; member
3023 bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, e… in X86_insn_reg_intel2()
3044 bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enu… in X86_insn_reg_att2()
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhisi_dvfs.c191 unsigned int reg1 = 0; in acpu_dvfs_freq_ascend() local
401 unsigned int reg1 = 0; in acpu_dvfs_freq_descend() local
/external/perfetto/src/profiling/memory/
Dshared_ring_buffer.cc164 void* reg1 = mmap(region, size_with_meta, PROT_READ | PROT_WRITE, in Initialize() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp149 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp149 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity()
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp150 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity()

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