| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | rv32zbbp-valid.s | 33 rol t0, t1, t2 label
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| D | rv32zbbp-invalid.s | 10 rol t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
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| /external/igt-gpu-tools/lib/ |
| D | igt_rand.c | 21 #define rol(x,k) ((x << k) | (x >> (32-k))) in hars_petruska_f54_1_random() macro
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| /external/mesa3d/src/intel/compiler/ |
| D | test_fs_scoreboard.cpp | 719 fs_inst *rol = instruction(else_body, 0); in TEST_F() local
764 fs_inst *rol = instruction(else_body, 4); in TEST_F() local
809 fs_inst *rol = instruction(else_body, 0); in TEST_F() local
855 fs_inst *rol = instruction(else_body, 0); in TEST_F() local
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| /external/igt-gpu-tools/benchmarks/ |
| D | gem_exec_reloc.c | 62 #define rol(x,k) ((x << k) | (x >> (32-k))) in hars_petruska_f54_1_random() macro
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| D | gem_exec_trace.c | 98 #define rol(x,k) ((x << k) | (x >> (32-k))) in hars_petruska_f54_1_random() macro
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| /external/igt-gpu-tools/tests/i915/ |
| D | gem_exec_lut_handle.c | 66 #define rol(x,k) ((x << k) | (x >> (32-k))) in hars_petruska_f54_1_random() macro
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| /external/selinux/libselinux/src/ |
| D | sha1.c | 43 #define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/ppp/pppd/ |
| D | sha1.c | 27 #define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/mesa3d/src/util/sha1/ |
| D | sha1.c | 22 #define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/openssh/openbsd-compat/ |
| D | sha1.c | 24 #define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
|
| /external/libevent/test/ |
| D | regress_iocp.c | 238 struct event_overlapped rol, wol; in test_iocp_evbuffer() local
|
| /external/toybox/toys/lsb/ |
| D | md5sum.c | 169 #define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/wpa_supplicant_8/src/crypto/ |
| D | sha1-internal.c | 130 #define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/vboot_reference/firmware/2lib/ |
| D | 2sha1.c | 187 #define rol(bits, value) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/llvm-project/llvm/lib/Support/ |
| D | SHA1.cpp | 30 static inline uint32_t rol(uint32_t Number, int Bits) { in rol() function
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| /external/mtools/ |
| D | dirCache.c | 27 static __inline__ uint32_t rol(uint32_t arg, int shift) in rol() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| D | SHA1.cpp | 30 static inline uint32_t rol(uint32_t Number, int Bits) { in rol() function
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| /external/vboot_reference/firmware/lib/cryptolib/ |
| D | sha1.c | 176 #define rol(bits, value) (((value) << (bits)) | ((value) >> (32 - (bits)))) macro
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| /external/pdfium/core/fdrm/ |
| D | fx_crypt_sha.cpp | 61 #define rol(x, y) (((x) << (y)) | (((unsigned int)x) >> (32 - y))) macro
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_32.c | 1264 sljit_s32 rol; in get_imm() local
1305 sljit_s32 rol; in generate_int() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerX86BaseImpl.h | 3227 void AssemblerX86Base<TraitsType>::rol(Type Ty, GPRRegister reg, in rol() function
3233 void AssemblerX86Base<TraitsType>::rol(Type Ty, GPRRegister operand, in rol() function
3239 void AssemblerX86Base<TraitsType>::rol(Type Ty, const Address &operand, in rol() function
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| /external/llvm/lib/Target/Hexagon/ |
| D | BitTracker.cpp | 241 BT::RegisterCell &BT::RegisterCell::rol(uint16_t Sh) { in rol() function in BT::RegisterCell
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | BitTracker.cpp | 253 BT::RegisterCell &BT::RegisterCell::rol(uint16_t Sh) { in rol() function in BT::RegisterCell
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | BitTracker.cpp | 253 BT::RegisterCell &BT::RegisterCell::rol(uint16_t Sh) { in rol() function in BT::RegisterCell
|