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1 /**************************************************************************
2  *
3  * Copyright 2007 VMware, Inc.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27 
28 /**
29  * Texture tile caching.
30  *
31  * Author:
32  *    Brian Paul
33  */
34 
35 #include "util/u_inlines.h"
36 #include "util/u_memory.h"
37 #include "util/u_tile.h"
38 #include "util/format/u_format.h"
39 #include "util/u_math.h"
40 #include "sp_context.h"
41 #include "sp_texture.h"
42 #include "sp_tex_tile_cache.h"
43 
44 
45 
46 struct softpipe_tex_tile_cache *
sp_create_tex_tile_cache(struct pipe_context * pipe)47 sp_create_tex_tile_cache( struct pipe_context *pipe )
48 {
49    struct softpipe_tex_tile_cache *tc;
50    uint pos;
51 
52    /* make sure max texture size works */
53    assert((TEX_TILE_SIZE << TEX_Y_BITS) >= (1 << (SP_MAX_TEXTURE_2D_LEVELS-1)));
54 
55    tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
56    if (tc) {
57       tc->pipe = pipe;
58       for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
59          tc->entries[pos].addr.bits.invalid = 1;
60       }
61       tc->last_tile = &tc->entries[0]; /* any tile */
62    }
63    return tc;
64 }
65 
66 
67 void
sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache * tc)68 sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
69 {
70    if (tc) {
71       uint pos;
72 
73       for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
74          /*assert(tc->entries[pos].x < 0);*/
75       }
76       if (tc->transfer) {
77          tc->pipe->transfer_unmap(tc->pipe, tc->transfer);
78       }
79       if (tc->tex_trans) {
80          tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
81       }
82 
83       FREE( tc );
84    }
85 }
86 
87 
88 /**
89  * Invalidate all cached tiles for the cached texture.
90  * Should be called when the texture is modified.
91  */
92 void
sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache * tc)93 sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc)
94 {
95    unsigned i;
96 
97    assert(tc);
98    assert(tc->texture);
99 
100    for (i = 0; i < ARRAY_SIZE(tc->entries); i++) {
101       tc->entries[i].addr.bits.invalid = 1;
102    }
103 }
104 
105 static boolean
sp_tex_tile_is_compat_view(struct softpipe_tex_tile_cache * tc,struct pipe_sampler_view * view)106 sp_tex_tile_is_compat_view(struct softpipe_tex_tile_cache *tc,
107                            struct pipe_sampler_view *view)
108 {
109    if (!view)
110       return FALSE;
111    return (tc->texture == view->texture &&
112            tc->format == view->format &&
113            tc->swizzle_r == view->swizzle_r &&
114            tc->swizzle_g == view->swizzle_g &&
115            tc->swizzle_b == view->swizzle_b &&
116            tc->swizzle_a == view->swizzle_a);
117 }
118 
119 /**
120  * Specify the sampler view to cache.
121  */
122 void
sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache * tc,struct pipe_sampler_view * view)123 sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
124                                    struct pipe_sampler_view *view)
125 {
126    struct pipe_resource *texture = view ? view->texture : NULL;
127    uint i;
128 
129    assert(!tc->transfer);
130 
131    if (!sp_tex_tile_is_compat_view(tc, view)) {
132       pipe_resource_reference(&tc->texture, texture);
133 
134       if (tc->tex_trans_map) {
135          tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
136          tc->tex_trans = NULL;
137          tc->tex_trans_map = NULL;
138       }
139 
140       if (view) {
141          tc->swizzle_r = view->swizzle_r;
142          tc->swizzle_g = view->swizzle_g;
143          tc->swizzle_b = view->swizzle_b;
144          tc->swizzle_a = view->swizzle_a;
145          tc->format = view->format;
146       }
147 
148       /* mark as entries as invalid/empty */
149       /* XXX we should try to avoid this when the teximage hasn't changed */
150       for (i = 0; i < ARRAY_SIZE(tc->entries); i++) {
151          tc->entries[i].addr.bits.invalid = 1;
152       }
153 
154       tc->tex_z = -1; /* any invalid value here */
155    }
156 }
157 
158 
159 
160 
161 /**
162  * Flush the tile cache: write all dirty tiles back to the transfer.
163  * any tiles "flagged" as cleared will be "really" cleared.
164  */
165 void
sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache * tc)166 sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
167 {
168    int pos;
169 
170    if (tc->texture) {
171       /* caching a texture, mark all entries as empty */
172       for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
173          tc->entries[pos].addr.bits.invalid = 1;
174       }
175       tc->tex_z = -1;
176    }
177 
178 }
179 
180 
181 /**
182  * Given the texture face, level, zslice, x and y values, compute
183  * the cache entry position/index where we'd hope to find the
184  * cached texture tile.
185  * This is basically a direct-map cache.
186  * XXX There's probably lots of ways in which we can improve this.
187  */
188 static inline uint
tex_cache_pos(union tex_tile_address addr)189 tex_cache_pos( union tex_tile_address addr )
190 {
191    uint entry = (addr.bits.x +
192                  addr.bits.y * 9 +
193                  addr.bits.z +
194                  addr.bits.level * 7);
195 
196    return entry % NUM_TEX_TILE_ENTRIES;
197 }
198 
199 /**
200  * Similar to sp_get_cached_tile() but for textures.
201  * Tiles are read-only and indexed with more params.
202  */
203 const struct softpipe_tex_cached_tile *
sp_find_cached_tile_tex(struct softpipe_tex_tile_cache * tc,union tex_tile_address addr)204 sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
205                         union tex_tile_address addr )
206 {
207    struct softpipe_tex_cached_tile *tile;
208 
209    tile = tc->entries + tex_cache_pos( addr );
210 
211    if (addr.value != tile->addr.value) {
212 
213       /* cache miss.  Most misses are because we've invalidated the
214        * texture cache previously -- most commonly on binding a new
215        * texture.  Currently we effectively flush the cache on texture
216        * bind.
217        */
218 #if 0
219       _debug_printf("miss at %u:  x=%d y=%d z=%d face=%d level=%d\n"
220                     "   tile %u:  x=%d y=%d z=%d face=%d level=%d\n",
221                     pos, x/TILE_SIZE, y/TILE_SIZE, z, face, level,
222                     pos, tile->addr.bits.x, tile->addr.bits.y, tile->z, tile->face, tile->level);
223 #endif
224 
225       /* check if we need to get a new transfer */
226       if (!tc->tex_trans ||
227           tc->tex_level != addr.bits.level ||
228           tc->tex_z != addr.bits.z) {
229          /* get new transfer (view into texture) */
230          unsigned width, height, layer;
231 
232          if (tc->tex_trans_map) {
233             tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
234             tc->tex_trans = NULL;
235             tc->tex_trans_map = NULL;
236          }
237 
238          width = u_minify(tc->texture->width0, addr.bits.level);
239          if (tc->texture->target == PIPE_TEXTURE_1D_ARRAY) {
240             height = tc->texture->array_size;
241             layer = 0;
242          }
243          else {
244             height = u_minify(tc->texture->height0, addr.bits.level);
245             layer = addr.bits.z;
246          }
247 
248          tc->tex_trans_map =
249             pipe_transfer_map(tc->pipe, tc->texture,
250                               addr.bits.level,
251                               layer,
252                               PIPE_MAP_READ | PIPE_MAP_UNSYNCHRONIZED,
253                               0, 0, width, height, &tc->tex_trans);
254 
255          tc->tex_level = addr.bits.level;
256          tc->tex_z = addr.bits.z;
257       }
258 
259       /* Get tile from the transfer (view into texture), explicitly passing
260        * the image format.
261        */
262       pipe_get_tile_rgba(tc->tex_trans, tc->tex_trans_map,
263                          addr.bits.x * TEX_TILE_SIZE,
264                          addr.bits.y * TEX_TILE_SIZE,
265                          TEX_TILE_SIZE,
266                          TEX_TILE_SIZE,
267                          tc->format,
268                          (float *) tile->data.color);
269       tile->addr = addr;
270    }
271 
272    tc->last_tile = tile;
273    return tile;
274 }
275