1 /*
2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <errno.h>
9 #include <string.h>
10
11 #include <arch_helpers.h>
12 #include <arch/aarch64/arch_features.h>
13 #include <bl31/bl31.h>
14 #include <common/debug.h>
15 #include <common/runtime_svc.h>
16 #include <lib/el3_runtime/context_mgmt.h>
17 #include <lib/smccc.h>
18 #include <lib/spinlock.h>
19 #include <lib/utils.h>
20 #include <plat/common/common_def.h>
21 #include <plat/common/platform.h>
22 #include <platform_def.h>
23 #include <services/ffa_svc.h>
24 #include <services/spmd_svc.h>
25 #include <smccc_helpers.h>
26 #include "spmd_private.h"
27
28 /*******************************************************************************
29 * SPM Core context information.
30 ******************************************************************************/
31 static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT];
32
33 /*******************************************************************************
34 * SPM Core attribute information read from its manifest.
35 ******************************************************************************/
36 static spmc_manifest_attribute_t spmc_attrs;
37
38 /*******************************************************************************
39 * SPM Core entry point information. Discovered on the primary core and reused
40 * on secondary cores.
41 ******************************************************************************/
42 static entry_point_info_t *spmc_ep_info;
43
44 /*******************************************************************************
45 * SPM Core context on CPU based on mpidr.
46 ******************************************************************************/
spmd_get_context_by_mpidr(uint64_t mpidr)47 spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr)
48 {
49 int core_idx = plat_core_pos_by_mpidr(mpidr);
50
51 if (core_idx < 0) {
52 ERROR("Invalid mpidr: %llx, returned ID: %d\n", mpidr, core_idx);
53 panic();
54 }
55
56 return &spm_core_context[core_idx];
57 }
58
59 /*******************************************************************************
60 * SPM Core context on current CPU get helper.
61 ******************************************************************************/
spmd_get_context(void)62 spmd_spm_core_context_t *spmd_get_context(void)
63 {
64 return spmd_get_context_by_mpidr(read_mpidr());
65 }
66
67 /*******************************************************************************
68 * SPM Core entry point information get helper.
69 ******************************************************************************/
spmd_spmc_ep_info_get(void)70 entry_point_info_t *spmd_spmc_ep_info_get(void)
71 {
72 return spmc_ep_info;
73 }
74
75 /*******************************************************************************
76 * SPM Core ID getter.
77 ******************************************************************************/
spmd_spmc_id_get(void)78 uint16_t spmd_spmc_id_get(void)
79 {
80 return spmc_attrs.spmc_id;
81 }
82
83 /*******************************************************************************
84 * Static function declaration.
85 ******************************************************************************/
86 static int32_t spmd_init(void);
87 static int spmd_spmc_init(void *pm_addr);
88 static uint64_t spmd_ffa_error_return(void *handle,
89 int error_code);
90 static uint64_t spmd_smc_forward(uint32_t smc_fid,
91 bool secure_origin,
92 uint64_t x1,
93 uint64_t x2,
94 uint64_t x3,
95 uint64_t x4,
96 void *handle);
97
98 /*******************************************************************************
99 * This function takes an SPMC context pointer and performs a synchronous
100 * SPMC entry.
101 ******************************************************************************/
spmd_spm_core_sync_entry(spmd_spm_core_context_t * spmc_ctx)102 uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx)
103 {
104 uint64_t rc;
105
106 assert(spmc_ctx != NULL);
107
108 cm_set_context(&(spmc_ctx->cpu_ctx), SECURE);
109
110 /* Restore the context assigned above */
111 cm_el1_sysregs_context_restore(SECURE);
112
113 #if SPMD_SPM_AT_SEL2
114 cm_el2_sysregs_context_restore(SECURE);
115 #endif
116 cm_set_next_eret_context(SECURE);
117
118 /* Enter SPMC */
119 rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx);
120
121 /* Save secure state */
122 cm_el1_sysregs_context_save(SECURE);
123 #if SPMD_SPM_AT_SEL2
124 cm_el2_sysregs_context_save(SECURE);
125 #endif
126
127 return rc;
128 }
129
130 /*******************************************************************************
131 * This function returns to the place where spmd_spm_core_sync_entry() was
132 * called originally.
133 ******************************************************************************/
spmd_spm_core_sync_exit(uint64_t rc)134 __dead2 void spmd_spm_core_sync_exit(uint64_t rc)
135 {
136 spmd_spm_core_context_t *ctx = spmd_get_context();
137
138 /* Get current CPU context from SPMC context */
139 assert(cm_get_context(SECURE) == &(ctx->cpu_ctx));
140
141 /*
142 * The SPMD must have initiated the original request through a
143 * synchronous entry into SPMC. Jump back to the original C runtime
144 * context with the value of rc in x0;
145 */
146 spmd_spm_core_exit(ctx->c_rt_ctx, rc);
147
148 panic();
149 }
150
151 /*******************************************************************************
152 * Jump to the SPM Core for the first time.
153 ******************************************************************************/
spmd_init(void)154 static int32_t spmd_init(void)
155 {
156 spmd_spm_core_context_t *ctx = spmd_get_context();
157 uint64_t rc;
158 unsigned int linear_id = plat_my_core_pos();
159 unsigned int core_id;
160
161 VERBOSE("SPM Core init start.\n");
162 ctx->state = SPMC_STATE_ON_PENDING;
163
164 /* Set the SPMC context state on other CPUs to OFF */
165 for (core_id = 0U; core_id < PLATFORM_CORE_COUNT; core_id++) {
166 if (core_id != linear_id) {
167 spm_core_context[core_id].state = SPMC_STATE_OFF;
168 spm_core_context[core_id].secondary_ep.entry_point = 0UL;
169 }
170 }
171
172 rc = spmd_spm_core_sync_entry(ctx);
173 if (rc != 0ULL) {
174 ERROR("SPMC initialisation failed 0x%llx\n", rc);
175 return 0;
176 }
177
178 ctx->state = SPMC_STATE_ON;
179
180 VERBOSE("SPM Core init end.\n");
181
182 return 1;
183 }
184
185 /*******************************************************************************
186 * Loads SPMC manifest and inits SPMC.
187 ******************************************************************************/
spmd_spmc_init(void * pm_addr)188 static int spmd_spmc_init(void *pm_addr)
189 {
190 spmd_spm_core_context_t *spm_ctx = spmd_get_context();
191 uint32_t ep_attr;
192 int rc;
193
194 /* Load the SPM Core manifest */
195 rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr);
196 if (rc != 0) {
197 WARN("No or invalid SPM Core manifest image provided by BL2\n");
198 return rc;
199 }
200
201 /*
202 * Ensure that the SPM Core version is compatible with the SPM
203 * Dispatcher version.
204 */
205 if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) ||
206 (spmc_attrs.minor_version > FFA_VERSION_MINOR)) {
207 WARN("Unsupported FFA version (%u.%u)\n",
208 spmc_attrs.major_version, spmc_attrs.minor_version);
209 return -EINVAL;
210 }
211
212 VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version,
213 spmc_attrs.minor_version);
214
215 VERBOSE("SPM Core run time EL%x.\n",
216 SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1);
217
218 /* Validate the SPMC ID, Ensure high bit is set */
219 if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) &
220 SPMC_SECURE_ID_MASK) == 0U) {
221 WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id);
222 return -EINVAL;
223 }
224
225 /* Validate the SPM Core execution state */
226 if ((spmc_attrs.exec_state != MODE_RW_64) &&
227 (spmc_attrs.exec_state != MODE_RW_32)) {
228 WARN("Unsupported %s%x.\n", "SPM Core execution state 0x",
229 spmc_attrs.exec_state);
230 return -EINVAL;
231 }
232
233 VERBOSE("%s%x.\n", "SPM Core execution state 0x",
234 spmc_attrs.exec_state);
235
236 #if SPMD_SPM_AT_SEL2
237 /* Ensure manifest has not requested AArch32 state in S-EL2 */
238 if (spmc_attrs.exec_state == MODE_RW_32) {
239 WARN("AArch32 state at S-EL2 is not supported.\n");
240 return -EINVAL;
241 }
242
243 /*
244 * Check if S-EL2 is supported on this system if S-EL2
245 * is required for SPM
246 */
247 if (!is_armv8_4_sel2_present()) {
248 WARN("SPM Core run time S-EL2 is not supported.\n");
249 return -EINVAL;
250 }
251 #endif /* SPMD_SPM_AT_SEL2 */
252
253 /* Initialise an entrypoint to set up the CPU context */
254 ep_attr = SECURE | EP_ST_ENABLE;
255 if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) {
256 ep_attr |= EP_EE_BIG;
257 }
258
259 SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr);
260
261 /*
262 * Populate SPSR for SPM Core based upon validated parameters from the
263 * manifest.
264 */
265 if (spmc_attrs.exec_state == MODE_RW_32) {
266 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
267 SPSR_E_LITTLE,
268 DAIF_FIQ_BIT |
269 DAIF_IRQ_BIT |
270 DAIF_ABT_BIT);
271 } else {
272
273 #if SPMD_SPM_AT_SEL2
274 static const uint32_t runtime_el = MODE_EL2;
275 #else
276 static const uint32_t runtime_el = MODE_EL1;
277 #endif
278 spmc_ep_info->spsr = SPSR_64(runtime_el,
279 MODE_SP_ELX,
280 DISABLE_ALL_EXCEPTIONS);
281 }
282
283 /* Initialise SPM Core context with this entry point information */
284 cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info);
285
286 /* Reuse PSCI affinity states to mark this SPMC context as off */
287 spm_ctx->state = AFF_STATE_OFF;
288
289 INFO("SPM Core setup done.\n");
290
291 /* Register power management hooks with PSCI */
292 psci_register_spd_pm_hook(&spmd_pm);
293
294 /* Register init function for deferred init. */
295 bl31_register_bl32_init(&spmd_init);
296
297 return 0;
298 }
299
300 /*******************************************************************************
301 * Initialize context of SPM Core.
302 ******************************************************************************/
spmd_setup(void)303 int spmd_setup(void)
304 {
305 void *spmc_manifest;
306 int rc;
307
308 spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
309 if (spmc_ep_info == NULL) {
310 WARN("No SPM Core image provided by BL2 boot loader.\n");
311 return -EINVAL;
312 }
313
314 /* Under no circumstances will this parameter be 0 */
315 assert(spmc_ep_info->pc != 0ULL);
316
317 /*
318 * Check if BL32 ep_info has a reference to 'tos_fw_config'. This will
319 * be used as a manifest for the SPM Core at the next lower EL/mode.
320 */
321 spmc_manifest = (void *)spmc_ep_info->args.arg0;
322 if (spmc_manifest == NULL) {
323 ERROR("Invalid or absent SPM Core manifest.\n");
324 return -EINVAL;
325 }
326
327 /* Load manifest, init SPMC */
328 rc = spmd_spmc_init(spmc_manifest);
329 if (rc != 0) {
330 WARN("Booting device without SPM initialization.\n");
331 }
332
333 return rc;
334 }
335
336 /*******************************************************************************
337 * Forward SMC to the other security state
338 ******************************************************************************/
spmd_smc_forward(uint32_t smc_fid,bool secure_origin,uint64_t x1,uint64_t x2,uint64_t x3,uint64_t x4,void * handle)339 static uint64_t spmd_smc_forward(uint32_t smc_fid,
340 bool secure_origin,
341 uint64_t x1,
342 uint64_t x2,
343 uint64_t x3,
344 uint64_t x4,
345 void *handle)
346 {
347 unsigned int secure_state_in = (secure_origin) ? SECURE : NON_SECURE;
348 unsigned int secure_state_out = (!secure_origin) ? SECURE : NON_SECURE;
349
350 /* Save incoming security state */
351 cm_el1_sysregs_context_save(secure_state_in);
352 #if CTX_INCLUDE_FPREGS
353 fpregs_context_save(get_fpregs_ctx(cm_get_context(secure_state_in)));
354 #endif
355 #if SPMD_SPM_AT_SEL2
356 cm_el2_sysregs_context_save(secure_state_in);
357 #endif
358
359 /* Restore outgoing security state */
360 cm_el1_sysregs_context_restore(secure_state_out);
361 #if CTX_INCLUDE_FPREGS
362 fpregs_context_restore(get_fpregs_ctx(cm_get_context(secure_state_out)));
363 #endif
364 #if SPMD_SPM_AT_SEL2
365 cm_el2_sysregs_context_restore(secure_state_out);
366 #endif
367 cm_set_next_eret_context(secure_state_out);
368
369 SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4,
370 SMC_GET_GP(handle, CTX_GPREG_X5),
371 SMC_GET_GP(handle, CTX_GPREG_X6),
372 SMC_GET_GP(handle, CTX_GPREG_X7));
373 }
374
375 /*******************************************************************************
376 * Return FFA_ERROR with specified error code
377 ******************************************************************************/
spmd_ffa_error_return(void * handle,int error_code)378 static uint64_t spmd_ffa_error_return(void *handle, int error_code)
379 {
380 SMC_RET8(handle, FFA_ERROR,
381 FFA_TARGET_INFO_MBZ, error_code,
382 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
383 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
384 }
385
386 /*******************************************************************************
387 * spmd_check_address_in_binary_image
388 ******************************************************************************/
spmd_check_address_in_binary_image(uint64_t address)389 bool spmd_check_address_in_binary_image(uint64_t address)
390 {
391 assert(!check_uptr_overflow(spmc_attrs.load_address, spmc_attrs.binary_size));
392
393 return ((address >= spmc_attrs.load_address) &&
394 (address < (spmc_attrs.load_address + spmc_attrs.binary_size)));
395 }
396
397 /******************************************************************************
398 * spmd_is_spmc_message
399 *****************************************************************************/
spmd_is_spmc_message(unsigned int ep)400 static bool spmd_is_spmc_message(unsigned int ep)
401 {
402 return ((ffa_endpoint_destination(ep) == SPMD_DIRECT_MSG_ENDPOINT_ID)
403 && (ffa_endpoint_source(ep) == spmc_attrs.spmc_id));
404 }
405
406 /******************************************************************************
407 * spmd_handle_spmc_message
408 *****************************************************************************/
spmd_handle_spmc_message(unsigned long long msg,unsigned long long parm1,unsigned long long parm2,unsigned long long parm3,unsigned long long parm4)409 static int spmd_handle_spmc_message(unsigned long long msg,
410 unsigned long long parm1, unsigned long long parm2,
411 unsigned long long parm3, unsigned long long parm4)
412 {
413 VERBOSE("%s %llx %llx %llx %llx %llx\n", __func__,
414 msg, parm1, parm2, parm3, parm4);
415
416 switch (msg) {
417 case SPMD_DIRECT_MSG_SET_ENTRY_POINT:
418 return spmd_pm_secondary_core_set_ep(parm1, parm2, parm3);
419 default:
420 break;
421 }
422
423 return -EINVAL;
424 }
425
426 /*******************************************************************************
427 * This function handles all SMCs in the range reserved for FFA. Each call is
428 * either forwarded to the other security state or handled by the SPM dispatcher
429 ******************************************************************************/
spmd_smc_handler(uint32_t smc_fid,uint64_t x1,uint64_t x2,uint64_t x3,uint64_t x4,void * cookie,void * handle,uint64_t flags)430 uint64_t spmd_smc_handler(uint32_t smc_fid,
431 uint64_t x1,
432 uint64_t x2,
433 uint64_t x3,
434 uint64_t x4,
435 void *cookie,
436 void *handle,
437 uint64_t flags)
438 {
439 spmd_spm_core_context_t *ctx = spmd_get_context();
440 bool secure_origin;
441 int32_t ret;
442 uint32_t input_version;
443
444 /* Determine which security state this SMC originated from */
445 secure_origin = is_caller_secure(flags);
446
447 INFO("SPM: 0x%x 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx\n",
448 smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5),
449 SMC_GET_GP(handle, CTX_GPREG_X6),
450 SMC_GET_GP(handle, CTX_GPREG_X7));
451
452 switch (smc_fid) {
453 case FFA_ERROR:
454 /*
455 * Check if this is the first invocation of this interface on
456 * this CPU. If so, then indicate that the SPM Core initialised
457 * unsuccessfully.
458 */
459 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) {
460 spmd_spm_core_sync_exit(x2);
461 }
462
463 return spmd_smc_forward(smc_fid, secure_origin,
464 x1, x2, x3, x4, handle);
465 break; /* not reached */
466
467 case FFA_VERSION:
468 input_version = (uint32_t)(0xFFFFFFFF & x1);
469 /*
470 * If caller is secure and SPMC was initialized,
471 * return FFA_VERSION of SPMD.
472 * If caller is non secure and SPMC was initialized,
473 * return SPMC's version.
474 * Sanity check to "input_version".
475 */
476 if ((input_version & FFA_VERSION_BIT31_MASK) ||
477 (ctx->state == SPMC_STATE_RESET)) {
478 ret = FFA_ERROR_NOT_SUPPORTED;
479 } else if (!secure_origin) {
480 ret = MAKE_FFA_VERSION(spmc_attrs.major_version, spmc_attrs.minor_version);
481 } else {
482 ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR, FFA_VERSION_MINOR);
483 }
484
485 SMC_RET8(handle, ret, FFA_TARGET_INFO_MBZ, FFA_TARGET_INFO_MBZ,
486 FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
487 FFA_PARAM_MBZ, FFA_PARAM_MBZ);
488 break; /* not reached */
489
490 case FFA_FEATURES:
491 /*
492 * This is an optional interface. Do the minimal checks and
493 * forward to SPM Core which will handle it if implemented.
494 */
495
496 /*
497 * Check if x1 holds a valid FFA fid. This is an
498 * optimization.
499 */
500 if (!is_ffa_fid(x1)) {
501 return spmd_ffa_error_return(handle,
502 FFA_ERROR_NOT_SUPPORTED);
503 }
504
505 /* Forward SMC from Normal world to the SPM Core */
506 if (!secure_origin) {
507 return spmd_smc_forward(smc_fid, secure_origin,
508 x1, x2, x3, x4, handle);
509 }
510
511 /*
512 * Return success if call was from secure world i.e. all
513 * FFA functions are supported. This is essentially a
514 * nop.
515 */
516 SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4,
517 SMC_GET_GP(handle, CTX_GPREG_X5),
518 SMC_GET_GP(handle, CTX_GPREG_X6),
519 SMC_GET_GP(handle, CTX_GPREG_X7));
520
521 break; /* not reached */
522
523 case FFA_ID_GET:
524 /*
525 * Returns the ID of the calling FFA component.
526 */
527 if (!secure_origin) {
528 SMC_RET8(handle, FFA_SUCCESS_SMC32,
529 FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID,
530 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
531 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
532 FFA_PARAM_MBZ);
533 }
534
535 SMC_RET8(handle, FFA_SUCCESS_SMC32,
536 FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id,
537 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
538 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
539 FFA_PARAM_MBZ);
540
541 break; /* not reached */
542
543 case FFA_MSG_SEND_DIRECT_REQ_SMC32:
544 if (secure_origin && spmd_is_spmc_message(x1)) {
545 ret = spmd_handle_spmc_message(x3, x4,
546 SMC_GET_GP(handle, CTX_GPREG_X5),
547 SMC_GET_GP(handle, CTX_GPREG_X6),
548 SMC_GET_GP(handle, CTX_GPREG_X7));
549
550 SMC_RET8(handle, FFA_SUCCESS_SMC32,
551 FFA_TARGET_INFO_MBZ, ret,
552 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
553 FFA_PARAM_MBZ, FFA_PARAM_MBZ,
554 FFA_PARAM_MBZ);
555 } else {
556 /* Forward direct message to the other world */
557 return spmd_smc_forward(smc_fid, secure_origin,
558 x1, x2, x3, x4, handle);
559 }
560 break; /* Not reached */
561
562 case FFA_MSG_SEND_DIRECT_RESP_SMC32:
563 if (secure_origin && spmd_is_spmc_message(x1)) {
564 spmd_spm_core_sync_exit(0);
565 } else {
566 /* Forward direct message to the other world */
567 return spmd_smc_forward(smc_fid, secure_origin,
568 x1, x2, x3, x4, handle);
569 }
570 break; /* Not reached */
571
572 case FFA_RX_RELEASE:
573 case FFA_RXTX_MAP_SMC32:
574 case FFA_RXTX_MAP_SMC64:
575 case FFA_RXTX_UNMAP:
576 case FFA_PARTITION_INFO_GET:
577 /*
578 * Should not be allowed to forward FFA_PARTITION_INFO_GET
579 * from Secure world to Normal world
580 *
581 * Fall through to forward the call to the other world
582 */
583 case FFA_MSG_RUN:
584 /* This interface must be invoked only by the Normal world */
585
586 if (secure_origin) {
587 return spmd_ffa_error_return(handle,
588 FFA_ERROR_NOT_SUPPORTED);
589 }
590
591 /* Fall through to forward the call to the other world */
592 case FFA_MSG_SEND:
593 case FFA_MSG_SEND_DIRECT_REQ_SMC64:
594 case FFA_MSG_SEND_DIRECT_RESP_SMC64:
595 case FFA_MEM_DONATE_SMC32:
596 case FFA_MEM_DONATE_SMC64:
597 case FFA_MEM_LEND_SMC32:
598 case FFA_MEM_LEND_SMC64:
599 case FFA_MEM_SHARE_SMC32:
600 case FFA_MEM_SHARE_SMC64:
601 case FFA_MEM_RETRIEVE_REQ_SMC32:
602 case FFA_MEM_RETRIEVE_REQ_SMC64:
603 case FFA_MEM_RETRIEVE_RESP:
604 case FFA_MEM_RELINQUISH:
605 case FFA_MEM_RECLAIM:
606 case FFA_SUCCESS_SMC32:
607 case FFA_SUCCESS_SMC64:
608 /*
609 * TODO: Assume that no requests originate from EL3 at the
610 * moment. This will change if a SP service is required in
611 * response to secure interrupts targeted to EL3. Until then
612 * simply forward the call to the Normal world.
613 */
614
615 return spmd_smc_forward(smc_fid, secure_origin,
616 x1, x2, x3, x4, handle);
617 break; /* not reached */
618
619 case FFA_MSG_WAIT:
620 /*
621 * Check if this is the first invocation of this interface on
622 * this CPU from the Secure world. If so, then indicate that the
623 * SPM Core initialised successfully.
624 */
625 if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) {
626 spmd_spm_core_sync_exit(0);
627 }
628
629 /* Fall through to forward the call to the other world */
630
631 case FFA_MSG_YIELD:
632 /* This interface must be invoked only by the Secure world */
633 if (!secure_origin) {
634 return spmd_ffa_error_return(handle,
635 FFA_ERROR_NOT_SUPPORTED);
636 }
637
638 return spmd_smc_forward(smc_fid, secure_origin,
639 x1, x2, x3, x4, handle);
640 break; /* not reached */
641
642 default:
643 WARN("SPM: Unsupported call 0x%08x\n", smc_fid);
644 return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED);
645 }
646 }
647