1 /*
2 * Copyright © 2009 Corbin Simpson
3 * Copyright © 2015 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
25 * of the Software.
26 */
27
28 #ifndef AMDGPU_WINSYS_H
29 #define AMDGPU_WINSYS_H
30
31 #include "pipebuffer/pb_cache.h"
32 #include "pipebuffer/pb_slab.h"
33 #include "gallium/drivers/radeon/radeon_winsys.h"
34 #include "util/simple_mtx.h"
35 #include "util/u_queue.h"
36 #include <amdgpu.h>
37
38 struct amdgpu_cs;
39
40 #define NUM_SLAB_ALLOCATORS 3
41
42 struct amdgpu_winsys {
43 struct pipe_reference reference;
44
45 /* File descriptor which was passed to amdgpu_device_initialize */
46 int fd;
47
48 struct pb_cache bo_cache;
49
50 /* Each slab buffer can only contain suballocations of equal sizes, so we
51 * need to layer the allocators, so that we don't waste too much memory.
52 */
53 struct pb_slabs bo_slabs[NUM_SLAB_ALLOCATORS];
54 struct pb_slabs bo_slabs_encrypted[NUM_SLAB_ALLOCATORS];
55
56 amdgpu_device_handle dev;
57
58 simple_mtx_t bo_fence_lock;
59
60 int num_cs; /* The number of command streams created. */
61 unsigned num_total_rejected_cs;
62 uint32_t surf_index_color;
63 uint32_t surf_index_fmask;
64 uint32_t next_bo_unique_id;
65 uint64_t allocated_vram;
66 uint64_t allocated_gtt;
67 uint64_t mapped_vram;
68 uint64_t mapped_gtt;
69 uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
70 uint64_t num_gfx_IBs;
71 uint64_t num_sdma_IBs;
72 uint64_t num_mapped_buffers;
73 uint64_t gfx_bo_list_counter;
74 uint64_t gfx_ib_size_counter;
75
76 struct radeon_info info;
77
78 /* multithreaded IB submission */
79 struct util_queue cs_queue;
80
81 struct amdgpu_gpu_info amdinfo;
82 struct ac_addrlib *addrlib;
83
84 bool check_vm;
85 bool debug_all_bos;
86 bool reserve_vmid;
87 bool zero_all_vram_allocs;
88
89 /* List of all allocated buffers */
90 simple_mtx_t global_bo_list_lock;
91 struct list_head global_bo_list;
92 unsigned num_buffers;
93
94 /* Single-linked list of all structs amdgpu_screen_winsys referencing this
95 * struct amdgpu_winsys
96 */
97 simple_mtx_t sws_list_lock;
98 struct amdgpu_screen_winsys *sws_list;
99
100 /* For returning the same amdgpu_winsys_bo instance for exported
101 * and re-imported buffers. */
102 struct hash_table *bo_export_table;
103 simple_mtx_t bo_export_table_lock;
104 };
105
106 struct amdgpu_screen_winsys {
107 struct radeon_winsys base;
108 struct amdgpu_winsys *aws;
109 int fd;
110 struct pipe_reference reference;
111 struct amdgpu_screen_winsys *next;
112
113 /* Maps a BO to its KMS handle valid for this DRM file descriptor
114 * Protected by amdgpu_winsys::sws_list_lock
115 */
116 struct hash_table *kms_handles;
117 };
118
119 static inline struct amdgpu_screen_winsys *
amdgpu_screen_winsys(struct radeon_winsys * base)120 amdgpu_screen_winsys(struct radeon_winsys *base)
121 {
122 return (struct amdgpu_screen_winsys*)base;
123 }
124
125 static inline struct amdgpu_winsys *
amdgpu_winsys(struct radeon_winsys * base)126 amdgpu_winsys(struct radeon_winsys *base)
127 {
128 return amdgpu_screen_winsys(base)->aws;
129 }
130
131 void amdgpu_surface_init_functions(struct amdgpu_screen_winsys *ws);
132
133 #endif
134