| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | trn2-diagnostics.s | 4 trn2 z6.h, z23.h, z31.x label
10 trn2 z0.h, z30.h, z24.b label
16 trn2 z1.h, z2.h label
22 trn2 z1.s, z2.s, z32.s label
28 trn2 p1.s, p2.s, p16.s label
34 trn2 z1.s, z2.s, p3.s label
40 trn2 p1.s, p2.s, z3.s label
50 trn2 z31.d, z31.d, z31.d label
56 trn2 z31.d, z31.d, z31.d label
|
| D | trn2.s | 10 trn2 z31.b, z31.b, z31.b label
16 trn2 z31.h, z31.h, z31.h label
22 trn2 z31.s, z31.s, z31.s label
28 trn2 z31.d, z31.d, z31.d label
34 trn2 p15.b, p15.b, p15.b label
40 trn2 p15.s, p15.s, p15.s label
46 trn2 p15.h, p15.h, p15.h label
52 trn2 p15.d, p15.d, p15.d label
|
| D | matrix-multiply-fp64.s | 277 trn2 z0.q, z1.q, z2.q label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2166 __ trn2(v28.V16B(), v30.V16B(), v25.V16B()); in GenerateTestSequenceNEON() local
2167 __ trn2(v7.V2D(), v27.V2D(), v7.V2D()); in GenerateTestSequenceNEON() local
2168 __ trn2(v30.V2S(), v16.V2S(), v19.V2S()); in GenerateTestSequenceNEON() local
2169 __ trn2(v24.V4H(), v6.V4H(), v25.V4H()); in GenerateTestSequenceNEON() local
2170 __ trn2(v2.V4S(), v19.V4S(), v11.V4S()); in GenerateTestSequenceNEON() local
2171 __ trn2(v25.V8B(), v27.V8B(), v18.V8B()); in GenerateTestSequenceNEON() local
2172 __ trn2(v12.V8H(), v4.V8H(), v15.V8H()); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 5399 void Assembler::trn2(const PRegisterWithLaneSize& pd, in trn2() function in vixl::aarch64::Assembler
5500 void Assembler::trn2(const ZRegister& zd, in trn2() function in vixl::aarch64::Assembler
|
| D | assembler-aarch64.cc | 4850 void Assembler::trn2(const VRegister& vd, in trn2() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 4189 LogicVRegister Simulator::trn2(VectorFormat vform, in trn2() function in vixl::aarch64::Simulator
|