| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | uzp1-diagnostics.s | 4 uzp1 z10.h, z22.h, z31.x label
10 uzp1 z10.h, z3.h, z15.b label
16 uzp1 z1.h, z2.h label
22 uzp1 z1.s, z2.s, z32.s label
28 uzp1 p1.s, p2.s, p16.s label
34 uzp1 z1.s, z2.s, p3.s label
40 uzp1 p1.s, p2.s, z3.s label
50 uzp1 z31.d, z31.d, z31.d label
56 uzp1 z31.d, z31.d, z31.d label
|
| D | uzp1.s | 10 uzp1 z31.b, z31.b, z31.b label
16 uzp1 z31.h, z31.h, z31.h label
22 uzp1 z31.s, z31.s, z31.s label
28 uzp1 z31.d, z31.d, z31.d label
34 uzp1 p15.b, p15.b, p15.b label
40 uzp1 p15.s, p15.s, p15.s label
46 uzp1 p15.h, p15.h, p15.h label
52 uzp1 p15.d, p15.d, p15.d label
|
| D | matrix-multiply-fp64.s | 255 uzp1 z0.q, z1.q, z2.q label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2478 __ uzp1(v30.V16B(), v9.V16B(), v17.V16B()); in GenerateTestSequenceNEON() local
2479 __ uzp1(v7.V2D(), v26.V2D(), v28.V2D()); in GenerateTestSequenceNEON() local
2480 __ uzp1(v26.V2S(), v16.V2S(), v22.V2S()); in GenerateTestSequenceNEON() local
2481 __ uzp1(v14.V4H(), v19.V4H(), v6.V4H()); in GenerateTestSequenceNEON() local
2482 __ uzp1(v17.V4S(), v23.V4S(), v30.V4S()); in GenerateTestSequenceNEON() local
2483 __ uzp1(v28.V8B(), v27.V8B(), v13.V8B()); in GenerateTestSequenceNEON() local
2484 __ uzp1(v17.V8H(), v1.V8H(), v12.V8H()); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 5412 void Assembler::uzp1(const PRegisterWithLaneSize& pd, in uzp1() function in vixl::aarch64::Assembler
5513 void Assembler::uzp1(const ZRegister& zd, in uzp1() function in vixl::aarch64::Assembler
|
| D | assembler-aarch64.cc | 4858 void Assembler::uzp1(const VRegister& vd, in uzp1() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 4249 LogicVRegister Simulator::uzp1(VectorFormat vform, in uzp1() function in vixl::aarch64::Simulator
|