1 /*
2 * Copyright © 2016-2017 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
26
27 /* Prints a human-readable description of the uniform reference. */
28 void
vir_dump_uniform(enum quniform_contents contents,uint32_t data)29 vir_dump_uniform(enum quniform_contents contents,
30 uint32_t data)
31 {
32 static const char *quniform_names[] = {
33 [QUNIFORM_ALPHA_REF] = "alpha_ref",
34 [QUNIFORM_LINE_WIDTH] = "line_width",
35 [QUNIFORM_AA_LINE_WIDTH] = "aa_line_width",
36 [QUNIFORM_VIEWPORT_X_SCALE] = "vp_x_scale",
37 [QUNIFORM_VIEWPORT_Y_SCALE] = "vp_y_scale",
38 [QUNIFORM_VIEWPORT_Z_OFFSET] = "vp_z_offset",
39 [QUNIFORM_VIEWPORT_Z_SCALE] = "vp_z_scale",
40 [QUNIFORM_SHARED_OFFSET] = "shared_offset",
41 };
42
43 switch (contents) {
44 case QUNIFORM_CONSTANT:
45 fprintf(stderr, "0x%08x / %f", data, uif(data));
46 break;
47
48 case QUNIFORM_UNIFORM:
49 fprintf(stderr, "push[%d]", data);
50 break;
51
52 case QUNIFORM_TEXTURE_CONFIG_P1:
53 fprintf(stderr, "tex[%d].p1", data);
54 break;
55
56 case QUNIFORM_TMU_CONFIG_P0:
57 fprintf(stderr, "tex[%d].p0 | 0x%x",
58 v3d_unit_data_get_unit(data),
59 v3d_unit_data_get_offset(data));
60 break;
61
62 case QUNIFORM_TMU_CONFIG_P1:
63 fprintf(stderr, "tex[%d].p1 | 0x%x",
64 v3d_unit_data_get_unit(data),
65 v3d_unit_data_get_offset(data));
66 break;
67
68 case QUNIFORM_IMAGE_TMU_CONFIG_P0:
69 fprintf(stderr, "img[%d].p0 | 0x%x",
70 v3d_unit_data_get_unit(data),
71 v3d_unit_data_get_offset(data));
72 break;
73
74 case QUNIFORM_TEXTURE_WIDTH:
75 fprintf(stderr, "tex[%d].width", data);
76 break;
77 case QUNIFORM_TEXTURE_HEIGHT:
78 fprintf(stderr, "tex[%d].height", data);
79 break;
80 case QUNIFORM_TEXTURE_DEPTH:
81 fprintf(stderr, "tex[%d].depth", data);
82 break;
83 case QUNIFORM_TEXTURE_ARRAY_SIZE:
84 fprintf(stderr, "tex[%d].array_size", data);
85 break;
86 case QUNIFORM_TEXTURE_LEVELS:
87 fprintf(stderr, "tex[%d].levels", data);
88 break;
89
90 case QUNIFORM_IMAGE_WIDTH:
91 fprintf(stderr, "img[%d].width", data);
92 break;
93 case QUNIFORM_IMAGE_HEIGHT:
94 fprintf(stderr, "img[%d].height", data);
95 break;
96 case QUNIFORM_IMAGE_DEPTH:
97 fprintf(stderr, "img[%d].depth", data);
98 break;
99 case QUNIFORM_IMAGE_ARRAY_SIZE:
100 fprintf(stderr, "img[%d].array_size", data);
101 break;
102
103 case QUNIFORM_SPILL_OFFSET:
104 fprintf(stderr, "spill_offset");
105 break;
106
107 case QUNIFORM_SPILL_SIZE_PER_THREAD:
108 fprintf(stderr, "spill_size_per_thread");
109 break;
110
111 case QUNIFORM_UBO_ADDR:
112 fprintf(stderr, "ubo[%d]+0x%x",
113 v3d_unit_data_get_unit(data),
114 v3d_unit_data_get_offset(data));
115 break;
116
117 case QUNIFORM_SSBO_OFFSET:
118 fprintf(stderr, "ssbo[%d]", data);
119 break;
120
121 case QUNIFORM_GET_SSBO_SIZE:
122 fprintf(stderr, "ssbo_size[%d]", data);
123 break;
124
125 case QUNIFORM_GET_UBO_SIZE:
126 fprintf(stderr, "ubo_size[%d]", data);
127 break;
128
129 case QUNIFORM_NUM_WORK_GROUPS:
130 fprintf(stderr, "num_wg.%c", data < 3 ? "xyz"[data] : '?');
131 break;
132
133 default:
134 if (quniform_contents_is_texture_p0(contents)) {
135 fprintf(stderr, "tex[%d].p0: 0x%08x",
136 contents - QUNIFORM_TEXTURE_CONFIG_P0_0,
137 data);
138 } else if (contents < ARRAY_SIZE(quniform_names) &&
139 quniform_names[contents]) {
140 fprintf(stderr, "%s",
141 quniform_names[contents]);
142 } else {
143 fprintf(stderr, "%d / 0x%08x", contents, data);
144 }
145 }
146 }
147
148 static void
vir_print_reg(struct v3d_compile * c,const struct qinst * inst,struct qreg reg)149 vir_print_reg(struct v3d_compile *c, const struct qinst *inst,
150 struct qreg reg)
151 {
152 switch (reg.file) {
153
154 case QFILE_NULL:
155 fprintf(stderr, "null");
156 break;
157
158 case QFILE_LOAD_IMM:
159 fprintf(stderr, "0x%08x (%f)", reg.index, uif(reg.index));
160 break;
161
162 case QFILE_REG:
163 fprintf(stderr, "rf%d", reg.index);
164 break;
165
166 case QFILE_MAGIC:
167 fprintf(stderr, "%s", v3d_qpu_magic_waddr_name(reg.index));
168 break;
169
170 case QFILE_SMALL_IMM: {
171 uint32_t unpacked;
172 bool ok = v3d_qpu_small_imm_unpack(c->devinfo,
173 inst->qpu.raddr_b,
174 &unpacked);
175 assert(ok); (void) ok;
176
177 if ((int)inst->qpu.raddr_b >= -16 &&
178 (int)inst->qpu.raddr_b <= 15)
179 fprintf(stderr, "%d", unpacked);
180 else
181 fprintf(stderr, "%f", uif(unpacked));
182 break;
183 }
184
185 case QFILE_VPM:
186 fprintf(stderr, "vpm%d.%d",
187 reg.index / 4, reg.index % 4);
188 break;
189
190 case QFILE_TEMP:
191 fprintf(stderr, "t%d", reg.index);
192 break;
193 }
194 }
195
196 static void
vir_dump_sig_addr(const struct v3d_device_info * devinfo,const struct v3d_qpu_instr * instr)197 vir_dump_sig_addr(const struct v3d_device_info *devinfo,
198 const struct v3d_qpu_instr *instr)
199 {
200 if (devinfo->ver < 41)
201 return;
202
203 if (!instr->sig_magic)
204 fprintf(stderr, ".rf%d", instr->sig_addr);
205 else {
206 const char *name = v3d_qpu_magic_waddr_name(instr->sig_addr);
207 if (name)
208 fprintf(stderr, ".%s", name);
209 else
210 fprintf(stderr, ".UNKNOWN%d", instr->sig_addr);
211 }
212 }
213
214 static void
vir_dump_sig(struct v3d_compile * c,struct qinst * inst)215 vir_dump_sig(struct v3d_compile *c, struct qinst *inst)
216 {
217 struct v3d_qpu_sig *sig = &inst->qpu.sig;
218
219 if (sig->thrsw)
220 fprintf(stderr, "; thrsw");
221 if (sig->ldvary) {
222 fprintf(stderr, "; ldvary");
223 vir_dump_sig_addr(c->devinfo, &inst->qpu);
224 }
225 if (sig->ldvpm)
226 fprintf(stderr, "; ldvpm");
227 if (sig->ldtmu) {
228 fprintf(stderr, "; ldtmu");
229 vir_dump_sig_addr(c->devinfo, &inst->qpu);
230 }
231 if (sig->ldtlb) {
232 fprintf(stderr, "; ldtlb");
233 vir_dump_sig_addr(c->devinfo, &inst->qpu);
234 }
235 if (sig->ldtlbu) {
236 fprintf(stderr, "; ldtlbu");
237 vir_dump_sig_addr(c->devinfo, &inst->qpu);
238 }
239 if (sig->ldunif)
240 fprintf(stderr, "; ldunif");
241 if (sig->ldunifrf) {
242 fprintf(stderr, "; ldunifrf");
243 vir_dump_sig_addr(c->devinfo, &inst->qpu);
244 }
245 if (sig->ldunifa)
246 fprintf(stderr, "; ldunifa");
247 if (sig->ldunifarf) {
248 fprintf(stderr, "; ldunifarf");
249 vir_dump_sig_addr(c->devinfo, &inst->qpu);
250 }
251 if (sig->wrtmuc)
252 fprintf(stderr, "; wrtmuc");
253 }
254
255 static void
vir_dump_alu(struct v3d_compile * c,struct qinst * inst)256 vir_dump_alu(struct v3d_compile *c, struct qinst *inst)
257 {
258 struct v3d_qpu_instr *instr = &inst->qpu;
259 int nsrc = vir_get_nsrc(inst);
260 enum v3d_qpu_input_unpack unpack[2];
261
262 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
263 fprintf(stderr, "%s", v3d_qpu_add_op_name(instr->alu.add.op));
264 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.ac));
265 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.apf));
266 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.auf));
267 fprintf(stderr, " ");
268
269 vir_print_reg(c, inst, inst->dst);
270 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.add.output_pack));
271
272 unpack[0] = instr->alu.add.a_unpack;
273 unpack[1] = instr->alu.add.b_unpack;
274 } else {
275 fprintf(stderr, "%s", v3d_qpu_mul_op_name(instr->alu.mul.op));
276 fprintf(stderr, "%s", v3d_qpu_cond_name(instr->flags.mc));
277 fprintf(stderr, "%s", v3d_qpu_pf_name(instr->flags.mpf));
278 fprintf(stderr, "%s", v3d_qpu_uf_name(instr->flags.muf));
279 fprintf(stderr, " ");
280
281 vir_print_reg(c, inst, inst->dst);
282 fprintf(stderr, "%s", v3d_qpu_pack_name(instr->alu.mul.output_pack));
283
284 unpack[0] = instr->alu.mul.a_unpack;
285 unpack[1] = instr->alu.mul.b_unpack;
286 }
287
288 for (int i = 0; i < nsrc; i++) {
289 fprintf(stderr, ", ");
290 vir_print_reg(c, inst, inst->src[i]);
291 fprintf(stderr, "%s", v3d_qpu_unpack_name(unpack[i]));
292 }
293
294 vir_dump_sig(c, inst);
295 }
296
297 void
vir_dump_inst(struct v3d_compile * c,struct qinst * inst)298 vir_dump_inst(struct v3d_compile *c, struct qinst *inst)
299 {
300 struct v3d_qpu_instr *instr = &inst->qpu;
301
302 switch (inst->qpu.type) {
303 case V3D_QPU_INSTR_TYPE_ALU:
304 vir_dump_alu(c, inst);
305 break;
306 case V3D_QPU_INSTR_TYPE_BRANCH:
307 fprintf(stderr, "b");
308 if (instr->branch.ub)
309 fprintf(stderr, "u");
310
311 fprintf(stderr, "%s",
312 v3d_qpu_branch_cond_name(instr->branch.cond));
313 fprintf(stderr, "%s", v3d_qpu_msfign_name(instr->branch.msfign));
314
315 switch (instr->branch.bdi) {
316 case V3D_QPU_BRANCH_DEST_ABS:
317 fprintf(stderr, " zero_addr+0x%08x", instr->branch.offset);
318 break;
319
320 case V3D_QPU_BRANCH_DEST_REL:
321 fprintf(stderr, " %d", instr->branch.offset);
322 break;
323
324 case V3D_QPU_BRANCH_DEST_LINK_REG:
325 fprintf(stderr, " lri");
326 break;
327
328 case V3D_QPU_BRANCH_DEST_REGFILE:
329 fprintf(stderr, " rf%d", instr->branch.raddr_a);
330 break;
331 }
332
333 if (instr->branch.ub) {
334 switch (instr->branch.bdu) {
335 case V3D_QPU_BRANCH_DEST_ABS:
336 fprintf(stderr, ", a:unif");
337 break;
338
339 case V3D_QPU_BRANCH_DEST_REL:
340 fprintf(stderr, ", r:unif");
341 break;
342
343 case V3D_QPU_BRANCH_DEST_LINK_REG:
344 fprintf(stderr, ", lri");
345 break;
346
347 case V3D_QPU_BRANCH_DEST_REGFILE:
348 fprintf(stderr, ", rf%d", instr->branch.raddr_a);
349 break;
350 }
351 }
352 break;
353 }
354
355 if (vir_has_uniform(inst)) {
356 fprintf(stderr, " (");
357 vir_dump_uniform(c->uniform_contents[inst->uniform],
358 c->uniform_data[inst->uniform]);
359 fprintf(stderr, ")");
360 }
361 }
362
363 void
vir_dump(struct v3d_compile * c)364 vir_dump(struct v3d_compile *c)
365 {
366 int ip = 0;
367 int pressure = 0;
368
369 vir_for_each_block(block, c) {
370 fprintf(stderr, "BLOCK %d:\n", block->index);
371 vir_for_each_inst(inst, block) {
372 if (c->live_intervals_valid) {
373 for (int i = 0; i < c->num_temps; i++) {
374 if (c->temp_start[i] == ip)
375 pressure++;
376 }
377
378 fprintf(stderr, "P%4d ", pressure);
379
380 bool first = true;
381
382 for (int i = 0; i < c->num_temps; i++) {
383 if (c->temp_start[i] != ip)
384 continue;
385
386 if (first) {
387 first = false;
388 } else {
389 fprintf(stderr, ", ");
390 }
391 if (BITSET_TEST(c->spillable, i))
392 fprintf(stderr, "S%4d", i);
393 else
394 fprintf(stderr, "U%4d", i);
395 }
396
397 if (first)
398 fprintf(stderr, " ");
399 else
400 fprintf(stderr, " ");
401 }
402
403 if (c->live_intervals_valid) {
404 bool first = true;
405
406 for (int i = 0; i < c->num_temps; i++) {
407 if (c->temp_end[i] != ip)
408 continue;
409
410 if (first) {
411 first = false;
412 } else {
413 fprintf(stderr, ", ");
414 }
415 fprintf(stderr, "E%4d", i);
416 pressure--;
417 }
418
419 if (first)
420 fprintf(stderr, " ");
421 else
422 fprintf(stderr, " ");
423 }
424
425 vir_dump_inst(c, inst);
426 fprintf(stderr, "\n");
427 ip++;
428 }
429 if (block->successors[1]) {
430 fprintf(stderr, "-> BLOCK %d, %d\n",
431 block->successors[0]->index,
432 block->successors[1]->index);
433 } else if (block->successors[0]) {
434 fprintf(stderr, "-> BLOCK %d\n",
435 block->successors[0]->index);
436 }
437 }
438 }
439