Searched defs:virtReg (Results 1 – 7 of 7) sorted by relevance
92 bool hasPhys(unsigned virtReg) const { in hasPhys()98 unsigned getPhys(unsigned virtReg) const { in getPhys()105 void assignVirt2Phys(unsigned virtReg, unsigned physReg) { in assignVirt2Phys()116 void clearVirt(unsigned virtReg) { in clearVirt()138 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { in setIsSplitFromReg()143 unsigned getPreSplitReg(unsigned virtReg) const { in getPreSplitReg()158 bool isAssignedReg(unsigned virtReg) const { in isAssignedReg()168 int getStackSlot(unsigned virtReg) const { in getStackSlot()
155 LiveInterval &virtReg() const { in virtReg() function
96 bool hasPhys(Register virtReg) const { in hasPhys()102 Register getPhys(Register virtReg) const { in getPhys()113 void clearVirt(Register virtReg) { in clearVirt()135 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()140 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()155 bool isAssignedReg(Register virtReg) const { in isAssignedReg()166 int getStackSlot(Register virtReg) const { in getStackSlot()
95 bool hasPhys(Register virtReg) const { in hasPhys()101 MCRegister getPhys(Register virtReg) const { in getPhys()112 void clearVirt(Register virtReg) { in clearVirt()134 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()139 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()154 bool isAssignedReg(Register virtReg) const { in isAssignedReg()165 int getStackSlot(Register virtReg) const { in getStackSlot()
83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
100 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()108 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()