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1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-gemm/MRxNRc4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qs8_gemm_minmax_ukernel_4x8c4__neondot(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gemm_minmax_ukernel_4x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     const int8_t* restrict a,
23     size_t a_stride,
24     const void* restrict w,
25     int8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN {
29   assert(mr != 0);
30   assert(mr <= 4);
31   assert(nc != 0);
32   assert(kc != 0);
33   assert(kc % sizeof(int8_t) == 0);
34   assert(a != NULL);
35   assert(w != NULL);
36   assert(c != NULL);
37 
38   kc = round_up_po2(kc, 4);
39   const int8_t* a0 = a;
40   int8_t* c0 = c;
41   const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride);
42   int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride);
43   if XNN_UNPREDICTABLE(mr < 2) {
44     a1 = a0;
45     c1 = c0;
46   }
47   const int8_t* a2 = (const int8_t*) ((uintptr_t) a1 + a_stride);
48   int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride);
49   if XNN_UNPREDICTABLE(mr <= 2) {
50     a2 = a1;
51     c2 = c1;
52   }
53   const int8_t* a3 = (const int8_t*) ((uintptr_t) a2 + a_stride);
54   int8_t* c3 = (int8_t*) ((uintptr_t) c2 + cm_stride);
55   if XNN_UNPREDICTABLE(mr != 4) {
56     a3 = a2;
57     c3 = c2;
58   }
59 
60   // Loop over groups of 8 columns.
61   do {
62     // Initialize accumulators with bias. 8 bias values are loaded from the
63     // weight matrix, at the start of the group of 8 columns.
64     int32x4_t vacc0x0123 = vld1q_s32(w); w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t));
65     int32x4_t vacc0x4567 = vld1q_s32(w); w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t));
66     int32x4_t vacc1x0123 = vacc0x0123;
67     int32x4_t vacc1x4567 = vacc0x4567;
68     int32x4_t vacc2x0123 = vacc0x0123;
69     int32x4_t vacc2x4567 = vacc0x4567;
70     int32x4_t vacc3x0123 = vacc0x0123;
71     int32x4_t vacc3x4567 = vacc0x4567;
72 
73     // Inner accumulation loop along the 8 columns.
74     size_t k = kc;
75     // 2x partial unrolled loop to load 8 bytes at a time.
76     while (k >= 8 * sizeof(int8_t)) {
77       // Load a 4x8 block of activations.
78       const int8x8_t va0x01234567 = vld1_s8(a0); a0 += 8;
79       const int8x8_t va1x01234567 = vld1_s8(a1); a1 += 8;
80       const int8x8_t va2x01234567 = vld1_s8(a2); a2 += 8;
81       const int8x8_t va3x01234567 = vld1_s8(a3); a3 += 8;
82 
83       // Load a 8x8 block of weights.
84       const int8x16_t vb0123x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
85       const int8x16_t vb0123x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
86       const int8x16_t vb4567x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
87       const int8x16_t vb4567x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
88 
89       // Multiply-accumulate: 4x8 * 8x8 --> 4x8.
90       vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb0123x0123, va0x01234567, 0);
91       vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb0123x4567, va0x01234567, 0);
92       vacc1x0123 = vdotq_lane_s32(vacc1x0123, vb0123x0123, va1x01234567, 0);
93       vacc1x4567 = vdotq_lane_s32(vacc1x4567, vb0123x4567, va1x01234567, 0);
94       vacc2x0123 = vdotq_lane_s32(vacc2x0123, vb0123x0123, va2x01234567, 0);
95       vacc2x4567 = vdotq_lane_s32(vacc2x4567, vb0123x4567, va2x01234567, 0);
96       vacc3x0123 = vdotq_lane_s32(vacc3x0123, vb0123x0123, va3x01234567, 0);
97       vacc3x4567 = vdotq_lane_s32(vacc3x4567, vb0123x4567, va3x01234567, 0);
98       vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb4567x0123, va0x01234567, 1);
99       vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb4567x4567, va0x01234567, 1);
100       vacc1x0123 = vdotq_lane_s32(vacc1x0123, vb4567x0123, va1x01234567, 1);
101       vacc1x4567 = vdotq_lane_s32(vacc1x4567, vb4567x4567, va1x01234567, 1);
102       vacc2x0123 = vdotq_lane_s32(vacc2x0123, vb4567x0123, va2x01234567, 1);
103       vacc2x4567 = vdotq_lane_s32(vacc2x4567, vb4567x4567, va2x01234567, 1);
104       vacc3x0123 = vdotq_lane_s32(vacc3x0123, vb4567x0123, va3x01234567, 1);
105       vacc3x4567 = vdotq_lane_s32(vacc3x4567, vb4567x4567, va3x01234567, 1);
106 
107       k -= 8 * sizeof(int8_t);
108     }
109     // Handle up to 4 final positions of `k`
110     if XNN_UNLIKELY(k != 0) {
111       // Load a 4x4 block of activations.
112       const int8x8_t va0x01234567 = vld1_s8(a0); a0 += 4;
113       const int8x8_t va1x01234567 = vld1_s8(a1); a1 += 4;
114       const int8x8_t va2x01234567 = vld1_s8(a2); a2 += 4;
115       const int8x8_t va3x01234567 = vld1_s8(a3); a3 += 4;
116 
117       // Load a 4x8 block of weights.
118       const int8x16_t vb0123x0123 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
119       const int8x16_t vb0123x4567 = vld1q_s8(w); w = (const void*) ((const int8_t*) w + 16);
120 
121       // Multiply-accumulate: 4x4 * 4x8 --> 4x8.
122       vacc0x0123 = vdotq_lane_s32(vacc0x0123, vb0123x0123, va0x01234567, 0);
123       vacc0x4567 = vdotq_lane_s32(vacc0x4567, vb0123x4567, va0x01234567, 0);
124       vacc1x0123 = vdotq_lane_s32(vacc1x0123, vb0123x0123, va1x01234567, 0);
125       vacc1x4567 = vdotq_lane_s32(vacc1x4567, vb0123x4567, va1x01234567, 0);
126       vacc2x0123 = vdotq_lane_s32(vacc2x0123, vb0123x0123, va2x01234567, 0);
127       vacc2x4567 = vdotq_lane_s32(vacc2x4567, vb0123x4567, va2x01234567, 0);
128       vacc3x0123 = vdotq_lane_s32(vacc3x0123, vb0123x0123, va3x01234567, 0);
129       vacc3x4567 = vdotq_lane_s32(vacc3x4567, vb0123x4567, va3x01234567, 0);
130     }
131 
132     // Post-accumulation work
133     const int32x4_t vright_shift = vld1q_dup_s32(&params->neon.right_shift);
134     const int32x4_t vzero_shift_mask = vreinterpretq_s32_u32(vceqq_s32(vright_shift, vmovq_n_s32(0)));
135 
136     const int32x4_t vproduct0x0123 = vqrdmulhq_n_s32(vacc0x0123, params->neon.multiplier);
137     const int32x4_t vproduct0x4567 = vqrdmulhq_n_s32(vacc0x4567, params->neon.multiplier);
138     const int32x4_t vproduct1x0123 = vqrdmulhq_n_s32(vacc1x0123, params->neon.multiplier);
139     const int32x4_t vproduct1x4567 = vqrdmulhq_n_s32(vacc1x4567, params->neon.multiplier);
140     const int32x4_t vproduct2x0123 = vqrdmulhq_n_s32(vacc2x0123, params->neon.multiplier);
141     const int32x4_t vproduct2x4567 = vqrdmulhq_n_s32(vacc2x4567, params->neon.multiplier);
142     const int32x4_t vproduct3x0123 = vqrdmulhq_n_s32(vacc3x0123, params->neon.multiplier);
143     const int32x4_t vproduct3x4567 = vqrdmulhq_n_s32(vacc3x4567, params->neon.multiplier);
144 
145     vacc0x0123 = vsraq_n_s32(vproduct0x0123, vbicq_s32(vacc0x0123, vzero_shift_mask), 31);
146     vacc0x4567 = vsraq_n_s32(vproduct0x4567, vbicq_s32(vacc0x4567, vzero_shift_mask), 31);
147     vacc1x0123 = vsraq_n_s32(vproduct1x0123, vbicq_s32(vacc1x0123, vzero_shift_mask), 31);
148     vacc1x4567 = vsraq_n_s32(vproduct1x4567, vbicq_s32(vacc1x4567, vzero_shift_mask), 31);
149     vacc2x0123 = vsraq_n_s32(vproduct2x0123, vbicq_s32(vacc2x0123, vzero_shift_mask), 31);
150     vacc2x4567 = vsraq_n_s32(vproduct2x4567, vbicq_s32(vacc2x4567, vzero_shift_mask), 31);
151     vacc3x0123 = vsraq_n_s32(vproduct3x0123, vbicq_s32(vacc3x0123, vzero_shift_mask), 31);
152     vacc3x4567 = vsraq_n_s32(vproduct3x4567, vbicq_s32(vacc3x4567, vzero_shift_mask), 31);
153 
154     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_shift);
155     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_shift);
156     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_shift);
157     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_shift);
158     vacc2x0123 = vrshlq_s32(vacc2x0123, vright_shift);
159     vacc2x4567 = vrshlq_s32(vacc2x4567, vright_shift);
160     vacc3x0123 = vrshlq_s32(vacc3x0123, vright_shift);
161     vacc3x4567 = vrshlq_s32(vacc3x4567, vright_shift);
162 
163     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->neon.output_zero_point);
164 #if XNN_ARCH_ARM64
165     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
166     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
167     const int16x8_t vacc2x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567), voutput_zero_point);
168     const int16x8_t vacc3x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc3x0123), vacc3x4567), voutput_zero_point);
169 
170     int8x16_t vout0x01234567_1x01234567 = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc1x01234567);
171     int8x16_t vout2x01234567_3x01234567 = vqmovn_high_s16(vqmovn_s16(vacc2x01234567), vacc3x01234567);
172 #else
173     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
174     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
175     const int16x8_t vacc2x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567)), voutput_zero_point);
176     const int16x8_t vacc3x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc3x0123), vqmovn_s32(vacc3x4567)), voutput_zero_point);
177 
178     int8x16_t vout0x01234567_1x01234567 = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc1x01234567));
179     int8x16_t vout2x01234567_3x01234567 = vcombine_s8(vqmovn_s16(vacc2x01234567), vqmovn_s16(vacc3x01234567));
180 #endif
181     const int8x16_t voutput_min = vld1q_dup_s8(&params->neon.output_min);
182     const int8x16_t voutput_max = vld1q_dup_s8(&params->neon.output_max);
183 
184     vout0x01234567_1x01234567 = vmaxq_s8(vout0x01234567_1x01234567, voutput_min);
185     vout2x01234567_3x01234567 = vmaxq_s8(vout2x01234567_3x01234567, voutput_min);
186 
187     vout0x01234567_1x01234567 = vminq_s8(vout0x01234567_1x01234567, voutput_max);
188     vout2x01234567_3x01234567 = vminq_s8(vout2x01234567_3x01234567, voutput_max);
189 
190     if (nc >= 8) {
191       // Main case where there the 8 columns fit in the destination.
192       vst1_s8(c0 + 0, vget_low_s8(vout0x01234567_1x01234567));
193       vst1_s8(c1 + 0, vget_high_s8(vout0x01234567_1x01234567));
194       vst1_s8(c2 + 0, vget_low_s8(vout2x01234567_3x01234567));
195       vst1_s8(c3 + 0, vget_high_s8(vout2x01234567_3x01234567));
196 
197       // Advance to the next 8 columns.
198       c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
199       c1 = (int8_t*) ((uintptr_t) c1 + cn_stride);
200       c2 = (int8_t*) ((uintptr_t) c2 + cn_stride);
201       c3 = (int8_t*) ((uintptr_t) c3 + cn_stride);
202 
203       a0 = (const int8_t*) ((uintptr_t) a0 - kc);
204       a1 = (const int8_t*) ((uintptr_t) a1 - kc);
205       a2 = (const int8_t*) ((uintptr_t) a2 - kc);
206       a3 = (const int8_t*) ((uintptr_t) a3 - kc);
207 
208       nc -= 8;
209     } else {
210       // Final case where not all of the 8 columns fit in the destination.
211       if (nc & 4) {
212         vst1q_lane_u32(__builtin_assume_aligned(c0, 1), vreinterpretq_u32_s8(vout0x01234567_1x01234567), 0); c0 += 4;
213         vst1q_lane_u32(__builtin_assume_aligned(c1, 1), vreinterpretq_u32_s8(vout0x01234567_1x01234567), 2); c1 += 4;
214         vst1q_lane_u32(__builtin_assume_aligned(c2, 1), vreinterpretq_u32_s8(vout2x01234567_3x01234567), 0); c2 += 4;
215         vst1q_lane_u32(__builtin_assume_aligned(c3, 1), vreinterpretq_u32_s8(vout2x01234567_3x01234567), 2); c3 += 4;
216         vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
217         vout2x01234567_3x01234567 = vextq_s8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 4);
218       }
219       if (nc & 2) {
220         vst1q_lane_u16(__builtin_assume_aligned(c0, 1), vreinterpretq_u16_s8(vout0x01234567_1x01234567), 0); c0 += 2;
221         vst1q_lane_u16(__builtin_assume_aligned(c1, 1), vreinterpretq_u16_s8(vout0x01234567_1x01234567), 4); c1 += 2;
222         vst1q_lane_u16(__builtin_assume_aligned(c2, 1), vreinterpretq_u16_s8(vout2x01234567_3x01234567), 0); c2 += 2;
223         vst1q_lane_u16(__builtin_assume_aligned(c3, 1), vreinterpretq_u16_s8(vout2x01234567_3x01234567), 4); c3 += 2;
224         vout0x01234567_1x01234567 = vextq_s8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
225         vout2x01234567_3x01234567 = vextq_s8(vout2x01234567_3x01234567, vout2x01234567_3x01234567, 2);
226       }
227       if (nc & 1) {
228         vst1q_lane_s8(c0, vout0x01234567_1x01234567, 0);
229         vst1q_lane_s8(c1, vout0x01234567_1x01234567, 8);
230         vst1q_lane_s8(c2, vout2x01234567_3x01234567, 0);
231         vst1q_lane_s8(c3, vout2x01234567_3x01234567, 8);
232       }
233 
234       nc = 0;
235     }
236   } while (nc != 0);
237 }
238