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Searched defs:zd (Results 1 – 21 of 21) sorted by relevance

/external/vixl/src/aarch64/
Dassembler-sve-aarch64.cc50 void Assembler::adr(const ZRegister& zd, const SVEMemOperand& addr) { in adr()
100 void Assembler::and_(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in and_()
107 void Assembler::dupm(const ZRegister& zd, uint64_t imm) { in dupm()
115 void Assembler::eor(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in eor()
122 void Assembler::orr(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in orr()
130 void Assembler::and_(const ZRegister& zd, in and_()
139 void Assembler::bic(const ZRegister& zd, in bic()
148 void Assembler::eor(const ZRegister& zd, in eor()
157 void Assembler::orr(const ZRegister& zd, in orr()
179 void Assembler::asr(const ZRegister& zd, in asr()
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Dmacro-assembler-sve-aarch64.cc33 const ZRegister& zd, in AddSubHelper()
70 const ZRegister& zd, in TrySingleAddSub()
94 const ZRegister& zd, in IntWideImmHelper()
129 void MacroAssembler::Mul(const ZRegister& zd, in Mul()
138 void MacroAssembler::Smin(const ZRegister& zd, in Smin()
148 void MacroAssembler::Smax(const ZRegister& zd, in Smax()
158 void MacroAssembler::Umax(const ZRegister& zd, in Umax()
168 void MacroAssembler::Umin(const ZRegister& zd, in Umin()
363 void MacroAssembler::Cpy(const ZRegister& zd, in Cpy()
427 void MacroAssembler::Fcpy(const ZRegister& zd, in Fcpy()
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Dmacro-assembler-aarch64.h3475 void Abs(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn) { in Abs()
3480 void Add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Add()
3485 void Add(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm) { in Add()
3492 void Adr(const ZRegister& zd, const SVEMemOperand& addr) { in Adr()
3505 void And(const ZRegister& zd, const ZRegister& zn, uint64_t imm) { in And()
3515 void And(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in And()
3534 void Asr(const ZRegister& zd, in Asr()
3546 void Asr(const ZRegister& zd, const ZRegister& zn, int shift) { in Asr()
3551 void Asr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Asr()
3556 void Asrd(const ZRegister& zd, in Asrd()
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Doperands-aarch64.h757 bool FitsInLane(const CPURegister& zd) const { in FitsInLane()
760 bool FitsInSignedLane(const CPURegister& zd) const { in FitsInSignedLane()
763 bool FitsInUnsignedLane(const CPURegister& zd) const { in FitsInUnsignedLane()
799 bool TryEncodeAsShiftedIntNForLane(const CPURegister& zd, T* imm) const { in TryEncodeAsShiftedIntNForLane()
839 bool TryEncodeAsShiftedIntNForLane(const CPURegister& zd, in TryEncodeAsShiftedIntNForLane()
851 bool TryEncodeAsIntNForLane(const CPURegister& zd, T* imm) const { in TryEncodeAsIntNForLane()
858 bool TryEncodeAsShiftedUintNForLane(const CPURegister& zd, T* imm) const { in TryEncodeAsShiftedUintNForLane()
876 bool TryEncodeAsShiftedUintNForLane(const CPURegister& zd, in TryEncodeAsShiftedUintNForLane()
Dsimulator-aarch64.cc7340 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEAddressGeneration() local
7413 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEBitwiseLogicalUnpredicated() local
7571 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEBitwiseShiftUnpredicated() local
7688 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEIncDecVectorByElementCount() local
7785 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVESaturatingIncDecVectorByElementCount() local
7968 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEFPTrigMulAddCoefficient() local
7983 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEFPArithmeticUnpredicated() local
8244 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEFPMulIndex() local
8255 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEFPMulAdd() local
8352 SimVRegister& zd = ReadVRegister(instr->GetRd()); in VisitSVEFPMulAddIndex() local
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Dassembler-aarch64.h4178 void fcpy(const ZRegister& zd, const PRegisterM& pg, Float16 imm) { in fcpy()
4209 void fdup(const ZRegister& zd, Float16 imm) { in fdup()
Dlogic-aarch64.cc6879 LogicVRegister zd, in SVEBitwiseLogicalUnpredicatedHelper()
6959 LogicVRegister zd, in SVEBitwiseImmHelper()
/external/zstd/lib/legacy/
Dzstd_legacy.h149 ZSTDv05_DCtx* const zd = ZSTDv05_createDCtx(); in ZSTD_decompressLegacy() local
159 ZSTDv06_DCtx* const zd = ZSTDv06_createDCtx(); in ZSTD_decompressLegacy() local
169 ZSTDv07_DCtx* const zd = ZSTDv07_createDCtx(); in ZSTD_decompressLegacy() local
Dzstd_v06.c3953 ZSTDv06_DCtx* zd; member
Dzstd_v07.c4318 ZSTDv07_DCtx* zd; member
/external/llvm-project/clang/test/SemaTemplate/
Dfriend.cpp81 Z2<double> zd; // expected-note {{in instantiation of}} variable
/external/libvpx/libvpx/vp8/encoder/
Dethreading.c377 MACROBLOCKD *zd = &z->e_mbd; in setup_mbby_copy() local
/external/zstd/tests/
Dzbufftest.c134 ZBUFF_DCtx* zd = ZBUFF_createDCtx_advanced(customMem); in basicUnitTests() local
283 ZBUFF_DCtx* zd; in fuzzerTests() local
Dzstreamtest.c275 ZSTD_DStream* zd = ZSTD_createDStream(); in basicUnitTests() local
1754 ZSTD_DStream* zd = ZSTD_createDStream(); /* will be re-created sometimes */ in fuzzerTests() local
2019 ZSTD_DStream* zd = ZSTD_createDStream(); /* will be reset sometimes */ in fuzzerTests_newAPI() local
Ddecodecorpus.c1352 ZSTD_DStream* zd = ZSTD_createDStream(); in testDecodeStreaming() local
/external/vixl/test/aarch64/
Dtest-api-aarch64.cc845 void TestEncodable(T value, const ZRegister& zd, int64_t expected_imm) { in TestEncodable()
850 void TestUnencodable(T value, const ZRegister& zd) { in TestUnencodable()
857 bool TestImpl(T value, const ZRegister& zd, int64_t expected_imm) { in TestImpl()
Dtest-assembler-sve-aarch64.cc445 ZRegister zd = z0.WithLaneSize(lane_size_in_bits); in MlaMlsHelper() local
5115 ZRegister zd = z0.WithLaneSize(lane_size_in_bits); in IntArithHelper() local
11685 int index) { in SdotUdotHelper()
11701 ZRegister zd = z0.WithLaneSize(lane_size_in_bits); in SdotUdotHelper() local
12166 ZRegister zd = z29.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12352 ZRegister zd = z26.WithLaneSize(lane_size_in_bits); in FPBinArithHelper() local
12863 ZRegister zd = z26.WithLaneSize(lane_size_in_bits); in BitwiseShiftWideElementsHelper() local
16711 ZRegister zd = z0.WithLaneSize(lane_size_in_bits); in FPMulAccHelper() local
/external/jemalloc_new/test/unit/
Demitter.c205 ssize_t zd = -456; in emit_types() local
/external/deqp/modules/gles2/functional/
Des2fDepthRangeTests.cpp105 inline float depthRangeTransform (const float zd, const float zNear, const float zFar) in depthRangeTransform()
/external/mdnsresponder/mDNSCore/
DuDNS.c1464 ZoneData *zd = (ZoneData*)question->QuestionContext; in GetZoneData_QuestionCallback() local
1567 mDNSlocal mStatus GetZoneData_StartQuery(mDNS *const m, ZoneData *zd, mDNSu16 qtype) in GetZoneData_StartQuery()
1608 ZoneData *zd = (ZoneData*)mDNSPlatformMemAllocate(sizeof(ZoneData)); in StartGetZoneData() local
/external/python/cpython3/Objects/
Dmemoryobject.c1639 Py_ssize_t zd; in pylong_as_zd() local
1686 Py_ssize_t zd; in unpack_single() local
1776 Py_ssize_t zd; in pack_single() local