| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | zip1.s | 10 zip1 z0.b, z0.b, z0.b label
16 zip1 z0.h, z0.h, z0.h label
22 zip1 z0.s, z0.s, z0.s label
28 zip1 z0.d, z0.d, z0.d label
34 zip1 z31.b, z31.b, z31.b label
40 zip1 z31.h, z31.h, z31.h label
46 zip1 z31.s, z31.s, z31.s label
52 zip1 z31.d, z31.d, z31.d label
58 zip1 p0.b, p0.b, p0.b label
64 zip1 p0.h, p0.h, p0.h label
[all …]
|
| D | zip1-diagnostics.s | 4 zip1 z10.h, z22.h, z31.x label
10 zip1 z10.h, z3.h, z15.b label
16 zip1 z1.h, z2.h label
22 zip1 z1.s, z2.s, z32.s label
28 zip1 p1.s, p2.s, p16.s label
34 zip1 z1.s, z2.s, p3.s label
40 zip1 p1.s, p2.s, z3.s label
50 zip1 z31.d, z31.d, z31.d label
56 zip1 z31.d, z31.d, z31.d label
|
| D | matrix-multiply-fp64.s | 239 zip1 z0.q, z1.q, z2.q label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2498 __ zip1(v22.V16B(), v9.V16B(), v6.V16B()); in GenerateTestSequenceNEON() local
2499 __ zip1(v23.V2D(), v11.V2D(), v2.V2D()); in GenerateTestSequenceNEON() local
2500 __ zip1(v26.V2S(), v16.V2S(), v9.V2S()); in GenerateTestSequenceNEON() local
2501 __ zip1(v1.V4H(), v9.V4H(), v7.V4H()); in GenerateTestSequenceNEON() local
2502 __ zip1(v0.V4S(), v30.V4S(), v20.V4S()); in GenerateTestSequenceNEON() local
2503 __ zip1(v30.V8B(), v17.V8B(), v15.V8B()); in GenerateTestSequenceNEON() local
2504 __ zip1(v17.V8H(), v8.V8H(), v2.V8H()); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 5438 void Assembler::zip1(const PRegisterWithLaneSize& pd, in zip1() function in vixl::aarch64::Assembler
5539 void Assembler::zip1(const ZRegister& zd, in zip1() function in vixl::aarch64::Assembler
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| D | assembler-aarch64.cc | 4874 void Assembler::zip1(const VRegister& vd, in zip1() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 4209 LogicVRegister Simulator::zip1(VectorFormat vform, in zip1() function in vixl::aarch64::Simulator
|