/external/llvm-project/llvm/test/Transforms/InstSimplify/ |
D | cmp-vec-fast-path.ll | 4 ; RUN: opt -instsimplify -S < %s | FileCheck %s 6 define <2 x i1> @i32cmp_eq_fixed_zero() { 7 ; CHECK-LABEL: @i32cmp_eq_fixed_zero( 8 ; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true> 10 %res = icmp eq <2 x i32> zeroinitializer, zeroinitializer 11 ret <2 x i1> %res 14 define <vscale x 2 x i1> @i32cmp_eq_scalable_zero() { 15 ; CHECK-LABEL: @i32cmp_eq_scalable_zero( 16 …-NEXT: ret <vscale x 2 x i1> shufflevector (<vscale x 2 x i1> insertelement (<vscale x 2 x i1> … 18 %res = icmp eq <vscale x 2 x i32> zeroinitializer, zeroinitializer [all …]
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | sve-intrinsics-int-arith-imm.ll | 2 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 3 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 6 ; WARN-NOT: warning 10 define <vscale x 16 x i8> @smax_i8(<vscale x 16 x i8> %a) { 11 ; CHECK-LABEL: smax_i8: 13 ; CHECK-NEXT: smax z0.b, z0.b, #-128 14 ; CHECK-NEXT: ret 15 %pg = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) 16 %elt = insertelement <vscale x 16 x i8> undef, i8 -128, i32 0 17 …%splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zero… [all …]
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D | sve-int-arith-imm.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 10 define <vscale x 16 x i8> @smax_i8_pos(<vscale x 16 x i8> %a) { 11 ; CHECK-LABEL: smax_i8_pos 13 ; CHECK-NEXT: ret 14 %elt = insertelement <vscale x 16 x i8> undef, i8 27, i32 0 15 …%splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zero… 16 %cmp = icmp sgt <vscale x 16 x i8> %a, %splat 17 %res = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %a, <vscale x 16 x i8> %splat [all …]
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D | sve-fp.ll | 2 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 3 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 6 ; WARN-NOT: warning 8 define <vscale x 8 x half> @fadd_nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) { 9 ; CHECK-LABEL: fadd_nxv8f16: 11 ; CHECK-NEXT: fadd z0.h, z0.h, z1.h 12 ; CHECK-NEXT: ret 13 %res = fadd <vscale x 8 x half> %a, %b 14 ret <vscale x 8 x half> %res 17 define <vscale x 4 x half> @fadd_nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) { [all …]
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D | sve-bitcast.ll | 2 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 3 ; RUN: not --crash llc -mtriple=aarch64_be -mattr=+sve < %s 4 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 7 ; WARN-NOT: warning 9 define <vscale x 16 x i8> @bitcast_i16_to_i8(<vscale x 8 x i16> %v) { 10 ; CHECK-LABEL: bitcast_i16_to_i8: 12 ; CHECK-NEXT: ret 13 %bc = bitcast <vscale x 8 x i16> %v to <vscale x 16 x i8> 14 ret <vscale x 16 x i8> %bc 17 define <vscale x 16 x i8> @bitcast_i32_to_i8(<vscale x 4 x i32> %v) { [all …]
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D | sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll | 1 ; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve --asm-verbose=false < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 8 ; immediate must be within the range [-8, 7] (4-bit immediate). Out of 12 define void @imm_out_of_range(<vscale x 2 x i64> * %base, <vscale x 2 x i1> %mask) nounwind { 13 ; CHECK-LABEL: imm_out_of_range: 14 ; CHECK-NEXT: rdvl x8, #8 15 ; CHECK-NEXT: add x8, x0, x8 16 ; CHECK-NEXT: ld1d { z[[DATA:[0-9]+]].d }, p0/z, [x{{[0-9]+}}] 17 ; CHECK-NEXT: rdvl x8, #-9 [all …]
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D | sve-intrinsics-int-compares.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 16 x i1> @cmpeq_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8… 12 ; CHECK-LABEL: cmpeq_b: 14 ; CHECK-NEXT: ret 15 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpeq.nxv16i8(<vscale x 16 x i1> %pg, 16 <vscale x 16 x i8> %a, 17 <vscale x 16 x i8> %b) 18 ret <vscale x 16 x i1> %out [all …]
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D | sve-vselect-imm.ll | 2 ; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 3 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 6 ; WARN-NOT: warning 8 define <vscale x 16 x i8> @sel_8_positive(<vscale x 16 x i1> %p) { 9 ; CHECK-LABEL: sel_8_positive: 11 ; CHECK-NEXT: mov z0.b, p0/z, #3 // =0x3 12 ; CHECK-NEXT: ret 13 …flevector <vscale x 16 x i8> insertelement (<vscale x 16 x i8> undef, i8 3, i32 0), <vscale x 16 x… 14 %sel = select <vscale x 16 x i1> %p, <vscale x 16 x i8> %vec, <vscale x 16 x i8> zeroinitializer 15 ret <vscale x 16 x i8> %sel [all …]
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D | sve-intrinsics-perm-select-matmul-fp64.ll | 1 ; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve,+f64mm -asm-verbose=0 < %s -o - 2>%t | FileC… 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 16 x i8> @trn1_i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) nounwind { 12 ; CHECK-LABEL: trn1_i8: 13 ; CHECK-NEXT: trn1 z0.q, z0.q, z1.q 14 ; CHECK-NEXT: ret 15 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.trn1q.nxv16i8(<vscale x 16 x i8> %a, 16 <vscale x 16 x i8> %b) 17 ret <vscale x 16 x i8> %out [all …]
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D | sve-intrinsics-int-compares-with-imm.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 15 define <vscale x 16 x i1> @ir_cmpeq_b(<vscale x 16 x i8> %a) { 16 ; CHECK-LABEL: ir_cmpeq_b 18 ; CHECK-NEXT: ret 19 %elt = insertelement <vscale x 16 x i8> undef, i8 4, i32 0 20 …%splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zero… 21 %out = icmp eq <vscale x 16 x i8> %a, %splat 22 ret <vscale x 16 x i1> %out [all …]
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D | sve-fp-rounding.ll | 1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --extra_scr… 2 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s 6 define <vscale x 8 x half> @frintp_nxv8f16(<vscale x 8 x half> %a) { 7 ; CHECK-LABEL: frintp_nxv8f16: 9 ; CHECK-NEXT: ptrue p0.h 10 ; CHECK-NEXT: frintp z0.h, p0/m, z0.h 11 ; CHECK-NEXT: ret 12 %res = call <vscale x 8 x half> @llvm.ceil.nxv8f16(<vscale x 8 x half> %a) 13 ret <vscale x 8 x half> %res 16 define <vscale x 4 x half> @frintp_nxv4f16(<vscale x 4 x half> %a) { [all …]
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D | sve-intrinsics-perm-select.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 16 x i8> @clasta_i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x … 12 ; CHECK-LABEL: clasta_i8: 14 ; CHECK-NEXT: ret 15 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.clasta.nxv16i8(<vscale x 16 x i1> %pg, 16 <vscale x 16 x i8> %a, 17 <vscale x 16 x i8> %b) 18 ret <vscale x 16 x i8> %out [all …]
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D | sve-calling-convention-tuple-types.ll | 1 ; RUN: llc -mtriple aarch64 -mattr=+sve -asm-verbose=0 < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 32 x i8> @ret_svint8x2_t(<vscale x 16 x i8> %unused_z0, <vscale x 16 x i8> %z1, <v… 12 ; CHECK-LABEL: ret_svint8x2_t 14 ; CHECK-NEXT: mov z1.d, z2.d 15 ; CHECK-NEXT: ret 16 …%tuple = tail call <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16… 17 ret <vscale x 32 x i8> %tuple 20 … void @call_svint8x2_t(<vscale x 16 x i8> %dummy_z0, <vscale x 16 x i8> %z1, <vscale x 16 x i8> %d… [all …]
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D | sve2-intrinsics-widening-dsp.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 8 x i16> @sabalb_b(<vscale x 8 x i16> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8… 12 ; CHECK-LABEL: sabalb_b: 14 ; CHECK-NEXT: ret 15 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.sabalb.nxv8i16(<vscale x 8 x i16> %a, 16 <vscale x 16 x i8> %b, 17 <vscale x 16 x i8> %c) 18 ret <vscale x 8 x i16> %out [all …]
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D | sve-fcvt.ll | 2 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 3 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 6 ; WARN-NOT: warning 12 define <vscale x 2 x float> @fcvts_nxv2f16(<vscale x 2 x half> %a) { 13 ; CHECK-LABEL: fcvts_nxv2f16: 15 ; CHECK-NEXT: ptrue p0.d 16 ; CHECK-NEXT: fcvt z0.s, p0/m, z0.h 17 ; CHECK-NEXT: ret 18 %res = fpext <vscale x 2 x half> %a to <vscale x 2 x float> 19 ret <vscale x 2 x float> %res [all …]
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D | sve-intrinsics-stN-reg-imm-addr-mode.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -asm-verbose=0 < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 17 …ine void @st2b_i8_valid_imm(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pr… 18 ; CHECK-LABEL: st2b_i8_valid_imm: 20 ; CHECK-NEXT: ret 21 %base = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %addr, i64 2, i64 0 22 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0, 23 <vscale x 16 x i8> %v1, 24 <vscale x 16 x i1> %pred, [all …]
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D | sve-intrinsics-fp-arith.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 8 x half> @fabd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x hal… 12 ; CHECK-LABEL: fabd_h: 14 ; CHECK-NEXT: ret 15 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %pg, 16 <vscale x 8 x half> %a, 17 <vscale x 8 x half> %b) 18 ret <vscale x 8 x half> %out [all …]
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D | sve-intrinsics-fp-arith-merging.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=sve -mattr=+use-experimental-zeroing-pseudos < %s 2>%t… 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 8 x half> @fadd_h_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 … 12 ; CHECK-LABEL: fadd_h_zero: 14 ; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z1.h 15 ; CHECK-NEXT: ret 16 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer 17 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg, 18 <vscale x 8 x half> %a_z, [all …]
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D | sve2-intrinsics-uniform-dsp.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 -asm-verbose=0 < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 16 x i8> @saba_i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8>… 12 ; CHECK-LABEL: saba_i8: 14 ; CHECK-NEXT: ret 15 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.saba.nxv16i8(<vscale x 16 x i8> %a, 16 <vscale x 16 x i8> %b, 17 <vscale x 16 x i8> %c) 18 ret <vscale x 16 x i8> %out [all …]
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D | sve-intrinsics-bfloat.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+bf16 -asm-verbose=0 < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 4 x float> @bfdot_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x… 12 ; CHECK-LABEL: bfdot_f32: 13 ; CHECK-NEXT: bfdot z0.s, z1.h, z2.h 14 ; CHECK-NEXT: ret 15 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfdot(<vscale x 4 x float> %a, <vscale x 8 x bf… 16 ret <vscale x 4 x float> %out 19 define <vscale x 4 x float> @bfdot_lane_0_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <v… [all …]
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D | sve-intrinsics-shifts-merging.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -mattr=+use-experimental-zeroing-pseudos < %s 2>%… 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 11 define <vscale x 16 x i8> @asr_i8_zero(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 … 12 ; CHECK-LABEL: asr_i8_zero: 14 ; CHECK-NEXT: asr z0.b, p0/m, z0.b, z1.b 15 ; CHECK-NEXT: ret 16 %a_z = select <vscale x 16 x i1> %pg, <vscale x 16 x i8> %a, <vscale x 16 x i8> zeroinitializer 17 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.asr.nxv16i8(<vscale x 16 x i1> %pg, 18 <vscale x 16 x i8> %a_z, [all …]
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D | sve-vector-splat.ll | 1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 5 ; WARN-NOT: warning 9 define <vscale x 16 x i8> @sve_splat_16xi8(i8 %val) { 10 ; CHECK-LABEL: @sve_splat_16xi8 12 ; CHECK-NEXT: ret 13 %ins = insertelement <vscale x 16 x i8> undef, i8 %val, i32 0 14 …%splat = shufflevector <vscale x 16 x i8> %ins, <vscale x 16 x i8> undef, <vscale x 16 x i32> zero… 15 ret <vscale x 16 x i8> %splat 18 define <vscale x 8 x i16> @sve_splat_8xi16(i16 %val) { [all …]
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/external/pcre/dist2/testdata/ |
D | testinput12 | 1 # This set of tests is for UTF-16 and UTF-32 support, including Unicode 2 # properties. It is relevant only to the 16-bit and 32-bit libraries. The 12 /\x{ffff}/IB,utf 14 /\x{10000}/IB,utf 16 /\x{100}/IB,utf 18 /\x{1000}/IB,utf 20 /\x{10000}/IB,utf 22 /\x{100000}/IB,utf 24 /\x{10ffff}/IB,utf 26 /[\x{ff}]/IB,utf [all …]
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/external/mesa3d/src/intel/isl/ |
D | isl_format.c | 35 /* Header-only format conversion include */ 61 #define x 255 macro 77 * smpl - Sampling Engine 78 * filt - Sampling Engine Filtering 79 * shad - Sampling Engine Shadow Map 80 * CK - Sampling Engine Chroma Key 81 * RT - Render Target 82 * AB - Alpha Blend Render Target 83 * VB - Input Vertex Buffer 84 * SO - Steamed Output Vertex Buffers (transform feedback) [all …]
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/external/llvm-project/clang/test/Analysis/ |
D | svalbuilder-rearrange-comparisons.c | 1 … -analyzer-checker=debug.ExprInspection,core.builtin -analyzer-config aggressive-binary-operation-… 3 void clang_analyzer_eval(int x); 4 void clang_analyzer_denote(int x, const char *literal); 5 void clang_analyzer_express(int x); 20 int x = g(); in f() local 23 assert(x <= ((int)INT_MAX / 4)); in f() 24 assert(x >= -((int)INT_MAX / 4)); in f() 25 return x; in f() 29 int x = f(), y = f(); in compare_different_symbol_equal() local 30 clang_analyzer_denote(x, "$x"); in compare_different_symbol_equal() [all …]
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