| /external/tensorflow/tensorflow/core/platform/ |
| D | ram_file_system_test.py | 44 with gfile.GFile('ram://a.txt', 'w') as f:
48 with gfile.GFile('ram://a.txt', 'r') as f:
52 with gfile.GFile('ram://c.txt', 'w') as f:
55 with gfile.GFile('ram://c.txt', 'w+') as f:
59 with gfile.GFile('ram://c.txt', 'r') as f:
64 with gfile.GFile('ram://a/b/%d.txt' % i, 'w') as f:
66 with gfile.GFile('ram://c/b/%d.txt' % i, 'w') as f:
69 matches = ['ram://a/b/%d.txt' % i for i in range(10)]
70 self.assertEqual(gfile.ListDirectory('ram://a/b/'), matches)
74 with gfile.GFile('ram://a/b/%d.txt' % i, 'w') as f:
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| /external/llvm-project/lld/test/ELF/linkerscript/ |
| D | memory.s | 4 ## Check simple RAM-only memory region.
6 # RUN: echo "MEMORY { ram (rwx) : ORIGIN = 0x8000, LENGTH = 256K } \
8 # RUN: .text : { *(.text) } > ram \
9 # RUN: .data : { *(.data) } > ram \
12 # RUN: llvm-readelf -S %t1 | FileCheck --check-prefix=RAM %s
14 # RAM: [ 1] .text PROGBITS 0000000000008000 001000 000001
15 # RAM-NEXT: [ 2] .data PROGBITS 0000000000008001 001001 001000
17 ## Check RAM and ROM memory regions.
20 # RUN: ram (rwx) : ORIGIN = 0, LENGTH = 1024M \
25 # RUN: .data : { *(.data) } >ram \
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| D | memory-err.s | 6 # RUN: echo 'MEMORY { ram (rwx) : XYZ = 0x8000 } }' > %t.script
12 # RUN: echo 'MEMORY { ram (rwx) : ORIGIN = 0x8000, XYZ = 256K } }' > %t.script
18 # RUN: echo 'MEMORY { ram (rwx) : o = 8, l = 256K ram (rx) : o = 0, l = 256K }' > %t.script
20 # ERR3: {{.*}}.script:1: region 'ram' already defined
24 # RUN: echo 'MEMORY { ram (!rx) : ORIGIN = 0x8000, LENGTH = 256K } \
27 # RUN: .data : { *(.data) } > ram \
34 # RUN: echo 'SECTIONS { .text : { *(.text) } > ram }' > %t.script
36 # ERR5: error: memory region 'ram' not declared
40 # RUN: echo 'MEMORY { ram (rwx) : ORIGIN = 0, LENGTH = 2K } \
42 # RUN: .text : { *(.text) } > ram \
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| D | symbol-memoryexpr.s | 5 # RUN: ram (rwx) : ORIGIN = 0x8000, LENGTH = 256K \
8 # RUN: origin = ORIGIN(ram); \
9 # RUN: length = LENGTH(ram); \
10 # RUN: end = ORIGIN(ram) + LENGTH(ram); \
21 # RUN: no_exist_origin = ORIGIN(ram); \
22 # RUN: no_exist_length = LENGTH(ram); \
26 # ERR: {{.*}}.script:1: memory region not defined: ram
|
| /external/arm-trusted-firmware/bl2/ |
| D | bl2.ld.S | 15 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
33 } >RAM
38 } >RAM
42 } >RAM
52 } >RAM
71 } >RAM
80 DATA_SECTION >RAM
81 STACK_SECTION >RAM
82 BSS_SECTION >RAM
83 XLAT_TABLE_SECTION >RAM
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| D | bl2_el3.ld.S | 17 RAM (rwx): ORIGIN = BL2_RW_BASE, LENGTH = BL2_RW_LIMIT - BL2_RW_BASE
19 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
24 #define ROM RAM
104 DATA_SECTION >RAM AT>ROM
108 RELA_SECTION >RAM
109 STACK_SECTION >RAM
110 BSS_SECTION >RAM
111 XLAT_TABLE_SECTION >RAM
131 } >RAM
|
| /external/arm-trusted-firmware/bl2u/ |
| D | bl2u.ld.S | 17 RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
35 } >RAM
40 } >RAM
44 } >RAM
54 } >RAM
73 } >RAM
82 DATA_SECTION >RAM
83 STACK_SECTION >RAM
84 BSS_SECTION >RAM
85 XLAT_TABLE_SECTION >RAM
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|
| /external/arm-trusted-firmware/bl32/tsp/ |
| D | tsp.ld.S | 16 RAM (rwx): ORIGIN = TSP_SEC_MEM_BASE, LENGTH = TSP_SEC_MEM_SIZE
34 } >RAM
44 } >RAM
64 } >RAM
73 DATA_SECTION >RAM
74 RELA_SECTION >RAM
80 STACK_SECTION >RAM
81 BSS_SECTION >RAM
82 XLAT_TABLE_SECTION >RAM
102 } >RAM
|
| /external/arm-trusted-firmware/bl32/sp_min/ |
| D | sp_min.ld.S | 15 RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE
36 } >RAM
41 } >RAM
45 } >RAM
59 } >RAM
83 } >RAM
94 DATA_SECTION >RAM
100 STACK_SECTION >RAM
101 BSS_SECTION >RAM
102 XLAT_TABLE_SECTION >RAM
[all …]
|
| /external/arm-trusted-firmware/plat/marvell/armada/a8k/common/ble/ |
| D | ble.ld.S | 15 RAM (rwx): ORIGIN = BLE_BASE, LENGTH = BLE_LIMIT - BLE_BASE
29 } >RAM
41 } >RAM
47 } >RAM
53 } >RAM
64 . = ORIGIN(RAM) + LENGTH(RAM) - 1;
66 } >RAM
|
| /external/pigweed/pw_persistent_ram/ |
| D | docs.rst | 7 persistent RAM. By persistent RAM we are referring to memory which is not
24 Persistent RAM Placement
26 Persistent RAM is typically provided through specially carved out linker script
70 Persistent RAM Lifecycle Management
72 In order for persistent RAM containers to be as useful as possible, any
73 invalidation of persistent RAM and the containers therein should be executed
75 are initialized in RAM.
77 The preferred way to clear Persistent RAM is to simply zero entire persistent
78 RAM sections and/or memory regions. Pigweed's persistents containers have picked
87 1. Do not instantiate regular types/objects in persistent RAM, ensure integrity
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| /external/tensorflow/tensorflow/lite/micro/tools/make/targets/stm32f4/ |
| D | stm32f4.lds | 19 /* 256K of RAM and 2048K of FLASH. Source: */
22 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
27 _ld_stack_end_addr = ORIGIN(RAM) + LENGTH(RAM);
54 /* read mwrite data needs to be stored in flash but copied to ram */
61 } >RAM AT> FLASH
72 } >RAM
80 } >RAM
|
| /external/tensorflow/tensorflow/lite/micro/tools/make/targets/bluepill/ |
| D | bluepill.lds | 20 * increased the flash size to 512K and RAM to 256K. This far exceeds the
37 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
42 _ld_stack_end_addr = ORIGIN(RAM) + LENGTH(RAM);
69 /* read mwrite data needs to be stored in flash but copied to ram */
76 } >RAM AT> FLASH
87 } >RAM
95 } >RAM
|
| /external/arm-trusted-firmware/bl31/ |
| D | bl31.ld.S | 16 RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE
20 #define NOBITS RAM
44 } >RAM
58 } >RAM
81 } >RAM
89 #define SPM_SHIM_EXCEPTIONS_VMA RAM
105 } >SPM_SHIM_EXCEPTIONS_VMA AT>RAM
117 DATA_SECTION >RAM
118 RELA_SECTION >RAM
|
| /external/cpuinfo/test/dmesg/ |
| D | zenfone-2.log | 7 [ 0.000000] e820: BIOS-provided physical RAM map:
50 [ 0.000000] total RAM covered: 4065M
51 [ 0.000000] gran_size: 64K chunk_size: 64K num_reg: 8 lose cover RAM: 3063M
52 [ 0.000000] gran_size: 64K chunk_size: 128K num_reg: 8 lose cover RAM: 3063M
53 [ 0.000000] gran_size: 64K chunk_size: 256K num_reg: 8 lose cover RAM: 3063M
54 [ 0.000000] gran_size: 64K chunk_size: 512K num_reg: 8 lose cover RAM: 3063M
55 [ 0.000000] gran_size: 64K chunk_size: 1M num_reg: 8 lose cover RAM: 3063M
56 [ 0.000000] gran_size: 64K chunk_size: 2M num_reg: 8 lose cover RAM: 3063M
57 [ 0.000000] gran_size: 64K chunk_size: 4M num_reg: 8 lose cover RAM: 3831M
58 [ 0.000000] gran_size: 64K chunk_size: 8M num_reg: 8 lose cover RAM: 3983M
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| /external/ms-tpm-20-ref/TPMCmd/tpm/src/subsystem/ |
| D | NvReserved.c | 57 // When an Index has the orderly attribute, the data is kept in RAM. This RAM is
63 // The attributes of an orderly index are maintained in RAM memory in order to
68 // of the index is kept in RAM. When an orderly Index is created or deleted, the
69 // RAM data is copied to NV backing store so that the image in the backing store
70 // matches the layout of RAM. In normal operation. The RAM data is also copied on
72 // to the backing store for RAM is when a counter is first written (TPMA_NV_WRITTEN
76 // the 'gp' PERSISTENT_DATA structure in RAM and mapped to locations in NV.
148 // If power was lost, need to re-establish the RAM data that is loaded from in NvPowerOn()
177 // Clear the RAM used for Orderly Index data in NvManufacture()
191 // This function is used to move reserved data from NV memory to RAM.
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| D | NvDynamic.c | 52 // When an Index has the orderly attribute, the data is kept in RAM. This RAM is
56 // The attributes of an orderly index are maintained in RAM memory in order to
61 // of the index is kept in RAM. When an orderly Index is created or deleted, the
62 // RAM data is copied to NV backing store so that the image in the backing store
63 // matches the layout of RAM. In normal operation. The RAM data is also copied on
65 // to the backing store for RAM is when a counter is first written (TPMA_NV_WRITTEN
69 // the 'gp' PERSISTENT_DATA structure in RAM and mapped to locations in NV.
382 //** RAM-based NV Index Data Access Functions
385 // The data layout in ram buffer is {size of(NV_handle + attributes + data
387 // for each NV Index data stored in RAM.
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| /external/pigweed/pw_boot_armv7m/ |
| D | basic_armv7m.ld | 18 * that have on-board memory-mapped RAM and FLASH. For more complex projects and
80 RAM(rwx) : \
149 } >RAM AT> FLASH
159 } >RAM
167 } >RAM
174 HIDDEN(_stack_size = ORIGIN(RAM) + LENGTH(RAM) - .);
178 "Error: Not enough RAM for desired minimum stack size.");
181 } >RAM
194 /* Region of .static_init_ram in RAM. */
|
| D | core_init.c | 32 // 1. Static variables must be loaded from flash to RAM.
77 // Static-init RAM (load static values into ram, .data section init). in StaticMemoryInit()
82 // Zero-init RAM (.bss section init). in StaticMemoryInit()
89 // of RAM. Note that code running before this function finishes memory
92 // Be EXTREMELY careful when running code before this function finishes RAM
98 // Run any init that must be done before static init of RAM which preps the in pw_boot_Entry()
99 // .data (static values not yet loaded into ram) and .bss sections (not yet in pw_boot_Entry()
|
| /external/rust/crates/gdbstub/examples/armv4t/test_bin/ |
| D | test.ld | 4 ram : ORIGIN = 0x55550000, LENGTH = 0x10000000
16 } > ram
21 } > ram
29 } > ram
38 } > ram
|
| /external/rust/crates/gdbstub/examples/armv4t_multicore/test_bin/ |
| D | test.ld | 4 ram : ORIGIN = 0x55550000, LENGTH = 0x10000000
16 } > ram
21 } > ram
29 } > ram
38 } > ram
|
| /external/linux-kselftest/tools/testing/selftests/vm/ |
| D | transhuge-stress.c | 60 size_t ram, len; in main() local
67 ram = sysconf(_SC_PHYS_PAGES); in main()
68 if (ram > SIZE_MAX / sysconf(_SC_PAGESIZE) / 4) in main()
69 ram = SIZE_MAX / 4; in main()
71 ram *= sysconf(_SC_PAGESIZE); in main()
74 len = ram; in main()
81 " and %zd MiB of ram", len >> HPAGE_SHIFT, len >> 20, in main()
98 map_len = ram >> (HPAGE_SHIFT - 1); in main()
|
| /external/igt-gpu-tools/lib/ |
| D | intel_os.c | 60 * The total amount of system RAM available in MB.
81 #error "Unknown how to get RAM size for this OS" in intel_get_total_ram_mb()
104 * The amount of unused system RAM available in MB.
152 #error "Unknown how to get available RAM for this OS" in intel_get_avail_ram_mb()
242 * least 3/4 of available RAM in intel_get_total_pinnable_mem()
318 mode & (CHECK_RAM | CHECK_SWAP) ? "RAM" : "", in __intel_check_memory()
344 * @mode: a bit field declaring whether the test will be run in RAM or in SWAP
349 * RAM and/or SWAP depending upon @mode) and determines whether there is
352 * Most tests should check that there is enough RAM to hold their working set.
353 * The rare swap thrashing tests should check that there is enough RAM + SWAP
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/ |
| D | STM32L4A6RG_FLASH.ld | 8 ** 1024KByte FLASH, 320KByte RAM
35 _estack = 0x20050000; /* end of RAM */
36 /* Generate a link error if heap and stack don't fit into RAM */
43 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K
133 /* Initialized data sections goes into RAM, load LMA copy after code */
143 } >RAM AT> FLASH
160 } >RAM
162 /* User_heap_stack section, used to check that there is enough RAM left */
171 } >RAM
|
| /external/arm-trusted-firmware/bl1/ |
| D | bl1.ld.S | 8 * The .data section gets copied from ROM to RAM at runtime.
24 RAM (rwx): ORIGIN = BL1_RW_BASE, LENGTH = BL1_RW_LIMIT - BL1_RW_BASE
98 DATA_SECTION >RAM AT>ROM
102 STACK_SECTION >RAM
103 BSS_SECTION >RAM
104 XLAT_TABLE_SECTION >RAM
124 } >RAM
|