| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | avx512vl-mov.ll | 9 %vaddr = bitcast i8* %addr to <8 x i32>*
10 %res = load <8 x i32>, <8 x i32>* %vaddr, align 1
19 %vaddr = bitcast i8* %addr to <8 x i32>*
20 %res = load <8 x i32>, <8 x i32>* %vaddr, align 32
29 %vaddr = bitcast i8* %addr to <4 x i64>*
30 store <4 x i64>%data, <4 x i64>* %vaddr, align 32
39 %vaddr = bitcast i8* %addr to <8 x i32>*
40 store <8 x i32>%data, <8 x i32>* %vaddr, align 1
49 %vaddr = bitcast i8* %addr to <8 x i32>*
50 store <8 x i32>%data, <8 x i32>* %vaddr, align 32
[all …]
|
| D | avx512bwvl-mov.ll | 9 %vaddr = bitcast i8* %addr to <32 x i8>*
10 %res = load <32 x i8>, <32 x i8>* %vaddr, align 1
19 %vaddr = bitcast i8* %addr to <32 x i8>*
20 store <32 x i8>%data, <32 x i8>* %vaddr, align 1
31 %vaddr = bitcast i8* %addr to <32 x i8>*
32 %r = load <32 x i8>, <32 x i8>* %vaddr, align 1
44 %vaddr = bitcast i8* %addr to <32 x i8>*
45 %r = load <32 x i8>, <32 x i8>* %vaddr, align 1
55 %vaddr = bitcast i8* %addr to <16 x i16>*
56 %res = load <16 x i16>, <16 x i16>* %vaddr, align 1
[all …]
|
| D | avx512-mov.ll | 156 %vaddr = bitcast i8* %addr to <16 x i32>*
157 %res = load <16 x i32>, <16 x i32>* %vaddr, align 1
166 %vaddr = bitcast i8* %addr to <16 x i32>*
167 %res = load <16 x i32>, <16 x i32>* %vaddr, align 64
176 %vaddr = bitcast i8* %addr to <8 x i64>*
177 store <8 x i64>%data, <8 x i64>* %vaddr, align 64
186 %vaddr = bitcast i8* %addr to <16 x i32>*
187 store <16 x i32>%data, <16 x i32>* %vaddr, align 1
196 %vaddr = bitcast i8* %addr to <16 x i32>*
197 store <16 x i32>%data, <16 x i32>* %vaddr, align 64
[all …]
|
| /external/llvm/test/Analysis/CostModel/AMDGPU/ |
| D | add-sub.ll | 6 define void @add_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
7 %vec = load i32, i32 addrspace(1)* %vaddr
15 define void @add_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr, <2 x i32> %b) …
16 %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
24 define void @add_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr, <3 x i32> %b) …
25 %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
33 define void @add_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr, <4 x i32> %b) …
34 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
42 define void @add_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
43 %vec = load i64, i64 addrspace(1)* %vaddr
[all …]
|
| D | extractelement.ll | 5 define void @extractelement_v2i32(i32 addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr) {
6 %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
14 define void @extractelement_v2f32(float addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) {
15 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
23 define void @extractelement_v3i32(i32 addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr) {
24 %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
32 define void @extractelement_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr) {
33 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
41 define void @extractelement_v8i32(i32 addrspace(1)* %out, <8 x i32> addrspace(1)* %vaddr) {
42 %vec = load <8 x i32>, <8 x i32> addrspace(1)* %vaddr
[all …]
|
| D | mul.ll | 5 define void @mul_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
6 %vec = load i32, i32 addrspace(1)* %vaddr
14 define void @mul_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr, <2 x i32> %b) …
15 %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
23 define void @mul_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr, <3 x i32> %b) …
24 %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
32 define void @mul_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr, <4 x i32> %b) …
33 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
41 define void @mul_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
42 %vec = load i64, i64 addrspace(1)* %vaddr
[all …]
|
| D | fmul.ll | 6 define void @fmul_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
7 %vec = load float, float addrspace(1)* %vaddr
15 define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x floa…
16 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
24 define void @fmul_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x floa…
25 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
34 define void @fmul_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
35 %vec = load double, double addrspace(1)* %vaddr
44 define void @fmul_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x do…
45 %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
[all …]
|
| D | fadd.ll | 6 define void @fadd_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
7 %vec = load float, float addrspace(1)* %vaddr
15 define void @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x floa…
16 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
24 define void @fadd_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x floa…
25 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
34 define void @fadd_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
35 %vec = load double, double addrspace(1)* %vaddr
44 define void @fadd_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x do…
45 %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
[all …]
|
| D | fsub.ll | 6 define void @fsub_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
7 %vec = load float, float addrspace(1)* %vaddr
15 define void @fsub_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x floa…
16 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
24 define void @fsub_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x floa…
25 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
34 define void @fsub_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
35 %vec = load double, double addrspace(1)* %vaddr
44 define void @fsub_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x do…
45 %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
[all …]
|
| D | fdiv.ll | 8 define void @fdiv_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
9 %vec = load float, float addrspace(1)* %vaddr
17 define void @fdiv_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x floa…
18 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
26 define void @fdiv_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x floa…
27 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
38 define void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
39 %vec = load double, double addrspace(1)* %vaddr
50 define void @fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x do…
51 %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
[all …]
|
| D | fabs.ll | 5 define void @fabs_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr) #0 {
6 %vec = load float, float addrspace(1)* %vaddr
14 define void @fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) #0 {
15 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
23 define void @fabs_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr) #0 {
24 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
32 define void @fabs_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr) #0 {
33 %vec = load double, double addrspace(1)* %vaddr
41 define void @fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr) #0 {
42 %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
[all …]
|
| /external/llvm-project/llvm/test/Analysis/CostModel/AMDGPU/ |
| D | extractelement.ll | 11 … amdgpu_kernel void @extractelement_v2i32(i32 addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr) {
12 %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
20 …gpu_kernel void @extractelement_v2f32(float addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) {
21 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
29 … amdgpu_kernel void @extractelement_v3i32(i32 addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr) {
30 %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
38 … amdgpu_kernel void @extractelement_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr) {
39 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
47 … amdgpu_kernel void @extractelement_v5i32(i32 addrspace(1)* %out, <5 x i32> addrspace(1)* %vaddr) {
48 %vec = load <5 x i32>, <5 x i32> addrspace(1)* %vaddr
[all …]
|
| D | add-sub.ll | 9 define amdgpu_kernel void @add_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
10 %vec = load i32, i32 addrspace(1)* %vaddr
18 define amdgpu_kernel void @add_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr, …
19 %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
29 define amdgpu_kernel void @add_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr, …
30 %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
38 define amdgpu_kernel void @add_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr, …
39 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
49 define amdgpu_kernel void @add_v5i32(<5 x i32> addrspace(1)* %out, <5 x i32> addrspace(1)* %vaddr, …
50 %vec = load <5 x i32>, <5 x i32> addrspace(1)* %vaddr
[all …]
|
| D | fdiv.ll | 16 define amdgpu_kernel void @fdiv_f32_ieee(float addrspace(1)* %out, float addrspace(1)* %vaddr, floa…
17 %vec = load float, float addrspace(1)* %vaddr
26 define amdgpu_kernel void @fdiv_f32_ftzdaz(float addrspace(1)* %out, float addrspace(1)* %vaddr, fl…
27 %vec = load float, float addrspace(1)* %vaddr
36 …div_v2f32_ieee(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #…
37 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
46 …v_v2f32_ftzdaz(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #…
47 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
56 …div_v3f32_ieee(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #…
57 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
[all …]
|
| D | shifts.ll | 8 define amdgpu_kernel void @shl_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
9 %vec = load i32, i32 addrspace(1)* %vaddr
19 define amdgpu_kernel void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
20 %vec = load i64, i64 addrspace(1)* %vaddr
28 define amdgpu_kernel void @shl_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %vaddr, i16 %b) #0 {
29 %vec = load i16, i16 addrspace(1)* %vaddr
38 define amdgpu_kernel void @shl_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, …
39 %vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
47 define amdgpu_kernel void @lshr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
48 %vec = load i32, i32 addrspace(1)* %vaddr
[all …]
|
| D | fneg.ll | 6 define amdgpu_kernel void @fneg_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr) {
7 %vec = load float, float addrspace(1)* %vaddr
16 … amdgpu_kernel void @fneg_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) {
17 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
26 … amdgpu_kernel void @fneg_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr) {
27 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
36 … amdgpu_kernel void @fneg_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr) {
37 %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
46 define amdgpu_kernel void @fneg_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr) {
47 %vec = load double, double addrspace(1)* %vaddr
[all …]
|
| D | mul.ll | 9 define amdgpu_kernel void @mul_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
10 %vec = load i32, i32 addrspace(1)* %vaddr
19 define amdgpu_kernel void @mul_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr, …
20 %vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
29 define amdgpu_kernel void @mul_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr, …
30 %vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
39 define amdgpu_kernel void @mul_v5i32(<5 x i32> addrspace(1)* %out, <5 x i32> addrspace(1)* %vaddr, …
40 %vec = load <5 x i32>, <5 x i32> addrspace(1)* %vaddr
49 define amdgpu_kernel void @mul_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr, …
50 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
[all …]
|
| D | bit-ops.ll | 8 define amdgpu_kernel void @or_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
9 %vec = load i32, i32 addrspace(1)* %vaddr
17 define amdgpu_kernel void @or_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
18 %vec = load i64, i64 addrspace(1)* %vaddr
27 define amdgpu_kernel void @or_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, <…
28 %vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
36 define amdgpu_kernel void @xor_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
37 %vec = load i32, i32 addrspace(1)* %vaddr
45 define amdgpu_kernel void @xor_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
46 %vec = load i64, i64 addrspace(1)* %vaddr
[all …]
|
| D | fabs.ll | 6 define amdgpu_kernel void @fabs_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr) #0 {
7 %vec = load float, float addrspace(1)* %vaddr
15 …dgpu_kernel void @fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) #0 {
16 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
24 …dgpu_kernel void @fabs_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr) #0 {
25 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
33 …dgpu_kernel void @fabs_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr) #0 {
34 %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
42 define amdgpu_kernel void @fabs_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr) #0 {
43 %vec = load double, double addrspace(1)* %vaddr
[all …]
|
| D | fmul.ll | 8 define amdgpu_kernel void @fmul_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b)…
9 %vec = load float, float addrspace(1)* %vaddr
17 …id @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #…
18 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
26 …id @fmul_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #…
27 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
35 …id @fmul_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #…
36 %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
46 define amdgpu_kernel void @fmul_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double …
47 %vec = load double, double addrspace(1)* %vaddr
[all …]
|
| D | fsub.ll | 8 define amdgpu_kernel void @fsub_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b)…
9 %vec = load float, float addrspace(1)* %vaddr
17 …id @fsub_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #…
18 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
26 …id @fsub_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #…
27 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
35 …id @fsub_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #…
36 %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
46 define amdgpu_kernel void @fsub_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double …
47 %vec = load double, double addrspace(1)* %vaddr
[all …]
|
| D | fadd.ll | 8 define amdgpu_kernel void @fadd_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b)…
9 %vec = load float, float addrspace(1)* %vaddr
17 …id @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #…
18 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
26 …id @fadd_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #…
27 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
35 …id @fadd_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #…
36 %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
46 define amdgpu_kernel void @fadd_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double …
47 %vec = load double, double addrspace(1)* %vaddr
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | avx512vl-mov.ll | 9 %vaddr = bitcast i8* %addr to <8 x i32>*
10 %res = load <8 x i32>, <8 x i32>* %vaddr, align 1
19 %vaddr = bitcast i8* %addr to <8 x i32>*
20 %res = load <8 x i32>, <8 x i32>* %vaddr, align 32
29 %vaddr = bitcast i8* %addr to <4 x i64>*
30 store <4 x i64>%data, <4 x i64>* %vaddr, align 32
39 %vaddr = bitcast i8* %addr to <8 x i32>*
40 store <8 x i32>%data, <8 x i32>* %vaddr, align 1
49 %vaddr = bitcast i8* %addr to <8 x i32>*
50 store <8 x i32>%data, <8 x i32>* %vaddr, align 32
[all …]
|
| D | avx512bwvl-mov.ll | 9 %vaddr = bitcast i8* %addr to <32 x i8>*
10 %res = load <32 x i8>, <32 x i8>* %vaddr, align 1
19 %vaddr = bitcast i8* %addr to <32 x i8>*
20 store <32 x i8>%data, <32 x i8>* %vaddr, align 1
32 %vaddr = bitcast i8* %addr to <32 x i8>*
33 %r = load <32 x i8>, <32 x i8>* %vaddr, align 1
46 %vaddr = bitcast i8* %addr to <32 x i8>*
47 %r = load <32 x i8>, <32 x i8>* %vaddr, align 1
57 %vaddr = bitcast i8* %addr to <16 x i16>*
58 %res = load <16 x i16>, <16 x i16>* %vaddr, align 1
[all …]
|
| /external/llvm-project/llvm/test/tools/llvm-objcopy/ELF/ |
| D | preserve-segment-contents.test | 315 VAddr: 0x2000
321 VAddr: 0x2100
327 VAddr: 0x2200
333 VAddr: 0x2300
339 VAddr: 0x2308
344 VAddr: 0x3000
350 VAddr: 0x3002
354 VAddr: 0x3004
359 VAddr: 0x3008
364 VAddr: 0x300C
[all …]
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