1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128 2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM 3; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,NO-SIMD128 4 5; Test that basic SIMD128 vector manipulation operations assemble as expected. 6 7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 8target triple = "wasm32-unknown-unknown" 9 10; ============================================================================== 11; 16 x i8 12; ============================================================================== 13; CHECK-LABEL: const_v16i8: 14; NO-SIMD128-NOT: i8x16 15; SIMD128-VM-NOT: v128.const 16; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}} 17; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 18; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 19; SIMD128-NEXT: return $pop[[R]]{{$}} 20define <16 x i8> @const_v16i8() { 21 ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07, 22 i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15> 23} 24 25; CHECK-LABEL: splat_v16i8: 26; NO-SIMD128-NOT: i8x16 27; SIMD128-NEXT: .functype splat_v16i8 (i32) -> (v128){{$}} 28; SIMD128-NEXT: i8x16.splat $push[[R:[0-9]+]]=, $0{{$}} 29; SIMD128-NEXT: return $pop[[R]]{{$}} 30define <16 x i8> @splat_v16i8(i8 %x) { 31 %v = insertelement <16 x i8> undef, i8 %x, i32 0 32 %res = shufflevector <16 x i8> %v, <16 x i8> undef, 33 <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, 34 i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> 35 ret <16 x i8> %res 36} 37 38; CHECK-LABEL: const_splat_v16i8: 39; SIMD128: v128.const $push0=, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42{{$}} 40define <16 x i8> @const_splat_v16i8() { 41 ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, 42 i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42> 43} 44 45; CHECK-LABEL: extract_v16i8_s: 46; NO-SIMD128-NOT: i8x16 47; SIMD128-NEXT: .functype extract_v16i8_s (v128) -> (i32){{$}} 48; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 13{{$}} 49; SIMD128-NEXT: return $pop[[R]]{{$}} 50define i32 @extract_v16i8_s(<16 x i8> %v) { 51 %elem = extractelement <16 x i8> %v, i8 13 52 %a = sext i8 %elem to i32 53 ret i32 %a 54} 55 56; CHECK-LABEL: extract_var_v16i8_s: 57; NO-SIMD128-NOT: i8x16 58; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}} 59; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer 60; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16 61; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]] 62; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]] 63; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0 64; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15 65; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]] 66; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]] 67; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]]) 68; SIMD128-NEXT: return $pop[[R]] 69define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) { 70 %elem = extractelement <16 x i8> %v, i32 %i 71 %a = sext i8 %elem to i32 72 ret i32 %a 73} 74 75; CHECK-LABEL: extract_undef_v16i8_s: 76; NO-SIMD128-NOT: i8x16 77; SIMD128-NEXT: .functype extract_undef_v16i8_s (v128) -> (i32){{$}} 78; SIMD128-NEXT: i8x16.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}} 79; SIMD128-NEXT: return $pop[[R]]{{$}} 80define i32 @extract_undef_v16i8_s(<16 x i8> %v) { 81 %elem = extractelement <16 x i8> %v, i8 undef 82 %a = sext i8 %elem to i32 83 ret i32 %a 84} 85 86; CHECK-LABEL: extract_v16i8_u: 87; NO-SIMD128-NOT: i8x16 88; SIMD128-NEXT: .functype extract_v16i8_u (v128) -> (i32){{$}} 89; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}} 90; SIMD128-NEXT: return $pop[[R]]{{$}} 91define i32 @extract_v16i8_u(<16 x i8> %v) { 92 %elem = extractelement <16 x i8> %v, i8 13 93 %a = zext i8 %elem to i32 94 ret i32 %a 95} 96 97; CHECK-LABEL: extract_var_v16i8_u: 98; NO-SIMD128-NOT: i8x16 99; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}} 100; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 101; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 102; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 103; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 104; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 105; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}} 106; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 107; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}} 108; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}} 109; SIMD128-NEXT: return $pop[[R]]{{$}} 110define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) { 111 %elem = extractelement <16 x i8> %v, i32 %i 112 %a = zext i8 %elem to i32 113 ret i32 %a 114} 115 116; CHECK-LABEL: extract_undef_v16i8_u: 117; NO-SIMD128-NOT: i8x16 118; SIMD128-NEXT: .functype extract_undef_v16i8_u (v128) -> (i32){{$}} 119; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 120; SIMD128-NEXT: return $pop[[R]]{{$}} 121define i32 @extract_undef_v16i8_u(<16 x i8> %v) { 122 %elem = extractelement <16 x i8> %v, i8 undef 123 %a = zext i8 %elem to i32 124 ret i32 %a 125} 126 127; CHECK-LABEL: extract_v16i8: 128; NO-SIMD128-NOT: i8x16 129; SIMD128-NEXT: .functype extract_v16i8 (v128) -> (i32){{$}} 130; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 13{{$}} 131; SIMD128-NEXT: return $pop[[R]]{{$}} 132define i8 @extract_v16i8(<16 x i8> %v) { 133 %elem = extractelement <16 x i8> %v, i8 13 134 ret i8 %elem 135} 136 137; CHECK-LABEL: extract_var_v16i8: 138; NO-SIMD128-NOT: i8x16 139; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}} 140; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 141; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 142; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 143; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 144; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 145; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}} 146; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 147; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}} 148; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}} 149; SIMD128-NEXT: return $pop[[R]]{{$}} 150define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) { 151 %elem = extractelement <16 x i8> %v, i32 %i 152 ret i8 %elem 153} 154 155; CHECK-LABEL: extract_undef_v16i8: 156; NO-SIMD128-NOT: i8x16 157; SIMD128-NEXT: .functype extract_undef_v16i8 (v128) -> (i32){{$}} 158; SIMD128-NEXT: i8x16.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 159; SIMD128-NEXT: return $pop[[R]]{{$}} 160define i8 @extract_undef_v16i8(<16 x i8> %v) { 161 %elem = extractelement <16 x i8> %v, i8 undef 162 ret i8 %elem 163} 164 165; CHECK-LABEL: replace_v16i8: 166; NO-SIMD128-NOT: i8x16 167; SIMD128-NEXT: .functype replace_v16i8 (v128, i32) -> (v128){{$}} 168; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 11, $1{{$}} 169; SIMD128-NEXT: return $pop[[R]]{{$}} 170define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) { 171 %res = insertelement <16 x i8> %v, i8 %x, i32 11 172 ret <16 x i8> %res 173} 174 175; CHECK-LABEL: replace_var_v16i8: 176; NO-SIMD128-NOT: i8x16 177; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}} 178; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 179; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 180; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 181; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 182; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 183; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}} 184; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 185; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}} 186; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}} 187; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 188; SIMD128-NEXT: return $pop[[R]]{{$}} 189define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) { 190 %res = insertelement <16 x i8> %v, i8 %x, i32 %i 191 ret <16 x i8> %res 192} 193 194; CHECK-LABEL: replace_zero_v16i8: 195; NO-SIMD128-NOT: i8x16 196; SIMD128-NEXT: .functype replace_zero_v16i8 (v128, i32) -> (v128){{$}} 197; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 198; SIMD128-NEXT: return $pop[[R]]{{$}} 199define <16 x i8> @replace_zero_v16i8(<16 x i8> %v, i8 %x) { 200 %res = insertelement <16 x i8> %v, i8 %x, i32 0 201 ret <16 x i8> %res 202} 203 204; CHECK-LABEL: shuffle_v16i8: 205; NO-SIMD128-NOT: v8x16 206; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}} 207; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 208; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}} 209; SIMD128-NEXT: return $pop[[R]]{{$}} 210define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) { 211 %res = shufflevector <16 x i8> %x, <16 x i8> %y, 212 <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, 213 i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31> 214 ret <16 x i8> %res 215} 216 217; CHECK-LABEL: shuffle_undef_v16i8: 218; NO-SIMD128-NOT: v8x16 219; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}} 220; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 221; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 222; SIMD128-NEXT: return $pop[[R]]{{$}} 223define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) { 224 %res = shufflevector <16 x i8> %x, <16 x i8> %y, 225 <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, 226 i32 undef, i32 undef, i32 undef, i32 undef, 227 i32 undef, i32 undef, i32 undef, i32 undef, 228 i32 undef, i32 undef, i32 undef, i32 undef> 229 ret <16 x i8> %res 230} 231 232; CHECK-LABEL: build_v16i8: 233; NO-SIMD128-NOT: i8x16 234; SIMD128-NEXT: .functype build_v16i8 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}} 235; SIMD128-NEXT: i8x16.splat $push[[L0:[0-9]+]]=, $0{{$}} 236; SIMD128-NEXT: i8x16.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 237; SIMD128-NEXT: i8x16.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 238; SIMD128-NEXT: i8x16.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 239; SIMD128-NEXT: i8x16.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}} 240; SIMD128-NEXT: i8x16.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}} 241; SIMD128-NEXT: i8x16.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}} 242; SIMD128-NEXT: i8x16.replace_lane $push[[L7:[0-9]+]]=, $pop[[L6]], 7, $7{{$}} 243; SIMD128-NEXT: i8x16.replace_lane $push[[L8:[0-9]+]]=, $pop[[L7]], 8, $8{{$}} 244; SIMD128-NEXT: i8x16.replace_lane $push[[L9:[0-9]+]]=, $pop[[L8]], 9, $9{{$}} 245; SIMD128-NEXT: i8x16.replace_lane $push[[L10:[0-9]+]]=, $pop[[L9]], 10, $10{{$}} 246; SIMD128-NEXT: i8x16.replace_lane $push[[L11:[0-9]+]]=, $pop[[L10]], 11, $11{{$}} 247; SIMD128-NEXT: i8x16.replace_lane $push[[L12:[0-9]+]]=, $pop[[L11]], 12, $12{{$}} 248; SIMD128-NEXT: i8x16.replace_lane $push[[L13:[0-9]+]]=, $pop[[L12]], 13, $13{{$}} 249; SIMD128-NEXT: i8x16.replace_lane $push[[L14:[0-9]+]]=, $pop[[L13]], 14, $14{{$}} 250; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $pop[[L14]], 15, $15{{$}} 251; SIMD128-NEXT: return $pop[[R]]{{$}} 252define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3, 253 i8 %x4, i8 %x5, i8 %x6, i8 %x7, 254 i8 %x8, i8 %x9, i8 %x10, i8 %x11, 255 i8 %x12, i8 %x13, i8 %x14, i8 %x15) { 256 %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0 257 %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1 258 %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2 259 %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3 260 %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4 261 %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5 262 %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6 263 %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7 264 %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8 265 %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9 266 %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10 267 %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11 268 %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12 269 %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13 270 %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14 271 %res = insertelement <16 x i8> %t14, i8 %x15, i32 15 272 ret <16 x i8> %res 273} 274 275; ============================================================================== 276; 8 x i16 277; ============================================================================== 278; CHECK-LABEL: const_v8i16: 279; NO-SIMD128-NOT: i16x8 280; SIMD128-VM-NOT: v128.const 281; SIMD128-NEXT: .functype const_v8i16 () -> (v128){{$}} 282; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}} 283; SIMD128-NEXT: return $pop[[R]]{{$}} 284define <8 x i16> @const_v8i16() { 285 ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798, 286 i16 2312, i16 2826, i16 3340, i16 3854> 287} 288 289; CHECK-LABEL: splat_v8i16: 290; NO-SIMD128-NOT: i16x8 291; SIMD128-NEXT: .functype splat_v8i16 (i32) -> (v128){{$}} 292; SIMD128-NEXT: i16x8.splat $push[[R:[0-9]+]]=, $0{{$}} 293; SIMD128-NEXT: return $pop[[R]]{{$}} 294define <8 x i16> @splat_v8i16(i16 %x) { 295 %v = insertelement <8 x i16> undef, i16 %x, i32 0 296 %res = shufflevector <8 x i16> %v, <8 x i16> undef, 297 <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> 298 ret <8 x i16> %res 299} 300 301; CHECK-LABEL: const_splat_v8i16: 302; SIMD128: v128.const $push0=, 42, 42, 42, 42, 42, 42, 42, 42{{$}} 303define <8 x i16> @const_splat_v8i16() { 304 ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42> 305} 306 307; CHECK-LABEL: extract_v8i16_s: 308; NO-SIMD128-NOT: i16x8 309; SIMD128-NEXT: .functype extract_v8i16_s (v128) -> (i32){{$}} 310; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 5{{$}} 311; SIMD128-NEXT: return $pop[[R]]{{$}} 312define i32 @extract_v8i16_s(<8 x i16> %v) { 313 %elem = extractelement <8 x i16> %v, i16 5 314 %a = sext i16 %elem to i32 315 ret i32 %a 316} 317 318; CHECK-LABEL: extract_var_v8i16_s: 319; NO-SIMD128-NOT: i16x8 320; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}} 321; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 322; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 323; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 324; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 325; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 326; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 327; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 328; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 329; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 330; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}} 331; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}} 332; SIMD128-NEXT: return $pop[[R]]{{$}} 333define i32 @extract_var_v8i16_s(<8 x i16> %v, i32 %i) { 334 %elem = extractelement <8 x i16> %v, i32 %i 335 %a = sext i16 %elem to i32 336 ret i32 %a 337} 338 339; CHECK-LABEL: extract_undef_v8i16_s: 340; NO-SIMD128-NOT: i16x8 341; SIMD128-NEXT: .functype extract_undef_v8i16_s (v128) -> (i32){{$}} 342; SIMD128-NEXT: i16x8.extract_lane_s $push[[R:[0-9]+]]=, $0, 0{{$}} 343; SIMD128-NEXT: return $pop[[R]]{{$}} 344define i32 @extract_undef_v8i16_s(<8 x i16> %v) { 345 %elem = extractelement <8 x i16> %v, i16 undef 346 %a = sext i16 %elem to i32 347 ret i32 %a 348} 349 350; CHECK-LABEL: extract_v8i16_u: 351; NO-SIMD128-NOT: i16x8 352; SIMD128-NEXT: .functype extract_v8i16_u (v128) -> (i32){{$}} 353; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}} 354; SIMD128-NEXT: return $pop[[R]]{{$}} 355define i32 @extract_v8i16_u(<8 x i16> %v) { 356 %elem = extractelement <8 x i16> %v, i16 5 357 %a = zext i16 %elem to i32 358 ret i32 %a 359} 360 361; CHECK-LABEL: extract_var_v8i16_u: 362; NO-SIMD128-NOT: i16x8 363; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}} 364; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 365; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 366; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 367; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 368; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 369; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 370; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 371; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 372; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 373; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}} 374; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}} 375; SIMD128-NEXT: return $pop[[R]]{{$}} 376define i32 @extract_var_v8i16_u(<8 x i16> %v, i32 %i) { 377 %elem = extractelement <8 x i16> %v, i32 %i 378 %a = zext i16 %elem to i32 379 ret i32 %a 380} 381 382; CHECK-LABEL: extract_undef_v8i16_u: 383; NO-SIMD128-NOT: i16x8 384; SIMD128-NEXT: .functype extract_undef_v8i16_u (v128) -> (i32){{$}} 385; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 386; SIMD128-NEXT: return $pop[[R]]{{$}} 387define i32 @extract_undef_v8i16_u(<8 x i16> %v) { 388 %elem = extractelement <8 x i16> %v, i16 undef 389 %a = zext i16 %elem to i32 390 ret i32 %a 391} 392 393; CHECK-LABEL: extract_v8i16: 394; NO-SIMD128-NOT: i16x8 395; SIMD128-NEXT: .functype extract_v8i16 (v128) -> (i32){{$}} 396; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 5{{$}} 397; SIMD128-NEXT: return $pop[[R]]{{$}} 398define i16 @extract_v8i16(<8 x i16> %v) { 399 %elem = extractelement <8 x i16> %v, i16 5 400 ret i16 %elem 401} 402 403; CHECK-LABEL: extract_var_v8i16: 404; NO-SIMD128-NOT: i16x8 405; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}} 406; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 407; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 408; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 409; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 410; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 411; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 412; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 413; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 414; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 415; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}} 416; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}} 417; SIMD128-NEXT: return $pop[[R]]{{$}} 418define i16 @extract_var_v8i16(<8 x i16> %v, i32 %i) { 419 %elem = extractelement <8 x i16> %v, i32 %i 420 ret i16 %elem 421} 422 423; CHECK-LABEL: extract_undef_v8i16: 424; NO-SIMD128-NOT: i16x8 425; SIMD128-NEXT: .functype extract_undef_v8i16 (v128) -> (i32){{$}} 426; SIMD128-NEXT: i16x8.extract_lane_u $push[[R:[0-9]+]]=, $0, 0{{$}} 427; SIMD128-NEXT: return $pop[[R]]{{$}} 428define i16 @extract_undef_v8i16(<8 x i16> %v) { 429 %elem = extractelement <8 x i16> %v, i16 undef 430 ret i16 %elem 431} 432 433; CHECK-LABEL: replace_v8i16: 434; NO-SIMD128-NOT: i16x8 435; SIMD128-NEXT: .functype replace_v8i16 (v128, i32) -> (v128){{$}} 436; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 7, $1{{$}} 437; SIMD128-NEXT: return $pop[[R]]{{$}} 438define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) { 439 %res = insertelement <8 x i16> %v, i16 %x, i32 7 440 ret <8 x i16> %res 441} 442 443; CHECK-LABEL: replace_var_v8i16: 444; NO-SIMD128-NOT: i16x8 445; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}} 446; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 447; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 448; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 449; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 450; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 451; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}} 452; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 453; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}} 454; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 455; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}} 456; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}} 457; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 458; SIMD128-NEXT: return $pop[[R]]{{$}} 459define <8 x i16> @replace_var_v8i16(<8 x i16> %v, i32 %i, i16 %x) { 460 %res = insertelement <8 x i16> %v, i16 %x, i32 %i 461 ret <8 x i16> %res 462} 463 464; CHECK-LABEL: replace_zero_v8i16: 465; NO-SIMD128-NOT: i16x8 466; SIMD128-NEXT: .functype replace_zero_v8i16 (v128, i32) -> (v128){{$}} 467; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 468; SIMD128-NEXT: return $pop[[R]]{{$}} 469define <8 x i16> @replace_zero_v8i16(<8 x i16> %v, i16 %x) { 470 %res = insertelement <8 x i16> %v, i16 %x, i32 0 471 ret <8 x i16> %res 472} 473 474; CHECK-LABEL: shuffle_v8i16: 475; NO-SIMD128-NOT: v8x16 476; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}} 477; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 478; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}} 479; SIMD128-NEXT: return $pop[[R]]{{$}} 480define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) { 481 %res = shufflevector <8 x i16> %x, <8 x i16> %y, 482 <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15> 483 ret <8 x i16> %res 484} 485 486; CHECK-LABEL: shuffle_undef_v8i16: 487; NO-SIMD128-NOT: v8x16 488; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}} 489; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 490; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 491; SIMD128-NEXT: return $pop[[R]]{{$}} 492define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) { 493 %res = shufflevector <8 x i16> %x, <8 x i16> %y, 494 <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, 495 i32 undef, i32 undef, i32 undef, i32 undef> 496 ret <8 x i16> %res 497} 498 499; CHECK-LABEL: build_v8i16: 500; NO-SIMD128-NOT: i16x8 501; SIMD128-NEXT: .functype build_v8i16 (i32, i32, i32, i32, i32, i32, i32, i32) -> (v128){{$}} 502; SIMD128-NEXT: i16x8.splat $push[[L0:[0-9]+]]=, $0{{$}} 503; SIMD128-NEXT: i16x8.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 504; SIMD128-NEXT: i16x8.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 505; SIMD128-NEXT: i16x8.replace_lane $push[[L3:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 506; SIMD128-NEXT: i16x8.replace_lane $push[[L4:[0-9]+]]=, $pop[[L3]], 4, $4{{$}} 507; SIMD128-NEXT: i16x8.replace_lane $push[[L5:[0-9]+]]=, $pop[[L4]], 5, $5{{$}} 508; SIMD128-NEXT: i16x8.replace_lane $push[[L6:[0-9]+]]=, $pop[[L5]], 6, $6{{$}} 509; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $pop[[L6]], 7, $7{{$}} 510; SIMD128-NEXT: return $pop[[R]]{{$}} 511define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3, 512 i16 %x4, i16 %x5, i16 %x6, i16 %x7) { 513 %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0 514 %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1 515 %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2 516 %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3 517 %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4 518 %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5 519 %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6 520 %res = insertelement <8 x i16> %t6, i16 %x7, i32 7 521 ret <8 x i16> %res 522} 523 524; ============================================================================== 525; 4 x i32 526; ============================================================================== 527; CHECK-LABEL: const_v4i32: 528; NO-SIMD128-NOT: i32x4 529; SIMD128-VM-NOT: v128.const 530; SIMD128-NEXT: .functype const_v4i32 () -> (v128){{$}} 531; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 50462976, 117835012, 185207048, 252579084{{$}} 532; SIMD128-NEXT: return $pop[[R]]{{$}} 533define <4 x i32> @const_v4i32() { 534 ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084> 535} 536 537; CHECK-LABEL: splat_v4i32: 538; NO-SIMD128-NOT: i32x4 539; SIMD128-NEXT: .functype splat_v4i32 (i32) -> (v128){{$}} 540; SIMD128-NEXT: i32x4.splat $push[[R:[0-9]+]]=, $0{{$}} 541; SIMD128-NEXT: return $pop[[R]]{{$}} 542define <4 x i32> @splat_v4i32(i32 %x) { 543 %v = insertelement <4 x i32> undef, i32 %x, i32 0 544 %res = shufflevector <4 x i32> %v, <4 x i32> undef, 545 <4 x i32> <i32 0, i32 0, i32 0, i32 0> 546 ret <4 x i32> %res 547} 548 549; CHECK-LABEL: const_splat_v4i32: 550; SIMD128: v128.const $push0=, 42, 42, 42, 42{{$}} 551define <4 x i32> @const_splat_v4i32() { 552 ret <4 x i32> <i32 42, i32 42, i32 42, i32 42> 553} 554 555; CHECK-LABEL: extract_v4i32: 556; NO-SIMD128-NOT: i32x4 557; SIMD128-NEXT: .functype extract_v4i32 (v128) -> (i32){{$}} 558; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}} 559; SIMD128-NEXT: return $pop[[R]]{{$}} 560define i32 @extract_v4i32(<4 x i32> %v) { 561 %elem = extractelement <4 x i32> %v, i32 3 562 ret i32 %elem 563} 564 565; CHECK-LABEL: extract_var_v4i32: 566; NO-SIMD128-NOT: i32x4 567; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}} 568; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 569; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 570; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 571; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 572; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 573; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}} 574; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 575; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 576; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 577; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}} 578; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}} 579; SIMD128-NEXT: return $pop[[R]]{{$}} 580define i32 @extract_var_v4i32(<4 x i32> %v, i32 %i) { 581 %elem = extractelement <4 x i32> %v, i32 %i 582 ret i32 %elem 583} 584 585; CHECK-LABEL: extract_zero_v4i32: 586; NO-SIMD128-NOT: i32x4 587; SIMD128-NEXT: .functype extract_zero_v4i32 (v128) -> (i32){{$}} 588; SIMD128-NEXT: i32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 589; SIMD128-NEXT: return $pop[[R]]{{$}} 590define i32 @extract_zero_v4i32(<4 x i32> %v) { 591 %elem = extractelement <4 x i32> %v, i32 0 592 ret i32 %elem 593} 594 595; CHECK-LABEL: replace_v4i32: 596; NO-SIMD128-NOT: i32x4 597; SIMD128-NEXT: .functype replace_v4i32 (v128, i32) -> (v128){{$}} 598; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}} 599; SIMD128-NEXT: return $pop[[R]]{{$}} 600define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) { 601 %res = insertelement <4 x i32> %v, i32 %x, i32 2 602 ret <4 x i32> %res 603} 604 605; CHECK-LABEL: replace_var_v4i32: 606; NO-SIMD128-NOT: i32x4 607; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}} 608; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 609; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 610; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 611; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 612; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 613; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}} 614; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}} 615; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 616; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 617; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}} 618; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}} 619; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 620; SIMD128-NEXT: return $pop[[R]]{{$}} 621define <4 x i32> @replace_var_v4i32(<4 x i32> %v, i32 %i, i32 %x) { 622 %res = insertelement <4 x i32> %v, i32 %x, i32 %i 623 ret <4 x i32> %res 624} 625 626; CHECK-LABEL: replace_zero_v4i32: 627; NO-SIMD128-NOT: i32x4 628; SIMD128-NEXT: .functype replace_zero_v4i32 (v128, i32) -> (v128){{$}} 629; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 630; SIMD128-NEXT: return $pop[[R]]{{$}} 631define <4 x i32> @replace_zero_v4i32(<4 x i32> %v, i32 %x) { 632 %res = insertelement <4 x i32> %v, i32 %x, i32 0 633 ret <4 x i32> %res 634} 635 636; CHECK-LABEL: shuffle_v4i32: 637; NO-SIMD128-NOT: v8x16 638; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}} 639; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 640; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}} 641; SIMD128-NEXT: return $pop[[R]]{{$}} 642define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) { 643 %res = shufflevector <4 x i32> %x, <4 x i32> %y, 644 <4 x i32> <i32 0, i32 5, i32 2, i32 7> 645 ret <4 x i32> %res 646} 647 648; CHECK-LABEL: shuffle_undef_v4i32: 649; NO-SIMD128-NOT: v8x16 650; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}} 651; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 652; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 653; SIMD128-NEXT: return $pop[[R]]{{$}} 654define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) { 655 %res = shufflevector <4 x i32> %x, <4 x i32> %y, 656 <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> 657 ret <4 x i32> %res 658} 659 660; CHECK-LABEL: build_v4i32: 661; NO-SIMD128-NOT: i32x4 662; SIMD128-NEXT: .functype build_v4i32 (i32, i32, i32, i32) -> (v128){{$}} 663; SIMD128-NEXT: i32x4.splat $push[[L0:[0-9]+]]=, $0{{$}} 664; SIMD128-NEXT: i32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 665; SIMD128-NEXT: i32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 666; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 667; SIMD128-NEXT: return $pop[[R]]{{$}} 668define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) { 669 %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0 670 %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1 671 %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2 672 %res = insertelement <4 x i32> %t2, i32 %x3, i32 3 673 ret <4 x i32> %res 674} 675 676; ============================================================================== 677; 2 x i64 678; ============================================================================== 679; CHECK-LABEL: const_v2i64: 680; NO-SIMD128-NOT: i64x2 681; SIMD128-VM-NOT: v128.const 682; SIMD128-NEXT: .functype const_v2i64 () -> (v128){{$}} 683; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 506097522914230528, 1084818905618843912{{$}} 684; SIMD128-NEXT: return $pop[[R]]{{$}} 685define <2 x i64> @const_v2i64() { 686 ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912> 687} 688 689; CHECK-LABEL: splat_v2i64: 690; NO-SIMD128-NOT: i64x2 691; SIMD128-NEXT: .functype splat_v2i64 (i64) -> (v128){{$}} 692; SIMD128-NEXT: i64x2.splat $push[[R:[0-9]+]]=, $0{{$}} 693; SIMD128-NEXT: return $pop[[R]]{{$}} 694define <2 x i64> @splat_v2i64(i64 %x) { 695 %t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 696 %res = insertelement <2 x i64> %t1, i64 %x, i32 1 697 ret <2 x i64> %res 698} 699 700; CHECK-LABEL: const_splat_v2i64: 701; SIMD128: v128.const $push0=, 42, 42{{$}} 702define <2 x i64> @const_splat_v2i64() { 703 ret <2 x i64> <i64 42, i64 42> 704} 705 706; CHECK-LABEL: extract_v2i64: 707; NO-SIMD128-NOT: i64x2 708; SIMD128-NEXT: .functype extract_v2i64 (v128) -> (i64){{$}} 709; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}} 710; SIMD128-NEXT: return $pop[[R]]{{$}} 711define i64 @extract_v2i64(<2 x i64> %v) { 712 %elem = extractelement <2 x i64> %v, i64 1 713 ret i64 %elem 714} 715 716; CHECK-LABEL: extract_var_v2i64: 717; NO-SIMD128-NOT: i64x2 718; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}} 719; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 720; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 721; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 722; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 723; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 724; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 725; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 726; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 727; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 728; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}} 729; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}} 730; SIMD128-NEXT: return $pop[[R]]{{$}} 731define i64 @extract_var_v2i64(<2 x i64> %v, i32 %i) { 732 %elem = extractelement <2 x i64> %v, i32 %i 733 ret i64 %elem 734} 735 736; CHECK-LABEL: extract_zero_v2i64: 737; NO-SIMD128-NOT: i64x2 738; SIMD128-NEXT: .functype extract_zero_v2i64 (v128) -> (i64){{$}} 739; SIMD128-NEXT: i64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 740; SIMD128-NEXT: return $pop[[R]]{{$}} 741define i64 @extract_zero_v2i64(<2 x i64> %v) { 742 %elem = extractelement <2 x i64> %v, i64 0 743 ret i64 %elem 744} 745 746; CHECK-LABEL: replace_v2i64: 747; NO-SIMD128-NOT: i64x2 748; SIMD128-NEXT: .functype replace_v2i64 (v128, i64) -> (v128){{$}} 749; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 750; SIMD128-NEXT: return $pop[[R]]{{$}} 751define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) { 752 %res = insertelement <2 x i64> %v, i64 %x, i32 0 753 ret <2 x i64> %res 754} 755 756; CHECK-LABEL: replace_var_v2i64: 757; NO-SIMD128-NOT: i64x2 758; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}} 759; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 760; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 761; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 762; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 763; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 764; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 765; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 766; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 767; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 768; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}} 769; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}} 770; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 771; SIMD128-NEXT: return $pop[[R]]{{$}} 772define <2 x i64> @replace_var_v2i64(<2 x i64> %v, i32 %i, i64 %x) { 773 %res = insertelement <2 x i64> %v, i64 %x, i32 %i 774 ret <2 x i64> %res 775} 776 777; CHECK-LABEL: replace_zero_v2i64: 778; NO-SIMD128-NOT: i64x2 779; SIMD128-NEXT: .functype replace_zero_v2i64 (v128, i64) -> (v128){{$}} 780; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 781; SIMD128-NEXT: return $pop[[R]]{{$}} 782define <2 x i64> @replace_zero_v2i64(<2 x i64> %v, i64 %x) { 783 %res = insertelement <2 x i64> %v, i64 %x, i32 0 784 ret <2 x i64> %res 785} 786 787; CHECK-LABEL: shuffle_v2i64: 788; NO-SIMD128-NOT: v8x16 789; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}} 790; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 791; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}} 792; SIMD128-NEXT: return $pop[[R]]{{$}} 793define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) { 794 %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3> 795 ret <2 x i64> %res 796} 797 798; CHECK-LABEL: shuffle_undef_v2i64: 799; NO-SIMD128-NOT: v8x16 800; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}} 801; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 802; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 803; SIMD128-NEXT: return $pop[[R]]{{$}} 804define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) { 805 %res = shufflevector <2 x i64> %x, <2 x i64> %y, 806 <2 x i32> <i32 1, i32 undef> 807 ret <2 x i64> %res 808} 809 810; CHECK-LABEL: build_v2i64: 811; NO-SIMD128-NOT: i64x2 812; SIMD128-NEXT: .functype build_v2i64 (i64, i64) -> (v128){{$}} 813; SIMD128-NEXT: i64x2.splat $push[[L0:[0-9]+]]=, $0{{$}} 814; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 815; SIMD128-NEXT: return $pop[[R]]{{$}} 816define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) { 817 %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0 818 %res = insertelement <2 x i64> %t0, i64 %x1, i32 1 819 ret <2 x i64> %res 820} 821 822; ============================================================================== 823; 4 x f32 824; ============================================================================== 825; CHECK-LABEL: const_v4f32: 826; NO-SIMD128-NOT: f32x4 827; SIMD128-VM-NOT: v128.const 828; SIMD128-NEXT: .functype const_v4f32 () -> (v128){{$}} 829; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 830; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}} 831; SIMD128-NEXT: return $pop[[R]]{{$}} 832define <4 x float> @const_v4f32() { 833 ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000, 834 float 0x3961412100000000, float 0x39e1c1a180000000> 835} 836 837; CHECK-LABEL: splat_v4f32: 838; NO-SIMD128-NOT: f32x4 839; SIMD128-NEXT: .functype splat_v4f32 (f32) -> (v128){{$}} 840; SIMD128-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}} 841; SIMD128-NEXT: return $pop[[R]]{{$}} 842define <4 x float> @splat_v4f32(float %x) { 843 %v = insertelement <4 x float> undef, float %x, i32 0 844 %res = shufflevector <4 x float> %v, <4 x float> undef, 845 <4 x i32> <i32 0, i32 0, i32 0, i32 0> 846 ret <4 x float> %res 847} 848 849; CHECK-LABEL: const_splat_v4f32 850; SIMD128: v128.const $push0=, 0x1.5p5, 0x1.5p5, 0x1.5p5, 0x1.5p5{{$}} 851define <4 x float> @const_splat_v4f32() { 852 ret <4 x float> <float 42., float 42., float 42., float 42.> 853} 854 855; CHECK-LABEL: extract_v4f32: 856; NO-SIMD128-NOT: f32x4 857; SIMD128-NEXT: .functype extract_v4f32 (v128) -> (f32){{$}} 858; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 3{{$}} 859; SIMD128-NEXT: return $pop[[R]]{{$}} 860define float @extract_v4f32(<4 x float> %v) { 861 %elem = extractelement <4 x float> %v, i32 3 862 ret float %elem 863} 864 865; CHECK-LABEL: extract_var_v4f32: 866; NO-SIMD128-NOT: i64x2 867; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}} 868; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 869; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 870; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 871; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 872; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 873; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}} 874; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 875; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 876; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 877; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}} 878; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}} 879; SIMD128-NEXT: return $pop[[R]]{{$}} 880define float @extract_var_v4f32(<4 x float> %v, i32 %i) { 881 %elem = extractelement <4 x float> %v, i32 %i 882 ret float %elem 883} 884 885; CHECK-LABEL: extract_zero_v4f32: 886; NO-SIMD128-NOT: f32x4 887; SIMD128-NEXT: .functype extract_zero_v4f32 (v128) -> (f32){{$}} 888; SIMD128-NEXT: f32x4.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 889; SIMD128-NEXT: return $pop[[R]]{{$}} 890define float @extract_zero_v4f32(<4 x float> %v) { 891 %elem = extractelement <4 x float> %v, i32 0 892 ret float %elem 893} 894 895; CHECK-LABEL: replace_v4f32: 896; NO-SIMD128-NOT: f32x4 897; SIMD128-NEXT: .functype replace_v4f32 (v128, f32) -> (v128){{$}} 898; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 2, $1{{$}} 899; SIMD128-NEXT: return $pop[[R]]{{$}} 900define <4 x float> @replace_v4f32(<4 x float> %v, float %x) { 901 %res = insertelement <4 x float> %v, float %x, i32 2 902 ret <4 x float> %res 903} 904 905; CHECK-LABEL: replace_var_v4f32: 906; NO-SIMD128-NOT: f32x4 907; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}} 908; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 909; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 910; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 911; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 912; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 913; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}} 914; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 915; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}} 916; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 917; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}} 918; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}} 919; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 920; SIMD128-NEXT: return $pop[[R]]{{$}} 921define <4 x float> @replace_var_v4f32(<4 x float> %v, i32 %i, float %x) { 922 %res = insertelement <4 x float> %v, float %x, i32 %i 923 ret <4 x float> %res 924} 925 926; CHECK-LABEL: replace_zero_v4f32: 927; NO-SIMD128-NOT: f32x4 928; SIMD128-NEXT: .functype replace_zero_v4f32 (v128, f32) -> (v128){{$}} 929; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 930; SIMD128-NEXT: return $pop[[R]]{{$}} 931define <4 x float> @replace_zero_v4f32(<4 x float> %v, float %x) { 932 %res = insertelement <4 x float> %v, float %x, i32 0 933 ret <4 x float> %res 934} 935 936; CHECK-LABEL: shuffle_v4f32: 937; NO-SIMD128-NOT: v8x16 938; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}} 939; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 940; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}} 941; SIMD128-NEXT: return $pop[[R]]{{$}} 942define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) { 943 %res = shufflevector <4 x float> %x, <4 x float> %y, 944 <4 x i32> <i32 0, i32 5, i32 2, i32 7> 945 ret <4 x float> %res 946} 947 948; CHECK-LABEL: shuffle_undef_v4f32: 949; NO-SIMD128-NOT: v8x16 950; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}} 951; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 952; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 953; SIMD128-NEXT: return $pop[[R]]{{$}} 954define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) { 955 %res = shufflevector <4 x float> %x, <4 x float> %y, 956 <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> 957 ret <4 x float> %res 958} 959 960; CHECK-LABEL: build_v4f32: 961; NO-SIMD128-NOT: f32x4 962; SIMD128-NEXT: .functype build_v4f32 (f32, f32, f32, f32) -> (v128){{$}} 963; SIMD128-NEXT: f32x4.splat $push[[L0:[0-9]+]]=, $0{{$}} 964; SIMD128-NEXT: f32x4.replace_lane $push[[L1:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 965; SIMD128-NEXT: f32x4.replace_lane $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $2{{$}} 966; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $pop[[L2]], 3, $3{{$}} 967; SIMD128-NEXT: return $pop[[R]]{{$}} 968define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) { 969 %t0 = insertelement <4 x float> undef, float %x0, i32 0 970 %t1 = insertelement <4 x float> %t0, float %x1, i32 1 971 %t2 = insertelement <4 x float> %t1, float %x2, i32 2 972 %res = insertelement <4 x float> %t2, float %x3, i32 3 973 ret <4 x float> %res 974} 975 976; ============================================================================== 977; 2 x f64 978; ============================================================================== 979; CHECK-LABEL: const_v2f64: 980; NO-SIMD128-NOT: f64x2 981; SIMD128-VM-NOT: v128.const 982; SIMD128-NEXT: .functype const_v2f64 () -> (v128){{$}} 983; SIMD128-NEXT: v128.const $push[[R:[0-9]+]]=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}} 984; SIMD128-NEXT: return $pop[[R]]{{$}} 985define <2 x double> @const_v2f64() { 986 ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908> 987} 988 989; CHECK-LABEL: splat_v2f64: 990; NO-SIMD128-NOT: f64x2 991; SIMD128-NEXT: .functype splat_v2f64 (f64) -> (v128){{$}} 992; SIMD128-NEXT: f64x2.splat $push[[R:[0-9]+]]=, $0{{$}} 993; SIMD128-NEXT: return $pop[[R]]{{$}} 994define <2 x double> @splat_v2f64(double %x) { 995 %t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0 996 %res = insertelement <2 x double> %t1, double %x, i32 1 997 ret <2 x double> %res 998} 999 1000; CHECK-LABEL: const_splat_v2f64: 1001; SIMD128: v128.const $push0=, 0x1.5p5, 0x1.5p5{{$}} 1002define <2 x double> @const_splat_v2f64() { 1003 ret <2 x double> <double 42., double 42.> 1004} 1005 1006; CHECK-LABEL: extract_v2f64: 1007; NO-SIMD128-NOT: f64x2 1008; SIMD128-NEXT: .functype extract_v2f64 (v128) -> (f64){{$}} 1009; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 1{{$}} 1010; SIMD128-NEXT: return $pop[[R]]{{$}} 1011define double @extract_v2f64(<2 x double> %v) { 1012 %elem = extractelement <2 x double> %v, i32 1 1013 ret double %elem 1014} 1015 1016; CHECK-LABEL: extract_var_v2f64: 1017; NO-SIMD128-NOT: i62x2 1018; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}} 1019; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 1020; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 1021; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 1022; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}} 1023; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 1024; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 1025; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 1026; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 1027; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 1028; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}} 1029; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}} 1030; SIMD128-NEXT: return $pop[[R]]{{$}} 1031define double @extract_var_v2f64(<2 x double> %v, i32 %i) { 1032 %elem = extractelement <2 x double> %v, i32 %i 1033 ret double %elem 1034} 1035 1036; CHECK-LABEL: extract_zero_v2f64: 1037; NO-SIMD128-NOT: f64x2 1038; SIMD128-NEXT: .functype extract_zero_v2f64 (v128) -> (f64){{$}} 1039; SIMD128-NEXT: f64x2.extract_lane $push[[R:[0-9]+]]=, $0, 0{{$}} 1040; SIMD128-NEXT: return $pop[[R]]{{$}} 1041define double @extract_zero_v2f64(<2 x double> %v) { 1042 %elem = extractelement <2 x double> %v, i32 0 1043 ret double %elem 1044} 1045 1046; CHECK-LABEL: replace_v2f64: 1047; NO-SIMD128-NOT: f64x2 1048; SIMD128-NEXT: .functype replace_v2f64 (v128, f64) -> (v128){{$}} 1049; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 1050; SIMD128-NEXT: return $pop[[R]]{{$}} 1051define <2 x double> @replace_v2f64(<2 x double> %v, double %x) { 1052 %res = insertelement <2 x double> %v, double %x, i32 0 1053 ret <2 x double> %res 1054} 1055 1056; CHECK-LABEL: replace_var_v2f64: 1057; NO-SIMD128-NOT: f64x2 1058; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}} 1059; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer{{$}} 1060; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}} 1061; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} 1062; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}} 1063; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}} 1064; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}} 1065; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}} 1066; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}} 1067; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} 1068; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}} 1069; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}} 1070; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}} 1071; SIMD128-NEXT: return $pop[[R]]{{$}} 1072define <2 x double> @replace_var_v2f64(<2 x double> %v, i32 %i, double %x) { 1073 %res = insertelement <2 x double> %v, double %x, i32 %i 1074 ret <2 x double> %res 1075} 1076 1077; CHECK-LABEL: replace_zero_v2f64: 1078; NO-SIMD128-NOT: f64x2 1079; SIMD128-NEXT: .functype replace_zero_v2f64 (v128, f64) -> (v128){{$}} 1080; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}} 1081; SIMD128-NEXT: return $pop[[R]]{{$}} 1082define <2 x double> @replace_zero_v2f64(<2 x double> %v, double %x) { 1083 %res = insertelement <2 x double> %v, double %x, i32 0 1084 ret <2 x double> %res 1085} 1086 1087; CHECK-LABEL: shuffle_v2f64: 1088; NO-SIMD128-NOT: v8x16 1089; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}} 1090; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1, 1091; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}} 1092; SIMD128-NEXT: return $pop[[R]]{{$}} 1093define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) { 1094 %res = shufflevector <2 x double> %x, <2 x double> %y, 1095 <2 x i32> <i32 0, i32 3> 1096 ret <2 x double> %res 1097} 1098 1099; CHECK-LABEL: shuffle_undef_v2f64: 1100; NO-SIMD128-NOT: v8x16 1101; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}} 1102; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0, 1103; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}} 1104; SIMD128-NEXT: return $pop[[R]]{{$}} 1105define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) { 1106 %res = shufflevector <2 x double> %x, <2 x double> %y, 1107 <2 x i32> <i32 1, i32 undef> 1108 ret <2 x double> %res 1109} 1110 1111; CHECK-LABEL: build_v2f64: 1112; NO-SIMD128-NOT: f64x2 1113; SIMD128-NEXT: .functype build_v2f64 (f64, f64) -> (v128){{$}} 1114; SIMD128-NEXT: f64x2.splat $push[[L0:[0-9]+]]=, $0{{$}} 1115; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $pop[[L0]], 1, $1{{$}} 1116; SIMD128-NEXT: return $pop[[R]]{{$}} 1117define <2 x double> @build_v2f64(double %x0, double %x1) { 1118 %t0 = insertelement <2 x double> undef, double %x0, i32 0 1119 %res = insertelement <2 x double> %t0, double %x1, i32 1 1120 ret <2 x double> %res 1121} 1122