1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Assembly Matcher Source Fragment *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9 10#ifdef GET_ASSEMBLER_HEADER 11#undef GET_ASSEMBLER_HEADER 12 // This should be included into the middle of the declaration of 13 // your subclasses implementation of MCTargetAsmParser. 14 FeatureBitset ComputeAvailableFeatures(const FeatureBitset& FB) const; 15 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, 16 const OperandVector &Operands); 17 void convertToMapAndConstraints(unsigned Kind, 18 const OperandVector &Operands) override; 19 unsigned MatchInstructionImpl(const OperandVector &Operands, 20 MCInst &Inst, 21 uint64_t &ErrorInfo, 22 FeatureBitset &MissingFeatures, 23 bool matchingInlineAsm, 24 unsigned VariantID = 0); 25 unsigned MatchInstructionImpl(const OperandVector &Operands, 26 MCInst &Inst, 27 uint64_t &ErrorInfo, 28 bool matchingInlineAsm, 29 unsigned VariantID = 0) { 30 FeatureBitset MissingFeatures; 31 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, 32 matchingInlineAsm, VariantID); 33 } 34 35#endif // GET_ASSEMBLER_HEADER_INFO 36 37 38#ifdef GET_OPERAND_DIAGNOSTIC_TYPES 39#undef GET_OPERAND_DIAGNOSTIC_TYPES 40 41 Match_InvalidImmUnsignedi4, 42 END_OPERAND_DIAGNOSTIC_TYPES 43#endif // GET_OPERAND_DIAGNOSTIC_TYPES 44 45 46#ifdef GET_REGISTER_MATCHER 47#undef GET_REGISTER_MATCHER 48 49// Bits for subtarget features that participate in instruction matching. 50enum SubtargetFeatureBits : uint8_t { 51 Feature_Not64BitModeBit = 4, 52 Feature_In64BitModeBit = 2, 53 Feature_In16BitModeBit = 0, 54 Feature_Not16BitModeBit = 3, 55 Feature_In32BitModeBit = 1, 56}; 57 58static unsigned MatchRegisterName(StringRef Name) { 59 switch (Name.size()) { 60 default: break; 61 case 2: // 34 strings to match. 62 switch (Name[0]) { 63 default: break; 64 case 'a': // 3 strings to match. 65 switch (Name[1]) { 66 default: break; 67 case 'h': // 1 string to match. 68 return 1; // "ah" 69 case 'l': // 1 string to match. 70 return 2; // "al" 71 case 'x': // 1 string to match. 72 return 3; // "ax" 73 } 74 break; 75 case 'b': // 4 strings to match. 76 switch (Name[1]) { 77 default: break; 78 case 'h': // 1 string to match. 79 return 4; // "bh" 80 case 'l': // 1 string to match. 81 return 5; // "bl" 82 case 'p': // 1 string to match. 83 return 6; // "bp" 84 case 'x': // 1 string to match. 85 return 9; // "bx" 86 } 87 break; 88 case 'c': // 4 strings to match. 89 switch (Name[1]) { 90 default: break; 91 case 'h': // 1 string to match. 92 return 10; // "ch" 93 case 'l': // 1 string to match. 94 return 11; // "cl" 95 case 's': // 1 string to match. 96 return 12; // "cs" 97 case 'x': // 1 string to match. 98 return 13; // "cx" 99 } 100 break; 101 case 'd': // 5 strings to match. 102 switch (Name[1]) { 103 default: break; 104 case 'h': // 1 string to match. 105 return 15; // "dh" 106 case 'i': // 1 string to match. 107 return 16; // "di" 108 case 'l': // 1 string to match. 109 return 19; // "dl" 110 case 's': // 1 string to match. 111 return 20; // "ds" 112 case 'x': // 1 string to match. 113 return 21; // "dx" 114 } 115 break; 116 case 'e': // 1 string to match. 117 if (Name[1] != 's') 118 break; 119 return 31; // "es" 120 case 'f': // 1 string to match. 121 if (Name[1] != 's') 122 break; 123 return 36; // "fs" 124 case 'g': // 1 string to match. 125 if (Name[1] != 's') 126 break; 127 return 37; // "gs" 128 case 'i': // 1 string to match. 129 if (Name[1] != 'p') 130 break; 131 return 47; // "ip" 132 case 'k': // 8 strings to match. 133 switch (Name[1]) { 134 default: break; 135 case '0': // 1 string to match. 136 return 111; // "k0" 137 case '1': // 1 string to match. 138 return 112; // "k1" 139 case '2': // 1 string to match. 140 return 113; // "k2" 141 case '3': // 1 string to match. 142 return 114; // "k3" 143 case '4': // 1 string to match. 144 return 115; // "k4" 145 case '5': // 1 string to match. 146 return 116; // "k5" 147 case '6': // 1 string to match. 148 return 117; // "k6" 149 case '7': // 1 string to match. 150 return 118; // "k7" 151 } 152 break; 153 case 'r': // 2 strings to match. 154 switch (Name[1]) { 155 default: break; 156 case '8': // 1 string to match. 157 return 127; // "r8" 158 case '9': // 1 string to match. 159 return 128; // "r9" 160 } 161 break; 162 case 's': // 4 strings to match. 163 switch (Name[1]) { 164 default: break; 165 case 'i': // 1 string to match. 166 return 59; // "si" 167 case 'p': // 1 string to match. 168 return 62; // "sp" 169 case 's': // 1 string to match. 170 return 65; // "ss" 171 case 't': // 1 string to match. 172 return 135; // "st" 173 } 174 break; 175 } 176 break; 177 case 3: // 73 strings to match. 178 switch (Name[0]) { 179 default: break; 180 case 'b': // 1 string to match. 181 if (memcmp(Name.data()+1, "pl", 2) != 0) 182 break; 183 return 8; // "bpl" 184 case 'c': // 10 strings to match. 185 if (Name[1] != 'r') 186 break; 187 switch (Name[2]) { 188 default: break; 189 case '0': // 1 string to match. 190 return 71; // "cr0" 191 case '1': // 1 string to match. 192 return 72; // "cr1" 193 case '2': // 1 string to match. 194 return 73; // "cr2" 195 case '3': // 1 string to match. 196 return 74; // "cr3" 197 case '4': // 1 string to match. 198 return 75; // "cr4" 199 case '5': // 1 string to match. 200 return 76; // "cr5" 201 case '6': // 1 string to match. 202 return 77; // "cr6" 203 case '7': // 1 string to match. 204 return 78; // "cr7" 205 case '8': // 1 string to match. 206 return 79; // "cr8" 207 case '9': // 1 string to match. 208 return 80; // "cr9" 209 } 210 break; 211 case 'd': // 11 strings to match. 212 switch (Name[1]) { 213 default: break; 214 case 'i': // 1 string to match. 215 if (Name[2] != 'l') 216 break; 217 return 18; // "dil" 218 case 'r': // 10 strings to match. 219 switch (Name[2]) { 220 default: break; 221 case '0': // 1 string to match. 222 return 87; // "dr0" 223 case '1': // 1 string to match. 224 return 88; // "dr1" 225 case '2': // 1 string to match. 226 return 89; // "dr2" 227 case '3': // 1 string to match. 228 return 90; // "dr3" 229 case '4': // 1 string to match. 230 return 91; // "dr4" 231 case '5': // 1 string to match. 232 return 92; // "dr5" 233 case '6': // 1 string to match. 234 return 93; // "dr6" 235 case '7': // 1 string to match. 236 return 94; // "dr7" 237 case '8': // 1 string to match. 238 return 95; // "dr8" 239 case '9': // 1 string to match. 240 return 96; // "dr9" 241 } 242 break; 243 } 244 break; 245 case 'e': // 10 strings to match. 246 switch (Name[1]) { 247 default: break; 248 case 'a': // 1 string to match. 249 if (Name[2] != 'x') 250 break; 251 return 22; // "eax" 252 case 'b': // 2 strings to match. 253 switch (Name[2]) { 254 default: break; 255 case 'p': // 1 string to match. 256 return 23; // "ebp" 257 case 'x': // 1 string to match. 258 return 24; // "ebx" 259 } 260 break; 261 case 'c': // 1 string to match. 262 if (Name[2] != 'x') 263 break; 264 return 25; // "ecx" 265 case 'd': // 2 strings to match. 266 switch (Name[2]) { 267 default: break; 268 case 'i': // 1 string to match. 269 return 26; // "edi" 270 case 'x': // 1 string to match. 271 return 27; // "edx" 272 } 273 break; 274 case 'i': // 2 strings to match. 275 switch (Name[2]) { 276 default: break; 277 case 'p': // 1 string to match. 278 return 29; // "eip" 279 case 'z': // 1 string to match. 280 return 30; // "eiz" 281 } 282 break; 283 case 's': // 2 strings to match. 284 switch (Name[2]) { 285 default: break; 286 case 'i': // 1 string to match. 287 return 32; // "esi" 288 case 'p': // 1 string to match. 289 return 33; // "esp" 290 } 291 break; 292 } 293 break; 294 case 'f': // 8 strings to match. 295 if (Name[1] != 'p') 296 break; 297 switch (Name[2]) { 298 default: break; 299 case '0': // 1 string to match. 300 return 103; // "fp0" 301 case '1': // 1 string to match. 302 return 104; // "fp1" 303 case '2': // 1 string to match. 304 return 105; // "fp2" 305 case '3': // 1 string to match. 306 return 106; // "fp3" 307 case '4': // 1 string to match. 308 return 107; // "fp4" 309 case '5': // 1 string to match. 310 return 108; // "fp5" 311 case '6': // 1 string to match. 312 return 109; // "fp6" 313 case '7': // 1 string to match. 314 return 110; // "fp7" 315 } 316 break; 317 case 'm': // 8 strings to match. 318 if (Name[1] != 'm') 319 break; 320 switch (Name[2]) { 321 default: break; 322 case '0': // 1 string to match. 323 return 119; // "mm0" 324 case '1': // 1 string to match. 325 return 120; // "mm1" 326 case '2': // 1 string to match. 327 return 121; // "mm2" 328 case '3': // 1 string to match. 329 return 122; // "mm3" 330 case '4': // 1 string to match. 331 return 123; // "mm4" 332 case '5': // 1 string to match. 333 return 124; // "mm5" 334 case '6': // 1 string to match. 335 return 125; // "mm6" 336 case '7': // 1 string to match. 337 return 126; // "mm7" 338 } 339 break; 340 case 'r': // 22 strings to match. 341 switch (Name[1]) { 342 default: break; 343 case '1': // 6 strings to match. 344 switch (Name[2]) { 345 default: break; 346 case '0': // 1 string to match. 347 return 129; // "r10" 348 case '1': // 1 string to match. 349 return 130; // "r11" 350 case '2': // 1 string to match. 351 return 131; // "r12" 352 case '3': // 1 string to match. 353 return 132; // "r13" 354 case '4': // 1 string to match. 355 return 133; // "r14" 356 case '5': // 1 string to match. 357 return 134; // "r15" 358 } 359 break; 360 case '8': // 3 strings to match. 361 switch (Name[2]) { 362 default: break; 363 case 'b': // 1 string to match. 364 return 239; // "r8b" 365 case 'd': // 1 string to match. 366 return 255; // "r8d" 367 case 'w': // 1 string to match. 368 return 263; // "r8w" 369 } 370 break; 371 case '9': // 3 strings to match. 372 switch (Name[2]) { 373 default: break; 374 case 'b': // 1 string to match. 375 return 240; // "r9b" 376 case 'd': // 1 string to match. 377 return 256; // "r9d" 378 case 'w': // 1 string to match. 379 return 264; // "r9w" 380 } 381 break; 382 case 'a': // 1 string to match. 383 if (Name[2] != 'x') 384 break; 385 return 49; // "rax" 386 case 'b': // 2 strings to match. 387 switch (Name[2]) { 388 default: break; 389 case 'p': // 1 string to match. 390 return 50; // "rbp" 391 case 'x': // 1 string to match. 392 return 51; // "rbx" 393 } 394 break; 395 case 'c': // 1 string to match. 396 if (Name[2] != 'x') 397 break; 398 return 52; // "rcx" 399 case 'd': // 2 strings to match. 400 switch (Name[2]) { 401 default: break; 402 case 'i': // 1 string to match. 403 return 53; // "rdi" 404 case 'x': // 1 string to match. 405 return 54; // "rdx" 406 } 407 break; 408 case 'i': // 2 strings to match. 409 switch (Name[2]) { 410 default: break; 411 case 'p': // 1 string to match. 412 return 55; // "rip" 413 case 'z': // 1 string to match. 414 return 56; // "riz" 415 } 416 break; 417 case 's': // 2 strings to match. 418 switch (Name[2]) { 419 default: break; 420 case 'i': // 1 string to match. 421 return 57; // "rsi" 422 case 'p': // 1 string to match. 423 return 58; // "rsp" 424 } 425 break; 426 } 427 break; 428 case 's': // 3 strings to match. 429 switch (Name[1]) { 430 default: break; 431 case 'i': // 1 string to match. 432 if (Name[2] != 'l') 433 break; 434 return 61; // "sil" 435 case 'p': // 1 string to match. 436 if (Name[2] != 'l') 437 break; 438 return 64; // "spl" 439 case 's': // 1 string to match. 440 if (Name[2] != 'p') 441 break; 442 return 66; // "ssp" 443 } 444 break; 445 } 446 break; 447 case 4: // 66 strings to match. 448 switch (Name[0]) { 449 default: break; 450 case 'b': // 4 strings to match. 451 if (memcmp(Name.data()+1, "nd", 2) != 0) 452 break; 453 switch (Name[3]) { 454 default: break; 455 case '0': // 1 string to match. 456 return 67; // "bnd0" 457 case '1': // 1 string to match. 458 return 68; // "bnd1" 459 case '2': // 1 string to match. 460 return 69; // "bnd2" 461 case '3': // 1 string to match. 462 return 70; // "bnd3" 463 } 464 break; 465 case 'c': // 6 strings to match. 466 if (memcmp(Name.data()+1, "r1", 2) != 0) 467 break; 468 switch (Name[3]) { 469 default: break; 470 case '0': // 1 string to match. 471 return 81; // "cr10" 472 case '1': // 1 string to match. 473 return 82; // "cr11" 474 case '2': // 1 string to match. 475 return 83; // "cr12" 476 case '3': // 1 string to match. 477 return 84; // "cr13" 478 case '4': // 1 string to match. 479 return 85; // "cr14" 480 case '5': // 1 string to match. 481 return 86; // "cr15" 482 } 483 break; 484 case 'd': // 6 strings to match. 485 if (memcmp(Name.data()+1, "r1", 2) != 0) 486 break; 487 switch (Name[3]) { 488 default: break; 489 case '0': // 1 string to match. 490 return 97; // "dr10" 491 case '1': // 1 string to match. 492 return 98; // "dr11" 493 case '2': // 1 string to match. 494 return 99; // "dr12" 495 case '3': // 1 string to match. 496 return 100; // "dr13" 497 case '4': // 1 string to match. 498 return 101; // "dr14" 499 case '5': // 1 string to match. 500 return 102; // "dr15" 501 } 502 break; 503 case 'f': // 2 strings to match. 504 if (Name[1] != 'p') 505 break; 506 switch (Name[2]) { 507 default: break; 508 case 'c': // 1 string to match. 509 if (Name[3] != 'r') 510 break; 511 return 34; // "fpcr" 512 case 's': // 1 string to match. 513 if (Name[3] != 'r') 514 break; 515 return 35; // "fpsr" 516 } 517 break; 518 case 'r': // 18 strings to match. 519 if (Name[1] != '1') 520 break; 521 switch (Name[2]) { 522 default: break; 523 case '0': // 3 strings to match. 524 switch (Name[3]) { 525 default: break; 526 case 'b': // 1 string to match. 527 return 241; // "r10b" 528 case 'd': // 1 string to match. 529 return 257; // "r10d" 530 case 'w': // 1 string to match. 531 return 265; // "r10w" 532 } 533 break; 534 case '1': // 3 strings to match. 535 switch (Name[3]) { 536 default: break; 537 case 'b': // 1 string to match. 538 return 242; // "r11b" 539 case 'd': // 1 string to match. 540 return 258; // "r11d" 541 case 'w': // 1 string to match. 542 return 266; // "r11w" 543 } 544 break; 545 case '2': // 3 strings to match. 546 switch (Name[3]) { 547 default: break; 548 case 'b': // 1 string to match. 549 return 243; // "r12b" 550 case 'd': // 1 string to match. 551 return 259; // "r12d" 552 case 'w': // 1 string to match. 553 return 267; // "r12w" 554 } 555 break; 556 case '3': // 3 strings to match. 557 switch (Name[3]) { 558 default: break; 559 case 'b': // 1 string to match. 560 return 244; // "r13b" 561 case 'd': // 1 string to match. 562 return 260; // "r13d" 563 case 'w': // 1 string to match. 564 return 268; // "r13w" 565 } 566 break; 567 case '4': // 3 strings to match. 568 switch (Name[3]) { 569 default: break; 570 case 'b': // 1 string to match. 571 return 245; // "r14b" 572 case 'd': // 1 string to match. 573 return 261; // "r14d" 574 case 'w': // 1 string to match. 575 return 269; // "r14w" 576 } 577 break; 578 case '5': // 3 strings to match. 579 switch (Name[3]) { 580 default: break; 581 case 'b': // 1 string to match. 582 return 246; // "r15b" 583 case 'd': // 1 string to match. 584 return 262; // "r15d" 585 case 'w': // 1 string to match. 586 return 270; // "r15w" 587 } 588 break; 589 } 590 break; 591 case 'x': // 10 strings to match. 592 if (memcmp(Name.data()+1, "mm", 2) != 0) 593 break; 594 switch (Name[3]) { 595 default: break; 596 case '0': // 1 string to match. 597 return 143; // "xmm0" 598 case '1': // 1 string to match. 599 return 144; // "xmm1" 600 case '2': // 1 string to match. 601 return 145; // "xmm2" 602 case '3': // 1 string to match. 603 return 146; // "xmm3" 604 case '4': // 1 string to match. 605 return 147; // "xmm4" 606 case '5': // 1 string to match. 607 return 148; // "xmm5" 608 case '6': // 1 string to match. 609 return 149; // "xmm6" 610 case '7': // 1 string to match. 611 return 150; // "xmm7" 612 case '8': // 1 string to match. 613 return 151; // "xmm8" 614 case '9': // 1 string to match. 615 return 152; // "xmm9" 616 } 617 break; 618 case 'y': // 10 strings to match. 619 if (memcmp(Name.data()+1, "mm", 2) != 0) 620 break; 621 switch (Name[3]) { 622 default: break; 623 case '0': // 1 string to match. 624 return 175; // "ymm0" 625 case '1': // 1 string to match. 626 return 176; // "ymm1" 627 case '2': // 1 string to match. 628 return 177; // "ymm2" 629 case '3': // 1 string to match. 630 return 178; // "ymm3" 631 case '4': // 1 string to match. 632 return 179; // "ymm4" 633 case '5': // 1 string to match. 634 return 180; // "ymm5" 635 case '6': // 1 string to match. 636 return 181; // "ymm6" 637 case '7': // 1 string to match. 638 return 182; // "ymm7" 639 case '8': // 1 string to match. 640 return 183; // "ymm8" 641 case '9': // 1 string to match. 642 return 184; // "ymm9" 643 } 644 break; 645 case 'z': // 10 strings to match. 646 if (memcmp(Name.data()+1, "mm", 2) != 0) 647 break; 648 switch (Name[3]) { 649 default: break; 650 case '0': // 1 string to match. 651 return 207; // "zmm0" 652 case '1': // 1 string to match. 653 return 208; // "zmm1" 654 case '2': // 1 string to match. 655 return 209; // "zmm2" 656 case '3': // 1 string to match. 657 return 210; // "zmm3" 658 case '4': // 1 string to match. 659 return 211; // "zmm4" 660 case '5': // 1 string to match. 661 return 212; // "zmm5" 662 case '6': // 1 string to match. 663 return 213; // "zmm6" 664 case '7': // 1 string to match. 665 return 214; // "zmm7" 666 case '8': // 1 string to match. 667 return 215; // "zmm8" 668 case '9': // 1 string to match. 669 return 216; // "zmm9" 670 } 671 break; 672 } 673 break; 674 case 5: // 75 strings to match. 675 switch (Name[0]) { 676 default: break; 677 case 'f': // 1 string to match. 678 if (memcmp(Name.data()+1, "lags", 4) != 0) 679 break; 680 return 28; // "flags" 681 case 'm': // 1 string to match. 682 if (memcmp(Name.data()+1, "xcsr", 4) != 0) 683 break; 684 return 48; // "mxcsr" 685 case 's': // 7 strings to match. 686 if (memcmp(Name.data()+1, "t(", 2) != 0) 687 break; 688 switch (Name[3]) { 689 default: break; 690 case '1': // 1 string to match. 691 if (Name[4] != ')') 692 break; 693 return 136; // "st(1)" 694 case '2': // 1 string to match. 695 if (Name[4] != ')') 696 break; 697 return 137; // "st(2)" 698 case '3': // 1 string to match. 699 if (Name[4] != ')') 700 break; 701 return 138; // "st(3)" 702 case '4': // 1 string to match. 703 if (Name[4] != ')') 704 break; 705 return 139; // "st(4)" 706 case '5': // 1 string to match. 707 if (Name[4] != ')') 708 break; 709 return 140; // "st(5)" 710 case '6': // 1 string to match. 711 if (Name[4] != ')') 712 break; 713 return 141; // "st(6)" 714 case '7': // 1 string to match. 715 if (Name[4] != ')') 716 break; 717 return 142; // "st(7)" 718 } 719 break; 720 case 'x': // 22 strings to match. 721 if (memcmp(Name.data()+1, "mm", 2) != 0) 722 break; 723 switch (Name[3]) { 724 default: break; 725 case '1': // 10 strings to match. 726 switch (Name[4]) { 727 default: break; 728 case '0': // 1 string to match. 729 return 153; // "xmm10" 730 case '1': // 1 string to match. 731 return 154; // "xmm11" 732 case '2': // 1 string to match. 733 return 155; // "xmm12" 734 case '3': // 1 string to match. 735 return 156; // "xmm13" 736 case '4': // 1 string to match. 737 return 157; // "xmm14" 738 case '5': // 1 string to match. 739 return 158; // "xmm15" 740 case '6': // 1 string to match. 741 return 159; // "xmm16" 742 case '7': // 1 string to match. 743 return 160; // "xmm17" 744 case '8': // 1 string to match. 745 return 161; // "xmm18" 746 case '9': // 1 string to match. 747 return 162; // "xmm19" 748 } 749 break; 750 case '2': // 10 strings to match. 751 switch (Name[4]) { 752 default: break; 753 case '0': // 1 string to match. 754 return 163; // "xmm20" 755 case '1': // 1 string to match. 756 return 164; // "xmm21" 757 case '2': // 1 string to match. 758 return 165; // "xmm22" 759 case '3': // 1 string to match. 760 return 166; // "xmm23" 761 case '4': // 1 string to match. 762 return 167; // "xmm24" 763 case '5': // 1 string to match. 764 return 168; // "xmm25" 765 case '6': // 1 string to match. 766 return 169; // "xmm26" 767 case '7': // 1 string to match. 768 return 170; // "xmm27" 769 case '8': // 1 string to match. 770 return 171; // "xmm28" 771 case '9': // 1 string to match. 772 return 172; // "xmm29" 773 } 774 break; 775 case '3': // 2 strings to match. 776 switch (Name[4]) { 777 default: break; 778 case '0': // 1 string to match. 779 return 173; // "xmm30" 780 case '1': // 1 string to match. 781 return 174; // "xmm31" 782 } 783 break; 784 } 785 break; 786 case 'y': // 22 strings to match. 787 if (memcmp(Name.data()+1, "mm", 2) != 0) 788 break; 789 switch (Name[3]) { 790 default: break; 791 case '1': // 10 strings to match. 792 switch (Name[4]) { 793 default: break; 794 case '0': // 1 string to match. 795 return 185; // "ymm10" 796 case '1': // 1 string to match. 797 return 186; // "ymm11" 798 case '2': // 1 string to match. 799 return 187; // "ymm12" 800 case '3': // 1 string to match. 801 return 188; // "ymm13" 802 case '4': // 1 string to match. 803 return 189; // "ymm14" 804 case '5': // 1 string to match. 805 return 190; // "ymm15" 806 case '6': // 1 string to match. 807 return 191; // "ymm16" 808 case '7': // 1 string to match. 809 return 192; // "ymm17" 810 case '8': // 1 string to match. 811 return 193; // "ymm18" 812 case '9': // 1 string to match. 813 return 194; // "ymm19" 814 } 815 break; 816 case '2': // 10 strings to match. 817 switch (Name[4]) { 818 default: break; 819 case '0': // 1 string to match. 820 return 195; // "ymm20" 821 case '1': // 1 string to match. 822 return 196; // "ymm21" 823 case '2': // 1 string to match. 824 return 197; // "ymm22" 825 case '3': // 1 string to match. 826 return 198; // "ymm23" 827 case '4': // 1 string to match. 828 return 199; // "ymm24" 829 case '5': // 1 string to match. 830 return 200; // "ymm25" 831 case '6': // 1 string to match. 832 return 201; // "ymm26" 833 case '7': // 1 string to match. 834 return 202; // "ymm27" 835 case '8': // 1 string to match. 836 return 203; // "ymm28" 837 case '9': // 1 string to match. 838 return 204; // "ymm29" 839 } 840 break; 841 case '3': // 2 strings to match. 842 switch (Name[4]) { 843 default: break; 844 case '0': // 1 string to match. 845 return 205; // "ymm30" 846 case '1': // 1 string to match. 847 return 206; // "ymm31" 848 } 849 break; 850 } 851 break; 852 case 'z': // 22 strings to match. 853 if (memcmp(Name.data()+1, "mm", 2) != 0) 854 break; 855 switch (Name[3]) { 856 default: break; 857 case '1': // 10 strings to match. 858 switch (Name[4]) { 859 default: break; 860 case '0': // 1 string to match. 861 return 217; // "zmm10" 862 case '1': // 1 string to match. 863 return 218; // "zmm11" 864 case '2': // 1 string to match. 865 return 219; // "zmm12" 866 case '3': // 1 string to match. 867 return 220; // "zmm13" 868 case '4': // 1 string to match. 869 return 221; // "zmm14" 870 case '5': // 1 string to match. 871 return 222; // "zmm15" 872 case '6': // 1 string to match. 873 return 223; // "zmm16" 874 case '7': // 1 string to match. 875 return 224; // "zmm17" 876 case '8': // 1 string to match. 877 return 225; // "zmm18" 878 case '9': // 1 string to match. 879 return 226; // "zmm19" 880 } 881 break; 882 case '2': // 10 strings to match. 883 switch (Name[4]) { 884 default: break; 885 case '0': // 1 string to match. 886 return 227; // "zmm20" 887 case '1': // 1 string to match. 888 return 228; // "zmm21" 889 case '2': // 1 string to match. 890 return 229; // "zmm22" 891 case '3': // 1 string to match. 892 return 230; // "zmm23" 893 case '4': // 1 string to match. 894 return 231; // "zmm24" 895 case '5': // 1 string to match. 896 return 232; // "zmm25" 897 case '6': // 1 string to match. 898 return 233; // "zmm26" 899 case '7': // 1 string to match. 900 return 234; // "zmm27" 901 case '8': // 1 string to match. 902 return 235; // "zmm28" 903 case '9': // 1 string to match. 904 return 236; // "zmm29" 905 } 906 break; 907 case '3': // 2 strings to match. 908 switch (Name[4]) { 909 default: break; 910 case '0': // 1 string to match. 911 return 237; // "zmm30" 912 case '1': // 1 string to match. 913 return 238; // "zmm31" 914 } 915 break; 916 } 917 break; 918 } 919 break; 920 case 7: // 1 string to match. 921 if (memcmp(Name.data()+0, "dirflag", 7) != 0) 922 break; 923 return 14; // "dirflag" 924 } 925 return 0; 926} 927 928#endif // GET_REGISTER_MATCHER 929 930 931#ifdef GET_SUBTARGET_FEATURE_NAME 932#undef GET_SUBTARGET_FEATURE_NAME 933 934// User-level names for subtarget features that participate in 935// instruction matching. 936static const char *getSubtargetFeatureName(uint64_t Val) { 937 switch(Val) { 938 case Feature_Not64BitModeBit: return "Not 64-bit mode"; 939 case Feature_In64BitModeBit: return "64-bit mode"; 940 case Feature_In16BitModeBit: return "16-bit mode"; 941 case Feature_Not16BitModeBit: return "Not 16-bit mode"; 942 case Feature_In32BitModeBit: return "32-bit mode"; 943 default: return "(unknown)"; 944 } 945} 946 947#endif // GET_SUBTARGET_FEATURE_NAME 948 949 950#ifdef GET_MATCHER_IMPLEMENTATION 951#undef GET_MATCHER_IMPLEMENTATION 952 953static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) { 954 switch (VariantID) { 955 case 0: 956 switch (Mnemonic.size()) { 957 default: break; 958 case 3: // 6 strings to match. 959 switch (Mnemonic[0]) { 960 default: break; 961 case 'c': // 4 strings to match. 962 switch (Mnemonic[1]) { 963 default: break; 964 case 'b': // 1 string to match. 965 if (Mnemonic[2] != 'w') 966 break; 967 Mnemonic = "cbtw"; // "cbw" 968 return; 969 case 'd': // 1 string to match. 970 if (Mnemonic[2] != 'q') 971 break; 972 Mnemonic = "cltd"; // "cdq" 973 return; 974 case 'q': // 1 string to match. 975 if (Mnemonic[2] != 'o') 976 break; 977 Mnemonic = "cqto"; // "cqo" 978 return; 979 case 'w': // 1 string to match. 980 if (Mnemonic[2] != 'd') 981 break; 982 Mnemonic = "cwtd"; // "cwd" 983 return; 984 } 985 break; 986 case 'p': // 1 string to match. 987 if (memcmp(Mnemonic.data()+1, "op", 2) != 0) 988 break; 989 if (Features.test(Feature_In16BitModeBit)) // "pop" 990 Mnemonic = "popw"; 991 else if (Features.test(Feature_In32BitModeBit)) 992 Mnemonic = "popl"; 993 else if (Features.test(Feature_In64BitModeBit)) 994 Mnemonic = "popq"; 995 return; 996 case 'r': // 1 string to match. 997 if (memcmp(Mnemonic.data()+1, "et", 2) != 0) 998 break; 999 if (Features.test(Feature_In16BitModeBit)) // "ret" 1000 Mnemonic = "retw"; 1001 else if (Features.test(Feature_In32BitModeBit)) 1002 Mnemonic = "retl"; 1003 else if (Features.test(Feature_In64BitModeBit)) 1004 Mnemonic = "retq"; 1005 return; 1006 } 1007 break; 1008 case 4: // 18 strings to match. 1009 switch (Mnemonic[0]) { 1010 default: break; 1011 case 'c': // 3 strings to match. 1012 switch (Mnemonic[1]) { 1013 default: break; 1014 case 'a': // 1 string to match. 1015 if (memcmp(Mnemonic.data()+2, "ll", 2) != 0) 1016 break; 1017 if (Features.test(Feature_In16BitModeBit)) // "call" 1018 Mnemonic = "callw"; 1019 else if (Features.test(Feature_In32BitModeBit)) 1020 Mnemonic = "calll"; 1021 else if (Features.test(Feature_In64BitModeBit)) 1022 Mnemonic = "callq"; 1023 return; 1024 case 'd': // 1 string to match. 1025 if (memcmp(Mnemonic.data()+2, "qe", 2) != 0) 1026 break; 1027 Mnemonic = "cltq"; // "cdqe" 1028 return; 1029 case 'w': // 1 string to match. 1030 if (memcmp(Mnemonic.data()+2, "de", 2) != 0) 1031 break; 1032 Mnemonic = "cwtl"; // "cwde" 1033 return; 1034 } 1035 break; 1036 case 'i': // 1 string to match. 1037 if (memcmp(Mnemonic.data()+1, "ret", 3) != 0) 1038 break; 1039 if (Features.test(Feature_In16BitModeBit)) // "iret" 1040 Mnemonic = "iretw"; 1041 else if (Features.test(Feature_Not16BitModeBit)) 1042 Mnemonic = "iretl"; 1043 return; 1044 case 'l': // 3 strings to match. 1045 switch (Mnemonic[1]) { 1046 default: break; 1047 case 'g': // 1 string to match. 1048 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1049 break; 1050 if (Features.test(Feature_In16BitModeBit)) // "lgdt" 1051 Mnemonic = "lgdtw"; 1052 else if (Features.test(Feature_In32BitModeBit)) 1053 Mnemonic = "lgdtl"; 1054 else if (Features.test(Feature_In64BitModeBit)) 1055 Mnemonic = "lgdtq"; 1056 return; 1057 case 'i': // 1 string to match. 1058 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1059 break; 1060 if (Features.test(Feature_In16BitModeBit)) // "lidt" 1061 Mnemonic = "lidtw"; 1062 else if (Features.test(Feature_In32BitModeBit)) 1063 Mnemonic = "lidtl"; 1064 else if (Features.test(Feature_In64BitModeBit)) 1065 Mnemonic = "lidtq"; 1066 return; 1067 case 'r': // 1 string to match. 1068 if (memcmp(Mnemonic.data()+2, "et", 2) != 0) 1069 break; 1070 if (Features.test(Feature_In16BitModeBit)) // "lret" 1071 Mnemonic = "lretw"; 1072 else if (Features.test(Feature_Not16BitModeBit)) 1073 Mnemonic = "lretl"; 1074 return; 1075 } 1076 break; 1077 case 'p': // 3 strings to match. 1078 switch (Mnemonic[1]) { 1079 default: break; 1080 case 'o': // 2 strings to match. 1081 if (Mnemonic[2] != 'p') 1082 break; 1083 switch (Mnemonic[3]) { 1084 default: break; 1085 case 'a': // 1 string to match. 1086 if (Features.test(Feature_In16BitModeBit)) // "popa" 1087 Mnemonic = "popaw"; 1088 else if (Features.test(Feature_In32BitModeBit)) 1089 Mnemonic = "popal"; 1090 return; 1091 case 'f': // 1 string to match. 1092 if (Features.test(Feature_In16BitModeBit)) // "popf" 1093 Mnemonic = "popfw"; 1094 else if (Features.test(Feature_In32BitModeBit)) 1095 Mnemonic = "popfl"; 1096 else if (Features.test(Feature_In64BitModeBit)) 1097 Mnemonic = "popfq"; 1098 return; 1099 } 1100 break; 1101 case 'u': // 1 string to match. 1102 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0) 1103 break; 1104 if (Features.test(Feature_In16BitModeBit)) // "push" 1105 Mnemonic = "pushw"; 1106 else if (Features.test(Feature_In32BitModeBit)) 1107 Mnemonic = "pushl"; 1108 else if (Features.test(Feature_In64BitModeBit)) 1109 Mnemonic = "pushq"; 1110 return; 1111 } 1112 break; 1113 case 'r': // 1 string to match. 1114 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0) 1115 break; 1116 if (Features.test(Feature_In16BitModeBit)) // "retn" 1117 Mnemonic = "retw"; 1118 else if (Features.test(Feature_In32BitModeBit)) 1119 Mnemonic = "retl"; 1120 else if (Features.test(Feature_In64BitModeBit)) 1121 Mnemonic = "retq"; 1122 return; 1123 case 's': // 6 strings to match. 1124 switch (Mnemonic[1]) { 1125 default: break; 1126 case 'a': // 4 strings to match. 1127 if (Mnemonic[2] != 'l') 1128 break; 1129 switch (Mnemonic[3]) { 1130 default: break; 1131 case 'b': // 1 string to match. 1132 Mnemonic = "shlb"; // "salb" 1133 return; 1134 case 'l': // 1 string to match. 1135 Mnemonic = "shll"; // "sall" 1136 return; 1137 case 'q': // 1 string to match. 1138 Mnemonic = "shlq"; // "salq" 1139 return; 1140 case 'w': // 1 string to match. 1141 Mnemonic = "shlw"; // "salw" 1142 return; 1143 } 1144 break; 1145 case 'g': // 1 string to match. 1146 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1147 break; 1148 if (Features.test(Feature_In16BitModeBit)) // "sgdt" 1149 Mnemonic = "sgdtw"; 1150 else if (Features.test(Feature_In32BitModeBit)) 1151 Mnemonic = "sgdtl"; 1152 else if (Features.test(Feature_In64BitModeBit)) 1153 Mnemonic = "sgdtq"; 1154 return; 1155 case 'i': // 1 string to match. 1156 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1157 break; 1158 if (Features.test(Feature_In16BitModeBit)) // "sidt" 1159 Mnemonic = "sidtw"; 1160 else if (Features.test(Feature_In32BitModeBit)) 1161 Mnemonic = "sidtl"; 1162 else if (Features.test(Feature_In64BitModeBit)) 1163 Mnemonic = "sidtq"; 1164 return; 1165 } 1166 break; 1167 case 'u': // 1 string to match. 1168 if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0) 1169 break; 1170 Mnemonic = "ud2"; // "ud2a" 1171 return; 1172 } 1173 break; 1174 case 5: // 9 strings to match. 1175 switch (Mnemonic[0]) { 1176 default: break; 1177 case 'f': // 1 string to match. 1178 if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0) 1179 break; 1180 Mnemonic = "fildll"; // "fildq" 1181 return; 1182 case 'p': // 3 strings to match. 1183 switch (Mnemonic[1]) { 1184 default: break; 1185 case 'o': // 1 string to match. 1186 if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0) 1187 break; 1188 Mnemonic = "popfl"; // "popfd" 1189 return; 1190 case 'u': // 2 strings to match. 1191 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0) 1192 break; 1193 switch (Mnemonic[4]) { 1194 default: break; 1195 case 'a': // 1 string to match. 1196 if (Features.test(Feature_In16BitModeBit)) // "pusha" 1197 Mnemonic = "pushaw"; 1198 else if (Features.test(Feature_In32BitModeBit)) 1199 Mnemonic = "pushal"; 1200 return; 1201 case 'f': // 1 string to match. 1202 if (Features.test(Feature_In16BitModeBit)) // "pushf" 1203 Mnemonic = "pushfw"; 1204 else if (Features.test(Feature_In32BitModeBit)) 1205 Mnemonic = "pushfl"; 1206 else if (Features.test(Feature_In64BitModeBit)) 1207 Mnemonic = "pushfq"; 1208 return; 1209 } 1210 break; 1211 } 1212 break; 1213 case 's': // 4 strings to match. 1214 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0) 1215 break; 1216 switch (Mnemonic[4]) { 1217 default: break; 1218 case 'b': // 1 string to match. 1219 Mnemonic = "movsb"; // "smovb" 1220 return; 1221 case 'l': // 1 string to match. 1222 Mnemonic = "movsl"; // "smovl" 1223 return; 1224 case 'q': // 1 string to match. 1225 Mnemonic = "movsq"; // "smovq" 1226 return; 1227 case 'w': // 1 string to match. 1228 Mnemonic = "movsw"; // "smovw" 1229 return; 1230 } 1231 break; 1232 case 'v': // 1 string to match. 1233 if (memcmp(Mnemonic.data()+1, "errw", 4) != 0) 1234 break; 1235 Mnemonic = "verr"; // "verrw" 1236 return; 1237 } 1238 break; 1239 case 6: // 15 strings to match. 1240 switch (Mnemonic[0]) { 1241 default: break; 1242 case 'c': // 6 strings to match. 1243 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0) 1244 break; 1245 switch (Mnemonic[4]) { 1246 default: break; 1247 case 'c': // 3 strings to match. 1248 switch (Mnemonic[5]) { 1249 default: break; 1250 case 'l': // 1 string to match. 1251 Mnemonic = "cmovbl"; // "cmovcl" 1252 return; 1253 case 'q': // 1 string to match. 1254 Mnemonic = "cmovbq"; // "cmovcq" 1255 return; 1256 case 'w': // 1 string to match. 1257 Mnemonic = "cmovbw"; // "cmovcw" 1258 return; 1259 } 1260 break; 1261 case 'z': // 3 strings to match. 1262 switch (Mnemonic[5]) { 1263 default: break; 1264 case 'l': // 1 string to match. 1265 Mnemonic = "cmovel"; // "cmovzl" 1266 return; 1267 case 'q': // 1 string to match. 1268 Mnemonic = "cmoveq"; // "cmovzq" 1269 return; 1270 case 'w': // 1 string to match. 1271 Mnemonic = "cmovew"; // "cmovzw" 1272 return; 1273 } 1274 break; 1275 } 1276 break; 1277 case 'f': // 4 strings to match. 1278 switch (Mnemonic[1]) { 1279 default: break; 1280 case 'c': // 2 strings to match. 1281 if (memcmp(Mnemonic.data()+2, "mov", 3) != 0) 1282 break; 1283 switch (Mnemonic[5]) { 1284 default: break; 1285 case 'a': // 1 string to match. 1286 Mnemonic = "fcmovnbe"; // "fcmova" 1287 return; 1288 case 'z': // 1 string to match. 1289 Mnemonic = "fcmove"; // "fcmovz" 1290 return; 1291 } 1292 break; 1293 case 'i': // 1 string to match. 1294 if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0) 1295 break; 1296 Mnemonic = "fistpll"; // "fistpq" 1297 return; 1298 case 'l': // 1 string to match. 1299 if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0) 1300 break; 1301 Mnemonic = "fldcw"; // "fldcww" 1302 return; 1303 } 1304 break; 1305 case 'l': // 2 strings to match. 1306 if (memcmp(Mnemonic.data()+1, "eave", 4) != 0) 1307 break; 1308 switch (Mnemonic[5]) { 1309 default: break; 1310 case 'l': // 1 string to match. 1311 if (Features.test(Feature_Not64BitModeBit)) // "leavel" 1312 Mnemonic = "leave"; 1313 return; 1314 case 'q': // 1 string to match. 1315 if (Features.test(Feature_In64BitModeBit)) // "leaveq" 1316 Mnemonic = "leave"; 1317 return; 1318 } 1319 break; 1320 case 'p': // 1 string to match. 1321 if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0) 1322 break; 1323 Mnemonic = "pushfl"; // "pushfd" 1324 return; 1325 case 's': // 1 string to match. 1326 if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0) 1327 break; 1328 Mnemonic = "sysretl"; // "sysret" 1329 return; 1330 case 'x': // 1 string to match. 1331 if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0) 1332 break; 1333 Mnemonic = "xsave64"; // "xsaveq" 1334 return; 1335 } 1336 break; 1337 case 7: // 34 strings to match. 1338 switch (Mnemonic[0]) { 1339 default: break; 1340 case 'c': // 24 strings to match. 1341 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0) 1342 break; 1343 switch (Mnemonic[4]) { 1344 default: break; 1345 case 'n': // 18 strings to match. 1346 switch (Mnemonic[5]) { 1347 default: break; 1348 case 'a': // 3 strings to match. 1349 switch (Mnemonic[6]) { 1350 default: break; 1351 case 'l': // 1 string to match. 1352 Mnemonic = "cmovbel"; // "cmovnal" 1353 return; 1354 case 'q': // 1 string to match. 1355 Mnemonic = "cmovbeq"; // "cmovnaq" 1356 return; 1357 case 'w': // 1 string to match. 1358 Mnemonic = "cmovbew"; // "cmovnaw" 1359 return; 1360 } 1361 break; 1362 case 'b': // 3 strings to match. 1363 switch (Mnemonic[6]) { 1364 default: break; 1365 case 'l': // 1 string to match. 1366 Mnemonic = "cmovael"; // "cmovnbl" 1367 return; 1368 case 'q': // 1 string to match. 1369 Mnemonic = "cmovaeq"; // "cmovnbq" 1370 return; 1371 case 'w': // 1 string to match. 1372 Mnemonic = "cmovaew"; // "cmovnbw" 1373 return; 1374 } 1375 break; 1376 case 'c': // 3 strings to match. 1377 switch (Mnemonic[6]) { 1378 default: break; 1379 case 'l': // 1 string to match. 1380 Mnemonic = "cmovael"; // "cmovncl" 1381 return; 1382 case 'q': // 1 string to match. 1383 Mnemonic = "cmovaeq"; // "cmovncq" 1384 return; 1385 case 'w': // 1 string to match. 1386 Mnemonic = "cmovaew"; // "cmovncw" 1387 return; 1388 } 1389 break; 1390 case 'g': // 3 strings to match. 1391 switch (Mnemonic[6]) { 1392 default: break; 1393 case 'l': // 1 string to match. 1394 Mnemonic = "cmovlel"; // "cmovngl" 1395 return; 1396 case 'q': // 1 string to match. 1397 Mnemonic = "cmovleq"; // "cmovngq" 1398 return; 1399 case 'w': // 1 string to match. 1400 Mnemonic = "cmovlew"; // "cmovngw" 1401 return; 1402 } 1403 break; 1404 case 'l': // 3 strings to match. 1405 switch (Mnemonic[6]) { 1406 default: break; 1407 case 'l': // 1 string to match. 1408 Mnemonic = "cmovgel"; // "cmovnll" 1409 return; 1410 case 'q': // 1 string to match. 1411 Mnemonic = "cmovgeq"; // "cmovnlq" 1412 return; 1413 case 'w': // 1 string to match. 1414 Mnemonic = "cmovgew"; // "cmovnlw" 1415 return; 1416 } 1417 break; 1418 case 'z': // 3 strings to match. 1419 switch (Mnemonic[6]) { 1420 default: break; 1421 case 'l': // 1 string to match. 1422 Mnemonic = "cmovnel"; // "cmovnzl" 1423 return; 1424 case 'q': // 1 string to match. 1425 Mnemonic = "cmovneq"; // "cmovnzq" 1426 return; 1427 case 'w': // 1 string to match. 1428 Mnemonic = "cmovnew"; // "cmovnzw" 1429 return; 1430 } 1431 break; 1432 } 1433 break; 1434 case 'p': // 6 strings to match. 1435 switch (Mnemonic[5]) { 1436 default: break; 1437 case 'e': // 3 strings to match. 1438 switch (Mnemonic[6]) { 1439 default: break; 1440 case 'l': // 1 string to match. 1441 Mnemonic = "cmovpl"; // "cmovpel" 1442 return; 1443 case 'q': // 1 string to match. 1444 Mnemonic = "cmovpq"; // "cmovpeq" 1445 return; 1446 case 'w': // 1 string to match. 1447 Mnemonic = "cmovpw"; // "cmovpew" 1448 return; 1449 } 1450 break; 1451 case 'o': // 3 strings to match. 1452 switch (Mnemonic[6]) { 1453 default: break; 1454 case 'l': // 1 string to match. 1455 Mnemonic = "cmovnpl"; // "cmovpol" 1456 return; 1457 case 'q': // 1 string to match. 1458 Mnemonic = "cmovnpq"; // "cmovpoq" 1459 return; 1460 case 'w': // 1 string to match. 1461 Mnemonic = "cmovnpw"; // "cmovpow" 1462 return; 1463 } 1464 break; 1465 } 1466 break; 1467 } 1468 break; 1469 case 'f': // 6 strings to match. 1470 switch (Mnemonic[1]) { 1471 default: break; 1472 case 'c': // 2 strings to match. 1473 if (memcmp(Mnemonic.data()+2, "mov", 3) != 0) 1474 break; 1475 switch (Mnemonic[5]) { 1476 default: break; 1477 case 'a': // 1 string to match. 1478 if (Mnemonic[6] != 'e') 1479 break; 1480 Mnemonic = "fcmovnb"; // "fcmovae" 1481 return; 1482 case 'n': // 1 string to match. 1483 if (Mnemonic[6] != 'a') 1484 break; 1485 Mnemonic = "fcmovbe"; // "fcmovna" 1486 return; 1487 } 1488 break; 1489 case 'i': // 1 string to match. 1490 if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0) 1491 break; 1492 Mnemonic = "fisttpll"; // "fisttpq" 1493 return; 1494 case 'n': // 2 strings to match. 1495 if (memcmp(Mnemonic.data()+2, "st", 2) != 0) 1496 break; 1497 switch (Mnemonic[4]) { 1498 default: break; 1499 case 'c': // 1 string to match. 1500 if (memcmp(Mnemonic.data()+5, "ww", 2) != 0) 1501 break; 1502 Mnemonic = "fnstcw"; // "fnstcww" 1503 return; 1504 case 's': // 1 string to match. 1505 if (memcmp(Mnemonic.data()+5, "ww", 2) != 0) 1506 break; 1507 Mnemonic = "fnstsw"; // "fnstsww" 1508 return; 1509 } 1510 break; 1511 case 'x': // 1 string to match. 1512 if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0) 1513 break; 1514 Mnemonic = "fxsave64"; // "fxsaveq" 1515 return; 1516 } 1517 break; 1518 case 's': // 1 string to match. 1519 if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0) 1520 break; 1521 Mnemonic = "sysexitl"; // "sysexit" 1522 return; 1523 case 'x': // 3 strings to match. 1524 switch (Mnemonic[1]) { 1525 default: break; 1526 case 'r': // 1 string to match. 1527 if (memcmp(Mnemonic.data()+2, "storq", 5) != 0) 1528 break; 1529 Mnemonic = "xrstor64"; // "xrstorq" 1530 return; 1531 case 's': // 2 strings to match. 1532 if (memcmp(Mnemonic.data()+2, "ave", 3) != 0) 1533 break; 1534 switch (Mnemonic[5]) { 1535 default: break; 1536 case 'c': // 1 string to match. 1537 if (Mnemonic[6] != 'q') 1538 break; 1539 Mnemonic = "xsavec64"; // "xsavecq" 1540 return; 1541 case 's': // 1 string to match. 1542 if (Mnemonic[6] != 'q') 1543 break; 1544 Mnemonic = "xsaves64"; // "xsavesq" 1545 return; 1546 } 1547 break; 1548 } 1549 break; 1550 } 1551 break; 1552 case 8: // 15 strings to match. 1553 switch (Mnemonic[0]) { 1554 default: break; 1555 case 'c': // 12 strings to match. 1556 if (memcmp(Mnemonic.data()+1, "movn", 4) != 0) 1557 break; 1558 switch (Mnemonic[5]) { 1559 default: break; 1560 case 'a': // 3 strings to match. 1561 if (Mnemonic[6] != 'e') 1562 break; 1563 switch (Mnemonic[7]) { 1564 default: break; 1565 case 'l': // 1 string to match. 1566 Mnemonic = "cmovbl"; // "cmovnael" 1567 return; 1568 case 'q': // 1 string to match. 1569 Mnemonic = "cmovbq"; // "cmovnaeq" 1570 return; 1571 case 'w': // 1 string to match. 1572 Mnemonic = "cmovbw"; // "cmovnaew" 1573 return; 1574 } 1575 break; 1576 case 'b': // 3 strings to match. 1577 if (Mnemonic[6] != 'e') 1578 break; 1579 switch (Mnemonic[7]) { 1580 default: break; 1581 case 'l': // 1 string to match. 1582 Mnemonic = "cmoval"; // "cmovnbel" 1583 return; 1584 case 'q': // 1 string to match. 1585 Mnemonic = "cmovaq"; // "cmovnbeq" 1586 return; 1587 case 'w': // 1 string to match. 1588 Mnemonic = "cmovaw"; // "cmovnbew" 1589 return; 1590 } 1591 break; 1592 case 'g': // 3 strings to match. 1593 if (Mnemonic[6] != 'e') 1594 break; 1595 switch (Mnemonic[7]) { 1596 default: break; 1597 case 'l': // 1 string to match. 1598 Mnemonic = "cmovll"; // "cmovngel" 1599 return; 1600 case 'q': // 1 string to match. 1601 Mnemonic = "cmovlq"; // "cmovngeq" 1602 return; 1603 case 'w': // 1 string to match. 1604 Mnemonic = "cmovlw"; // "cmovngew" 1605 return; 1606 } 1607 break; 1608 case 'l': // 3 strings to match. 1609 if (Mnemonic[6] != 'e') 1610 break; 1611 switch (Mnemonic[7]) { 1612 default: break; 1613 case 'l': // 1 string to match. 1614 Mnemonic = "cmovgl"; // "cmovnlel" 1615 return; 1616 case 'q': // 1 string to match. 1617 Mnemonic = "cmovgq"; // "cmovnleq" 1618 return; 1619 case 'w': // 1 string to match. 1620 Mnemonic = "cmovgw"; // "cmovnlew" 1621 return; 1622 } 1623 break; 1624 } 1625 break; 1626 case 'f': // 2 strings to match. 1627 switch (Mnemonic[1]) { 1628 default: break; 1629 case 'c': // 1 string to match. 1630 if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0) 1631 break; 1632 Mnemonic = "fcmovb"; // "fcmovnae" 1633 return; 1634 case 'x': // 1 string to match. 1635 if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0) 1636 break; 1637 Mnemonic = "fxrstor64"; // "fxrstorq" 1638 return; 1639 } 1640 break; 1641 case 'x': // 1 string to match. 1642 if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0) 1643 break; 1644 Mnemonic = "xrstors64"; // "xrstorsq" 1645 return; 1646 } 1647 break; 1648 case 9: // 1 string to match. 1649 if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0) 1650 break; 1651 Mnemonic = "xsaveopt64"; // "xsaveoptq" 1652 return; 1653 } 1654 break; 1655 case 1: 1656 switch (Mnemonic.size()) { 1657 default: break; 1658 case 3: // 1 string to match. 1659 if (memcmp(Mnemonic.data()+0, "sal", 3) != 0) 1660 break; 1661 Mnemonic = "shl"; // "sal" 1662 return; 1663 case 4: // 7 strings to match. 1664 switch (Mnemonic[0]) { 1665 default: break; 1666 case 'l': // 2 strings to match. 1667 switch (Mnemonic[1]) { 1668 default: break; 1669 case 'g': // 1 string to match. 1670 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1671 break; 1672 if (Features.test(Feature_In16BitModeBit)) // "lgdt" 1673 Mnemonic = "lgdtw"; 1674 else if (Features.test(Feature_In32BitModeBit)) 1675 Mnemonic = "lgdtd"; 1676 return; 1677 case 'i': // 1 string to match. 1678 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1679 break; 1680 if (Features.test(Feature_In16BitModeBit)) // "lidt" 1681 Mnemonic = "lidtw"; 1682 else if (Features.test(Feature_In32BitModeBit)) 1683 Mnemonic = "lidtd"; 1684 return; 1685 } 1686 break; 1687 case 'p': // 2 strings to match. 1688 if (memcmp(Mnemonic.data()+1, "op", 2) != 0) 1689 break; 1690 switch (Mnemonic[3]) { 1691 default: break; 1692 case 'a': // 1 string to match. 1693 if (Features.test(Feature_In16BitModeBit)) // "popa" 1694 Mnemonic = "popaw"; 1695 else if (Features.test(Feature_In32BitModeBit)) 1696 Mnemonic = "popal"; 1697 return; 1698 case 'f': // 1 string to match. 1699 if (Features.test(Feature_In64BitModeBit)) // "popf" 1700 Mnemonic = "popfq"; 1701 return; 1702 } 1703 break; 1704 case 'r': // 1 string to match. 1705 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0) 1706 break; 1707 Mnemonic = "ret"; // "retn" 1708 return; 1709 case 's': // 2 strings to match. 1710 switch (Mnemonic[1]) { 1711 default: break; 1712 case 'g': // 1 string to match. 1713 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1714 break; 1715 if (Features.test(Feature_In16BitModeBit)) // "sgdt" 1716 Mnemonic = "sgdtw"; 1717 else if (Features.test(Feature_In32BitModeBit)) 1718 Mnemonic = "sgdtd"; 1719 return; 1720 case 'i': // 1 string to match. 1721 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0) 1722 break; 1723 if (Features.test(Feature_In16BitModeBit)) // "sidt" 1724 Mnemonic = "sidtw"; 1725 else if (Features.test(Feature_In32BitModeBit)) 1726 Mnemonic = "sidtd"; 1727 return; 1728 } 1729 break; 1730 } 1731 break; 1732 case 5: // 6 strings to match. 1733 switch (Mnemonic[0]) { 1734 default: break; 1735 case 'c': // 2 strings to match. 1736 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0) 1737 break; 1738 switch (Mnemonic[4]) { 1739 default: break; 1740 case 'c': // 1 string to match. 1741 Mnemonic = "cmovb"; // "cmovc" 1742 return; 1743 case 'z': // 1 string to match. 1744 Mnemonic = "cmove"; // "cmovz" 1745 return; 1746 } 1747 break; 1748 case 'p': // 4 strings to match. 1749 switch (Mnemonic[1]) { 1750 default: break; 1751 case 'o': // 2 strings to match. 1752 if (Mnemonic[2] != 'p') 1753 break; 1754 switch (Mnemonic[3]) { 1755 default: break; 1756 case 'a': // 1 string to match. 1757 if (Mnemonic[4] != 'd') 1758 break; 1759 if (Features.test(Feature_Not64BitModeBit)) // "popad" 1760 Mnemonic = "popal"; 1761 return; 1762 case 'f': // 1 string to match. 1763 if (Mnemonic[4] != 'w') 1764 break; 1765 if (Features.test(Feature_In32BitModeBit)) // "popfw" 1766 Mnemonic = "popf"; 1767 else if (Features.test(Feature_In64BitModeBit)) 1768 Mnemonic = "popf"; 1769 return; 1770 } 1771 break; 1772 case 'u': // 2 strings to match. 1773 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0) 1774 break; 1775 switch (Mnemonic[4]) { 1776 default: break; 1777 case 'a': // 1 string to match. 1778 if (Features.test(Feature_In16BitModeBit)) // "pusha" 1779 Mnemonic = "pushaw"; 1780 else if (Features.test(Feature_In32BitModeBit)) 1781 Mnemonic = "pushal"; 1782 return; 1783 case 'f': // 1 string to match. 1784 if (Features.test(Feature_In64BitModeBit)) // "pushf" 1785 Mnemonic = "pushfq"; 1786 return; 1787 } 1788 break; 1789 } 1790 break; 1791 } 1792 break; 1793 case 6: // 10 strings to match. 1794 switch (Mnemonic[0]) { 1795 default: break; 1796 case 'c': // 8 strings to match. 1797 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0) 1798 break; 1799 switch (Mnemonic[4]) { 1800 default: break; 1801 case 'n': // 6 strings to match. 1802 switch (Mnemonic[5]) { 1803 default: break; 1804 case 'a': // 1 string to match. 1805 Mnemonic = "cmovbe"; // "cmovna" 1806 return; 1807 case 'b': // 1 string to match. 1808 Mnemonic = "cmovae"; // "cmovnb" 1809 return; 1810 case 'c': // 1 string to match. 1811 Mnemonic = "cmovae"; // "cmovnc" 1812 return; 1813 case 'g': // 1 string to match. 1814 Mnemonic = "cmovle"; // "cmovng" 1815 return; 1816 case 'l': // 1 string to match. 1817 Mnemonic = "cmovge"; // "cmovnl" 1818 return; 1819 case 'z': // 1 string to match. 1820 Mnemonic = "cmovne"; // "cmovnz" 1821 return; 1822 } 1823 break; 1824 case 'p': // 2 strings to match. 1825 switch (Mnemonic[5]) { 1826 default: break; 1827 case 'e': // 1 string to match. 1828 Mnemonic = "cmovp"; // "cmovpe" 1829 return; 1830 case 'o': // 1 string to match. 1831 Mnemonic = "cmovnp"; // "cmovpo" 1832 return; 1833 } 1834 break; 1835 } 1836 break; 1837 case 'p': // 2 strings to match. 1838 if (memcmp(Mnemonic.data()+1, "ush", 3) != 0) 1839 break; 1840 switch (Mnemonic[4]) { 1841 default: break; 1842 case 'a': // 1 string to match. 1843 if (Mnemonic[5] != 'd') 1844 break; 1845 if (Features.test(Feature_Not64BitModeBit)) // "pushad" 1846 Mnemonic = "pushal"; 1847 return; 1848 case 'f': // 1 string to match. 1849 if (Mnemonic[5] != 'w') 1850 break; 1851 if (Features.test(Feature_In32BitModeBit)) // "pushfw" 1852 Mnemonic = "pushf"; 1853 else if (Features.test(Feature_In64BitModeBit)) 1854 Mnemonic = "pushf"; 1855 return; 1856 } 1857 break; 1858 } 1859 break; 1860 case 7: // 6 strings to match. 1861 switch (Mnemonic[0]) { 1862 default: break; 1863 case 'a': // 1 string to match. 1864 if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0) 1865 break; 1866 Mnemonic = "xacquire"; // "acquire" 1867 return; 1868 case 'c': // 4 strings to match. 1869 if (memcmp(Mnemonic.data()+1, "movn", 4) != 0) 1870 break; 1871 switch (Mnemonic[5]) { 1872 default: break; 1873 case 'a': // 1 string to match. 1874 if (Mnemonic[6] != 'e') 1875 break; 1876 Mnemonic = "cmovb"; // "cmovnae" 1877 return; 1878 case 'b': // 1 string to match. 1879 if (Mnemonic[6] != 'e') 1880 break; 1881 Mnemonic = "cmova"; // "cmovnbe" 1882 return; 1883 case 'g': // 1 string to match. 1884 if (Mnemonic[6] != 'e') 1885 break; 1886 Mnemonic = "cmovl"; // "cmovnge" 1887 return; 1888 case 'l': // 1 string to match. 1889 if (Mnemonic[6] != 'e') 1890 break; 1891 Mnemonic = "cmovg"; // "cmovnle" 1892 return; 1893 } 1894 break; 1895 case 'r': // 1 string to match. 1896 if (memcmp(Mnemonic.data()+1, "elease", 6) != 0) 1897 break; 1898 Mnemonic = "xrelease"; // "release" 1899 return; 1900 } 1901 break; 1902 } 1903 break; 1904 } 1905 switch (Mnemonic.size()) { 1906 default: break; 1907 case 2: // 2 strings to match. 1908 if (Mnemonic[0] != 'j') 1909 break; 1910 switch (Mnemonic[1]) { 1911 default: break; 1912 case 'c': // 1 string to match. 1913 Mnemonic = "jb"; // "jc" 1914 return; 1915 case 'z': // 1 string to match. 1916 Mnemonic = "je"; // "jz" 1917 return; 1918 } 1919 break; 1920 case 3: // 8 strings to match. 1921 if (Mnemonic[0] != 'j') 1922 break; 1923 switch (Mnemonic[1]) { 1924 default: break; 1925 case 'n': // 6 strings to match. 1926 switch (Mnemonic[2]) { 1927 default: break; 1928 case 'a': // 1 string to match. 1929 Mnemonic = "jbe"; // "jna" 1930 return; 1931 case 'b': // 1 string to match. 1932 Mnemonic = "jae"; // "jnb" 1933 return; 1934 case 'c': // 1 string to match. 1935 Mnemonic = "jae"; // "jnc" 1936 return; 1937 case 'g': // 1 string to match. 1938 Mnemonic = "jle"; // "jng" 1939 return; 1940 case 'l': // 1 string to match. 1941 Mnemonic = "jge"; // "jnl" 1942 return; 1943 case 'z': // 1 string to match. 1944 Mnemonic = "jne"; // "jnz" 1945 return; 1946 } 1947 break; 1948 case 'p': // 2 strings to match. 1949 switch (Mnemonic[2]) { 1950 default: break; 1951 case 'e': // 1 string to match. 1952 Mnemonic = "jp"; // "jpe" 1953 return; 1954 case 'o': // 1 string to match. 1955 Mnemonic = "jnp"; // "jpo" 1956 return; 1957 } 1958 break; 1959 } 1960 break; 1961 case 4: // 8 strings to match. 1962 switch (Mnemonic[0]) { 1963 default: break; 1964 case 'j': // 4 strings to match. 1965 if (Mnemonic[1] != 'n') 1966 break; 1967 switch (Mnemonic[2]) { 1968 default: break; 1969 case 'a': // 1 string to match. 1970 if (Mnemonic[3] != 'e') 1971 break; 1972 Mnemonic = "jb"; // "jnae" 1973 return; 1974 case 'b': // 1 string to match. 1975 if (Mnemonic[3] != 'e') 1976 break; 1977 Mnemonic = "ja"; // "jnbe" 1978 return; 1979 case 'g': // 1 string to match. 1980 if (Mnemonic[3] != 'e') 1981 break; 1982 Mnemonic = "jl"; // "jnge" 1983 return; 1984 case 'l': // 1 string to match. 1985 if (Mnemonic[3] != 'e') 1986 break; 1987 Mnemonic = "jg"; // "jnle" 1988 return; 1989 } 1990 break; 1991 case 'r': // 2 strings to match. 1992 if (memcmp(Mnemonic.data()+1, "ep", 2) != 0) 1993 break; 1994 switch (Mnemonic[3]) { 1995 default: break; 1996 case 'e': // 1 string to match. 1997 Mnemonic = "rep"; // "repe" 1998 return; 1999 case 'z': // 1 string to match. 2000 Mnemonic = "rep"; // "repz" 2001 return; 2002 } 2003 break; 2004 case 's': // 2 strings to match. 2005 if (memcmp(Mnemonic.data()+1, "et", 2) != 0) 2006 break; 2007 switch (Mnemonic[3]) { 2008 default: break; 2009 case 'c': // 1 string to match. 2010 Mnemonic = "setb"; // "setc" 2011 return; 2012 case 'z': // 1 string to match. 2013 Mnemonic = "sete"; // "setz" 2014 return; 2015 } 2016 break; 2017 } 2018 break; 2019 case 5: // 11 strings to match. 2020 switch (Mnemonic[0]) { 2021 default: break; 2022 case 'f': // 1 string to match. 2023 if (memcmp(Mnemonic.data()+1, "wait", 4) != 0) 2024 break; 2025 Mnemonic = "wait"; // "fwait" 2026 return; 2027 case 'l': // 1 string to match. 2028 if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0) 2029 break; 2030 Mnemonic = "loope"; // "loopz" 2031 return; 2032 case 'r': // 1 string to match. 2033 if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0) 2034 break; 2035 Mnemonic = "repne"; // "repnz" 2036 return; 2037 case 's': // 8 strings to match. 2038 if (memcmp(Mnemonic.data()+1, "et", 2) != 0) 2039 break; 2040 switch (Mnemonic[3]) { 2041 default: break; 2042 case 'n': // 6 strings to match. 2043 switch (Mnemonic[4]) { 2044 default: break; 2045 case 'a': // 1 string to match. 2046 Mnemonic = "setbe"; // "setna" 2047 return; 2048 case 'b': // 1 string to match. 2049 Mnemonic = "setae"; // "setnb" 2050 return; 2051 case 'c': // 1 string to match. 2052 Mnemonic = "setae"; // "setnc" 2053 return; 2054 case 'g': // 1 string to match. 2055 Mnemonic = "setle"; // "setng" 2056 return; 2057 case 'l': // 1 string to match. 2058 Mnemonic = "setge"; // "setnl" 2059 return; 2060 case 'z': // 1 string to match. 2061 Mnemonic = "setne"; // "setnz" 2062 return; 2063 } 2064 break; 2065 case 'p': // 2 strings to match. 2066 switch (Mnemonic[4]) { 2067 default: break; 2068 case 'e': // 1 string to match. 2069 Mnemonic = "setp"; // "setpe" 2070 return; 2071 case 'o': // 1 string to match. 2072 Mnemonic = "setnp"; // "setpo" 2073 return; 2074 } 2075 break; 2076 } 2077 break; 2078 } 2079 break; 2080 case 6: // 6 strings to match. 2081 switch (Mnemonic[0]) { 2082 default: break; 2083 case 'f': // 1 string to match. 2084 if (memcmp(Mnemonic.data()+1, "comip", 5) != 0) 2085 break; 2086 Mnemonic = "fcompi"; // "fcomip" 2087 return; 2088 case 'l': // 1 string to match. 2089 if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0) 2090 break; 2091 Mnemonic = "loopne"; // "loopnz" 2092 return; 2093 case 's': // 4 strings to match. 2094 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0) 2095 break; 2096 switch (Mnemonic[4]) { 2097 default: break; 2098 case 'a': // 1 string to match. 2099 if (Mnemonic[5] != 'e') 2100 break; 2101 Mnemonic = "setb"; // "setnae" 2102 return; 2103 case 'b': // 1 string to match. 2104 if (Mnemonic[5] != 'e') 2105 break; 2106 Mnemonic = "seta"; // "setnbe" 2107 return; 2108 case 'g': // 1 string to match. 2109 if (Mnemonic[5] != 'e') 2110 break; 2111 Mnemonic = "setl"; // "setnge" 2112 return; 2113 case 'l': // 1 string to match. 2114 if (Mnemonic[5] != 'e') 2115 break; 2116 Mnemonic = "setg"; // "setnle" 2117 return; 2118 } 2119 break; 2120 } 2121 break; 2122 case 7: // 1 string to match. 2123 if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0) 2124 break; 2125 Mnemonic = "fucompi"; // "fucomip" 2126 return; 2127 } 2128} 2129 2130enum { 2131 Tie0_1_1, 2132 Tie0_2_2, 2133 Tie0_3_3, 2134 Tie0_4_4, 2135 Tie1_1_1, 2136 Tie1_2_2, 2137 Tie1_3_3, 2138 Tie1_4_4, 2139}; 2140 2141static const uint8_t TiedAsmOperandTable[][3] = { 2142 /* Tie0_1_1 */ { 0, 1, 1 }, 2143 /* Tie0_2_2 */ { 0, 2, 2 }, 2144 /* Tie0_3_3 */ { 0, 3, 3 }, 2145 /* Tie0_4_4 */ { 0, 4, 4 }, 2146 /* Tie1_1_1 */ { 1, 1, 1 }, 2147 /* Tie1_2_2 */ { 1, 2, 2 }, 2148 /* Tie1_3_3 */ { 1, 3, 3 }, 2149 /* Tie1_4_4 */ { 1, 4, 4 }, 2150}; 2151 2152namespace { 2153enum OperatorConversionKind { 2154 CVT_Done, 2155 CVT_Reg, 2156 CVT_Tied, 2157 CVT_imm_95_10, 2158 CVT_95_addImmOperands, 2159 CVT_regAX, 2160 CVT_regEAX, 2161 CVT_regRAX, 2162 CVT_95_Reg, 2163 CVT_95_addMemOperands, 2164 CVT_95_addAbsMemOperands, 2165 CVT_imm_95_7, 2166 CVT_imm_95_3, 2167 CVT_imm_95_2, 2168 CVT_imm_95_6, 2169 CVT_imm_95_4, 2170 CVT_imm_95_15, 2171 CVT_imm_95_13, 2172 CVT_imm_95_12, 2173 CVT_imm_95_14, 2174 CVT_imm_95_5, 2175 CVT_imm_95_1, 2176 CVT_imm_95_11, 2177 CVT_imm_95_9, 2178 CVT_imm_95_0, 2179 CVT_imm_95_8, 2180 CVT_95_addDstIdxOperands, 2181 CVT_95_addSrcIdxOperands, 2182 CVT_95_addGR32orGR64Operands, 2183 CVT_regST1, 2184 CVT_regST0, 2185 CVT_95_addMemOffsOperands, 2186 CVT_imm_95_17, 2187 CVT_imm_95_16, 2188 CVT_95_addAVX512RCOperands, 2189 CVT_95_addMaskPairOperands, 2190 CVT_NUM_CONVERTERS 2191}; 2192 2193enum InstructionConversionKind { 2194 Convert_NoOperands, 2195 Convert__imm_95_10, 2196 Convert__Imm1_0, 2197 Convert__Imm1_1, 2198 Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 2199 Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 2200 Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 2201 Convert__ImmSExti64i321_1, 2202 Convert__Reg1_0__Tie0_1_1__Reg1_1, 2203 Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 2204 Convert__Reg1_0__Tie0_1_1__Imm1_1, 2205 Convert__Reg1_0__Tie0_1_1__Mem165_1, 2206 Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 2207 Convert__Reg1_0__Tie0_1_1__Mem325_1, 2208 Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 2209 Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 2210 Convert__Reg1_0__Tie0_1_1__Mem645_1, 2211 Convert__Reg1_0__Tie0_1_1__Mem85_1, 2212 Convert__Mem165_0__Reg1_1, 2213 Convert__Mem165_0__ImmSExti16i81_1, 2214 Convert__Mem165_0__Imm1_1, 2215 Convert__Mem325_0__Reg1_1, 2216 Convert__Mem325_0__ImmSExti32i81_1, 2217 Convert__Mem325_0__Imm1_1, 2218 Convert__Mem645_0__Reg1_1, 2219 Convert__Mem645_0__ImmSExti64i81_1, 2220 Convert__Mem645_0__ImmSExti64i321_1, 2221 Convert__Mem85_0__Reg1_1, 2222 Convert__Mem85_0__Imm1_1, 2223 Convert__Reg1_1__Tie0_2_2__Reg1_0, 2224 Convert__Mem85_1__Reg1_0, 2225 Convert__Reg1_1__Tie0_2_2__Imm1_0, 2226 Convert__Mem85_1__Imm1_0, 2227 Convert__Reg1_1__Tie0_2_2__Mem85_0, 2228 Convert__Mem325_1__Reg1_0, 2229 Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 2230 Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 2231 Convert__Mem325_1__ImmSExti32i81_0, 2232 Convert__Mem325_1__Imm1_0, 2233 Convert__Reg1_1__Tie0_2_2__Mem325_0, 2234 Convert__Mem645_1__Reg1_0, 2235 Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 2236 Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 2237 Convert__Mem645_1__ImmSExti64i81_0, 2238 Convert__ImmSExti64i321_0, 2239 Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 2240 Convert__Mem645_1__ImmSExti64i321_0, 2241 Convert__Reg1_1__Tie0_2_2__Mem645_0, 2242 Convert__Mem165_1__Reg1_0, 2243 Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 2244 Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 2245 Convert__Mem165_1__ImmSExti16i81_0, 2246 Convert__Mem165_1__Imm1_0, 2247 Convert__Reg1_1__Tie0_2_2__Mem165_0, 2248 Convert__Reg1_1__Tie0_1_1__Reg1_0, 2249 Convert__Reg1_1__Tie0_1_1__Mem325_0, 2250 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Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 2843 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 2844 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 2845 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 2846 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 2847 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 2848 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 2849 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 2850 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 2851 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 2852 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 2853 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 2854 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 2855 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 2856 Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 2857 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 2858 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 2859 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 2860 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 2861 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 2862 Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 2863 Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 2864 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 2865 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 2866 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 2867 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 2868 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 2869 Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 2870 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 2871 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 2872 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 2873 Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 2874 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 2875 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3, 2876 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0, 2877 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 2878 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 2879 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 2880 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3, 2881 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0, 2882 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 2883 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 2884 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 2885 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 2886 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 2887 Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 2888 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 2889 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 2890 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 2891 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 2892 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 2893 Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 2894 Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 2895 Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 2896 Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 2897 Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 2898 Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 2899 Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 2900 Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 2901 Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 2902 Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 2903 Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 2904 Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 2905 Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 2906 Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 2907 Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 2908 Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 2909 Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 2910 Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 2911 Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 2912 Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 2913 Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 2914 Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 2915 Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 2916 Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 2917 Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 2918 Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 2919 Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 2920 Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 2921 Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 2922 Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 2923 Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 2924 Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5, 2925 Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0, 2926 Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5, 2927 Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0, 2928 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 2929 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 2930 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, 2931 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, 2932 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 2933 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, 2934 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, 2935 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 2936 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, 2937 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, 2938 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 2939 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 2940 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 2941 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 2942 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 2943 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 2944 Convert__Reg1_1__Mem512_RC256X5_3, 2945 Convert__Reg1_2__Mem512_RC256X5_0, 2946 Convert__Reg1_1__Mem512_RC5125_3, 2947 Convert__Reg1_2__Mem512_RC5125_0, 2948 Convert__Reg1_1__Mem256_RC5125_3, 2949 Convert__Reg1_2__Mem256_RC5125_0, 2950 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, 2951 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, 2952 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, 2953 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, 2954 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, 2955 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, 2956 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, 2957 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, 2958 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, 2959 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, 2960 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 2961 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 2962 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 2963 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 2964 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 2965 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 2966 Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 2967 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 2968 Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 2969 Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 2970 Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 2971 Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 2972 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 2973 Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 2974 Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 2975 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 2976 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 2977 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 2978 Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 2979 Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 2980 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 2981 Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 2982 Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 2983 Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 2984 Convert__Mem1285_2__Reg1_1__Reg1_0, 2985 Convert__Mem2565_2__Reg1_1__Reg1_0, 2986 Convert__Mem1285_0__Reg1_1__Reg1_2, 2987 Convert__Mem2565_0__Reg1_1__Reg1_2, 2988 Convert__Reg1_0__Reg1_2__Reg1_4, 2989 Convert__Mem645_1__Reg1_3__Reg1_0, 2990 Convert__Mem645_0__Reg1_2__Reg1_4, 2991 Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, 2992 Convert__Mem325_1__Reg1_3__Reg1_0, 2993 Convert__Mem325_0__Reg1_2__Reg1_4, 2994 Convert__VK4Pair1_2__Reg1_1__Reg1_0, 2995 Convert__VK8Pair1_2__Reg1_1__Reg1_0, 2996 Convert__VK16Pair1_2__Reg1_1__Reg1_0, 2997 Convert__VK16Pair1_0__Reg1_1__Reg1_2, 2998 Convert__VK16Pair1_0__Reg1_1__Mem5125_2, 2999 Convert__VK4Pair1_0__Reg1_1__Reg1_2, 3000 Convert__VK4Pair1_0__Reg1_1__Mem1285_2, 3001 Convert__VK8Pair1_0__Reg1_1__Reg1_2, 3002 Convert__VK8Pair1_0__Reg1_1__Mem2565_2, 3003 Convert__VK4Pair1_2__Reg1_1__Mem1285_0, 3004 Convert__VK8Pair1_2__Reg1_1__Mem2565_0, 3005 Convert__VK16Pair1_2__Reg1_1__Mem5125_0, 3006 Convert__VK16Pair1_0__Reg1_1__Mem325_2, 3007 Convert__VK4Pair1_0__Reg1_1__Mem325_2, 3008 Convert__VK8Pair1_0__Reg1_1__Mem325_2, 3009 Convert__VK16Pair1_3__Reg1_2__Mem325_0, 3010 Convert__VK4Pair1_3__Reg1_2__Mem325_0, 3011 Convert__VK8Pair1_3__Reg1_2__Mem325_0, 3012 Convert__VK2Pair1_2__Reg1_1__Reg1_0, 3013 Convert__VK2Pair1_0__Reg1_1__Reg1_2, 3014 Convert__VK2Pair1_0__Reg1_1__Mem1285_2, 3015 Convert__VK4Pair1_0__Reg1_1__Mem2565_2, 3016 Convert__VK8Pair1_0__Reg1_1__Mem5125_2, 3017 Convert__VK2Pair1_2__Reg1_1__Mem1285_0, 3018 Convert__VK4Pair1_2__Reg1_1__Mem2565_0, 3019 Convert__VK8Pair1_2__Reg1_1__Mem5125_0, 3020 Convert__VK2Pair1_0__Reg1_1__Mem645_2, 3021 Convert__VK4Pair1_0__Reg1_1__Mem645_2, 3022 Convert__VK8Pair1_0__Reg1_1__Mem645_2, 3023 Convert__VK2Pair1_3__Reg1_2__Mem645_0, 3024 Convert__VK4Pair1_3__Reg1_2__Mem645_0, 3025 Convert__VK8Pair1_3__Reg1_2__Mem645_0, 3026 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 3027 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 3028 Convert__Reg1_0__Reg1_2__Mem85_5, 3029 Convert__Reg1_1__Reg1_3__Mem85_0, 3030 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 3031 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 3032 Convert__Reg1_0__Reg1_2__Mem165_5, 3033 Convert__Reg1_1__Reg1_3__Mem165_0, 3034 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 3035 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 3036 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 3037 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 3038 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, 3039 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 3040 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 3041 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, 3042 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 3043 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 3044 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 3045 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 3046 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, 3047 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 3048 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 3049 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, 3050 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 3051 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 3052 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 3053 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 3054 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, 3055 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 3056 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 3057 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, 3058 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 3059 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 3060 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 3061 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 3062 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, 3063 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 3064 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 3065 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, 3066 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, 3067 Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, 3068 Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, 3069 Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4, 3070 Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4, 3071 Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, 3072 Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, 3073 Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0, 3074 Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, 3075 Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0, 3076 Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 3077 Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 3078 Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 3079 Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 3080 Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 3081 Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 3082 Convert__Mem165_1__Reg1_3__Reg1_0, 3083 Convert__Mem165_0__Reg1_2__Reg1_4, 3084 Convert__Reg1_2__Mem1285_1__Reg1_0, 3085 Convert__Reg1_0__Mem1285_1__Reg1_2, 3086 Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 3087 Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 3088 Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 3089 Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 3090 Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 3091 Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 3092 Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, 3093 Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, 3094 Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, 3095 Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, 3096 Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, 3097 Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, 3098 Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, 3099 Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, 3100 Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, 3101 Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, 3102 Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 3103 Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 3104 Convert__AbsMem161_0, 3105 Convert__Reg1_1__Tie0_2_2, 3106 Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, 3107 CVT_NUM_SIGNATURES 3108}; 3109 3110} // end anonymous namespace 3111 3112static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { 3113 // Convert_NoOperands 3114 { CVT_Done }, 3115 // Convert__imm_95_10 3116 { CVT_imm_95_10, 0, CVT_Done }, 3117 // Convert__Imm1_0 3118 { CVT_95_addImmOperands, 1, CVT_Done }, 3119 // Convert__Imm1_1 3120 { CVT_95_addImmOperands, 2, CVT_Done }, 3121 // Convert__regAX__Tie0_1_1__ImmSExti16i81_1 3122 { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3123 // Convert__regEAX__Tie0_1_1__ImmSExti32i81_1 3124 { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3125 // Convert__regRAX__Tie0_1_1__ImmSExti64i81_1 3126 { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3127 // Convert__ImmSExti64i321_1 3128 { CVT_95_addImmOperands, 2, CVT_Done }, 3129 // Convert__Reg1_0__Tie0_1_1__Reg1_1 3130 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done }, 3131 // Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1 3132 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3133 // Convert__Reg1_0__Tie0_1_1__Imm1_1 3134 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3135 // Convert__Reg1_0__Tie0_1_1__Mem165_1 3136 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done }, 3137 // Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1 3138 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3139 // Convert__Reg1_0__Tie0_1_1__Mem325_1 3140 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done }, 3141 // Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1 3142 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3143 // Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1 3144 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3145 // Convert__Reg1_0__Tie0_1_1__Mem645_1 3146 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done }, 3147 // Convert__Reg1_0__Tie0_1_1__Mem85_1 3148 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done }, 3149 // Convert__Mem165_0__Reg1_1 3150 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 3151 // Convert__Mem165_0__ImmSExti16i81_1 3152 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3153 // Convert__Mem165_0__Imm1_1 3154 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3155 // Convert__Mem325_0__Reg1_1 3156 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 3157 // Convert__Mem325_0__ImmSExti32i81_1 3158 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3159 // Convert__Mem325_0__Imm1_1 3160 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3161 // Convert__Mem645_0__Reg1_1 3162 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 3163 // Convert__Mem645_0__ImmSExti64i81_1 3164 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3165 // Convert__Mem645_0__ImmSExti64i321_1 3166 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3167 // Convert__Mem85_0__Reg1_1 3168 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 3169 // Convert__Mem85_0__Imm1_1 3170 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3171 // Convert__Reg1_1__Tie0_2_2__Reg1_0 3172 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_Done }, 3173 // Convert__Mem85_1__Reg1_0 3174 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3175 // Convert__Reg1_1__Tie0_2_2__Imm1_0 3176 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done }, 3177 // Convert__Mem85_1__Imm1_0 3178 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3179 // Convert__Reg1_1__Tie0_2_2__Mem85_0 3180 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done }, 3181 // Convert__Mem325_1__Reg1_0 3182 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3183 // Convert__regEAX__Tie0_1_1__ImmSExti32i81_0 3184 { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done }, 3185 // Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0 3186 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done }, 3187 // Convert__Mem325_1__ImmSExti32i81_0 3188 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3189 // Convert__Mem325_1__Imm1_0 3190 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3191 // Convert__Reg1_1__Tie0_2_2__Mem325_0 3192 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done }, 3193 // Convert__Mem645_1__Reg1_0 3194 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3195 // Convert__regRAX__Tie0_1_1__ImmSExti64i81_0 3196 { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done }, 3197 // Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0 3198 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done }, 3199 // Convert__Mem645_1__ImmSExti64i81_0 3200 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3201 // Convert__ImmSExti64i321_0 3202 { CVT_95_addImmOperands, 1, CVT_Done }, 3203 // Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0 3204 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done }, 3205 // Convert__Mem645_1__ImmSExti64i321_0 3206 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3207 // Convert__Reg1_1__Tie0_2_2__Mem645_0 3208 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done }, 3209 // Convert__Mem165_1__Reg1_0 3210 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3211 // Convert__regAX__Tie0_1_1__ImmSExti16i81_0 3212 { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done }, 3213 // Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0 3214 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done }, 3215 // Convert__Mem165_1__ImmSExti16i81_0 3216 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3217 // Convert__Mem165_1__Imm1_0 3218 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3219 // Convert__Reg1_1__Tie0_2_2__Mem165_0 3220 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done }, 3221 // Convert__Reg1_1__Tie0_1_1__Reg1_0 3222 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done }, 3223 // Convert__Reg1_1__Tie0_1_1__Mem325_0 3224 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done }, 3225 // Convert__Reg1_1__Tie0_1_1__Mem645_0 3226 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done }, 3227 // Convert__Reg1_0__Tie0_1_1__Mem1285_1 3228 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done }, 3229 // Convert__Reg1_1__Tie0_1_1__Mem1285_0 3230 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done }, 3231 // Convert__Reg1_1__Reg1_0 3232 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 3233 // Convert__Reg1_0__Reg1_1 3234 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done }, 3235 // Convert__Reg1_0__Mem1285_1 3236 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3237 // Convert__Reg1_1__Mem1285_0 3238 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3239 // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2 3240 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3241 // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2 3242 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3243 // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0 3244 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3245 // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0 3246 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3247 // Convert__Reg1_0__Reg1_1__Reg1_2 3248 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 3249 // Convert__Reg1_0__Reg1_1__Mem325_2 3250 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 3251 // Convert__Reg1_0__Reg1_1__Mem645_2 3252 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 3253 // Convert__Reg1_2__Reg1_1__Reg1_0 3254 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 3255 // Convert__Reg1_2__Reg1_1__Mem325_0 3256 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3257 // Convert__Reg1_2__Reg1_1__Mem645_0 3258 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3259 // Convert__Reg1_0__Reg1_1__Imm1_2 3260 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3261 // Convert__Reg1_0__Mem325_1__Reg1_2 3262 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done }, 3263 // Convert__Reg1_0__Mem325_1__Imm1_2 3264 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3265 // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2 3266 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3267 // Convert__Reg1_0__Mem645_1__Reg1_2 3268 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done }, 3269 // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2 3270 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3271 // Convert__Reg1_2__Mem325_1__Reg1_0 3272 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3273 // Convert__Reg1_2__Reg1_1__Imm1_0 3274 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3275 // Convert__Reg1_2__Mem325_1__Imm1_0 3276 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3277 // Convert__Reg1_2__Mem645_1__Reg1_0 3278 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3279 // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0 3280 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3281 // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0 3282 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3283 // Convert__Reg1_0__Mem325_1 3284 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3285 // Convert__Reg1_0__Mem645_1 3286 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3287 // Convert__Reg1_1__Mem325_0 3288 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3289 // Convert__Reg1_1__Mem645_0 3290 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3291 // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2 3292 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3293 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2 3294 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3295 // Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0 3296 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3297 // Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0 3298 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3299 // Convert__Reg1_1__Tie0_2_2__Mem1285_0 3300 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done }, 3301 // Convert__Reg1_2__Tie0_1_1__Reg1_1 3302 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done }, 3303 // Convert__Reg1_2__Tie0_1_1__Mem1285_1 3304 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done }, 3305 // Convert__Reg1_0__Mem5_1 3306 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3307 // Convert__Reg1_1__Mem5_0 3308 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3309 // Convert__Mem1285_1__Reg1_0 3310 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3311 // Convert__Mem1285_0__Reg1_1 3312 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 3313 // Convert__Mem5_1__Reg1_0 3314 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 3315 // Convert__Mem5_0__Reg1_1 3316 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 3317 // Convert__Reg1_0__Mem165_1 3318 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3319 // Convert__Reg1_1__Mem165_0 3320 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3321 // Convert__Reg1_0__Tie0_1_1 3322 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done }, 3323 // Convert__Reg1_0__ImmUnsignedi81_1 3324 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3325 // Convert__Mem325_1__ImmUnsignedi81_0 3326 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3327 // Convert__Mem165_0__ImmUnsignedi81_1 3328 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3329 // Convert__Mem325_0__ImmUnsignedi81_1 3330 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3331 // Convert__Mem645_0__ImmUnsignedi81_1 3332 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3333 // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1 3334 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 3335 // Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0 3336 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done }, 3337 // Convert__Mem645_1__ImmUnsignedi81_0 3338 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3339 // Convert__Mem165_1__ImmUnsignedi81_0 3340 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3341 // Convert__Reg1_1__ImmUnsignedi81_0 3342 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3343 // Convert__Reg1_0 3344 { CVT_95_Reg, 1, CVT_Done }, 3345 // Convert__AbsMem1_0 3346 { CVT_95_addAbsMemOperands, 1, CVT_Done }, 3347 // Convert__Mem165_0 3348 { CVT_95_addMemOperands, 1, CVT_Done }, 3349 // Convert__Mem325_0 3350 { CVT_95_addMemOperands, 1, CVT_Done }, 3351 // Convert__Mem645_0 3352 { CVT_95_addMemOperands, 1, CVT_Done }, 3353 // Convert__Mem5_0 3354 { CVT_95_addMemOperands, 1, CVT_Done }, 3355 // Convert__Imm1_1__Imm1_0 3356 { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3357 // Convert__Reg1_1 3358 { CVT_95_Reg, 2, CVT_Done }, 3359 // Convert__Mem325_1 3360 { CVT_95_addMemOperands, 2, CVT_Done }, 3361 // Convert__Mem645_1 3362 { CVT_95_addMemOperands, 2, CVT_Done }, 3363 // Convert__Mem165_1 3364 { CVT_95_addMemOperands, 2, CVT_Done }, 3365 // Convert__Mem85_0 3366 { CVT_95_addMemOperands, 1, CVT_Done }, 3367 // Convert__Reg1_0__Tie0_1_1__Reg1_0 3368 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done }, 3369 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7 3370 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_7, 0, CVT_Done }, 3371 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_7 3372 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_7, 0, CVT_Done }, 3373 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_7 3374 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_7, 0, CVT_Done }, 3375 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_7 3376 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_7, 0, CVT_Done }, 3377 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3 3378 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_3, 0, CVT_Done }, 3379 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_3 3380 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_3, 0, CVT_Done }, 3381 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_3 3382 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_3, 0, CVT_Done }, 3383 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_3 3384 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_3, 0, CVT_Done }, 3385 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3 3386 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done }, 3387 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_3 3388 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done }, 3389 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_3 3390 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done }, 3391 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_3 3392 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done }, 3393 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7 3394 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done }, 3395 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_7 3396 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done }, 3397 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_7 3398 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done }, 3399 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_7 3400 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done }, 3401 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2 3402 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_2, 0, CVT_Done }, 3403 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_2 3404 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_2, 0, CVT_Done }, 3405 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_2 3406 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_2, 0, CVT_Done }, 3407 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_2 3408 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_2, 0, CVT_Done }, 3409 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6 3410 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_6, 0, CVT_Done }, 3411 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_6 3412 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_6, 0, CVT_Done }, 3413 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_6 3414 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_6, 0, CVT_Done }, 3415 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_6 3416 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_6, 0, CVT_Done }, 3417 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6 3418 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done }, 3419 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_6 3420 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done }, 3421 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_6 3422 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done }, 3423 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_6 3424 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done }, 3425 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2 3426 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done }, 3427 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_2 3428 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done }, 3429 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_2 3430 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done }, 3431 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_2 3432 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done }, 3433 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4 3434 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_4, 0, CVT_Done }, 3435 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_4 3436 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_4, 0, CVT_Done }, 3437 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_4 3438 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_4, 0, CVT_Done }, 3439 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_4 3440 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_4, 0, CVT_Done }, 3441 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4 3442 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done }, 3443 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_4 3444 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done }, 3445 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_4 3446 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done }, 3447 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_4 3448 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done }, 3449 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15 3450 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_15, 0, CVT_Done }, 3451 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_15 3452 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_15, 0, CVT_Done }, 3453 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_15 3454 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_15, 0, CVT_Done }, 3455 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_15 3456 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_15, 0, CVT_Done }, 3457 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13 3458 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_13, 0, CVT_Done }, 3459 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_13 3460 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_13, 0, CVT_Done }, 3461 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_13 3462 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_13, 0, CVT_Done }, 3463 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_13 3464 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_13, 0, CVT_Done }, 3465 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13 3466 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done }, 3467 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_13 3468 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done }, 3469 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_13 3470 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done }, 3471 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_13 3472 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done }, 3473 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15 3474 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done }, 3475 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_15 3476 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done }, 3477 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_15 3478 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done }, 3479 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_15 3480 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done }, 3481 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12 3482 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_12, 0, CVT_Done }, 3483 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_12 3484 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_12, 0, CVT_Done }, 3485 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_12 3486 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_12, 0, CVT_Done }, 3487 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_12 3488 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_12, 0, CVT_Done }, 3489 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14 3490 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_14, 0, CVT_Done }, 3491 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_14 3492 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_14, 0, CVT_Done }, 3493 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_14 3494 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_14, 0, CVT_Done }, 3495 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_14 3496 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_14, 0, CVT_Done }, 3497 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14 3498 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done }, 3499 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_14 3500 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done }, 3501 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_14 3502 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done }, 3503 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_14 3504 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done }, 3505 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12 3506 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done }, 3507 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_12 3508 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done }, 3509 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_12 3510 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done }, 3511 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_12 3512 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done }, 3513 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5 3514 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_5, 0, CVT_Done }, 3515 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_5 3516 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_5, 0, CVT_Done }, 3517 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_5 3518 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_5, 0, CVT_Done }, 3519 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_5 3520 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_5, 0, CVT_Done }, 3521 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5 3522 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done }, 3523 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_5 3524 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done }, 3525 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_5 3526 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done }, 3527 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_5 3528 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done }, 3529 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1 3530 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done }, 3531 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_1 3532 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done }, 3533 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_1 3534 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done }, 3535 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_1 3536 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done }, 3537 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1 3538 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done }, 3539 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_1 3540 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 3541 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_1 3542 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 3543 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_1 3544 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 3545 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11 3546 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_11, 0, CVT_Done }, 3547 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_11 3548 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_11, 0, CVT_Done }, 3549 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_11 3550 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_11, 0, CVT_Done }, 3551 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_11 3552 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_11, 0, CVT_Done }, 3553 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11 3554 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done }, 3555 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_11 3556 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done }, 3557 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_11 3558 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done }, 3559 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_11 3560 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done }, 3561 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9 3562 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_9, 0, CVT_Done }, 3563 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_9 3564 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_9, 0, CVT_Done }, 3565 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_9 3566 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_9, 0, CVT_Done }, 3567 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_9 3568 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_9, 0, CVT_Done }, 3569 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9 3570 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done }, 3571 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_9 3572 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done }, 3573 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_9 3574 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done }, 3575 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_9 3576 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done }, 3577 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0 3578 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, 3579 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_0 3580 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done }, 3581 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_0 3582 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done }, 3583 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_0 3584 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done }, 3585 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0 3586 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done }, 3587 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_0 3588 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 3589 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_0 3590 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 3591 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_0 3592 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 3593 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10 3594 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_10, 0, CVT_Done }, 3595 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_10 3596 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_10, 0, CVT_Done }, 3597 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_10 3598 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_10, 0, CVT_Done }, 3599 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_10 3600 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_10, 0, CVT_Done }, 3601 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10 3602 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done }, 3603 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_10 3604 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done }, 3605 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_10 3606 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done }, 3607 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_10 3608 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done }, 3609 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8 3610 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_8, 0, CVT_Done }, 3611 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_8 3612 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_8, 0, CVT_Done }, 3613 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_8 3614 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_8, 0, CVT_Done }, 3615 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_8 3616 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_8, 0, CVT_Done }, 3617 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8 3618 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done }, 3619 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_8 3620 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done }, 3621 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_8 3622 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done }, 3623 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_8 3624 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done }, 3625 // Convert__regAX__ImmSExti16i81_1 3626 { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done }, 3627 // Convert__regEAX__ImmSExti32i81_1 3628 { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done }, 3629 // Convert__regRAX__ImmSExti64i81_1 3630 { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done }, 3631 // Convert__Reg1_0__ImmSExti16i81_1 3632 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3633 // Convert__Reg1_0__Imm1_1 3634 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3635 // Convert__Reg1_0__ImmSExti32i81_1 3636 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3637 // Convert__Reg1_0__ImmSExti64i81_1 3638 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3639 // Convert__Reg1_0__ImmSExti64i321_1 3640 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3641 // Convert__Reg1_0__Mem85_1 3642 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3643 // Convert__Reg1_1__Imm1_0 3644 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3645 // Convert__Reg1_1__Mem85_0 3646 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3647 // Convert__regEAX__ImmSExti32i81_0 3648 { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done }, 3649 // Convert__Reg1_1__ImmSExti32i81_0 3650 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3651 // Convert__regRAX__ImmSExti64i81_0 3652 { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done }, 3653 // Convert__Reg1_1__ImmSExti64i81_0 3654 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3655 // Convert__Reg1_1__ImmSExti64i321_0 3656 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3657 // Convert__DstIdx161_1__SrcIdx162_0 3658 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3659 // Convert__DstIdx321_1__SrcIdx322_0 3660 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3661 // Convert__DstIdx641_1__SrcIdx642_0 3662 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3663 // Convert__DstIdx81_1__SrcIdx82_0 3664 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3665 // Convert__DstIdx81_0__SrcIdx82_1 3666 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3667 // Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2 3668 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3669 // Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0 3670 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3671 // Convert__DstIdx321_0__SrcIdx322_1 3672 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3673 // Convert__DstIdx641_0__SrcIdx642_1 3674 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3675 // Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2 3676 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3677 // Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0 3678 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3679 // Convert__DstIdx161_0__SrcIdx162_1 3680 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3681 // Convert__regAX__ImmSExti16i81_0 3682 { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done }, 3683 // Convert__Reg1_1__ImmSExti16i81_0 3684 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3685 // Convert__Mem1285_0 3686 { CVT_95_addMemOperands, 1, CVT_Done }, 3687 // Convert__Mem85_1 3688 { CVT_95_addMemOperands, 2, CVT_Done }, 3689 // Convert__Reg1_0__Mem5125_1 3690 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 3691 // Convert__Reg1_1__Mem5125_0 3692 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 3693 // Convert__Imm1_0__Imm1_1 3694 { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3695 // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0 3696 { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3697 // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0 3698 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3699 // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2 3700 { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3701 // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2 3702 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3703 // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2 3704 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3705 // Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0 3706 { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3707 // Convert__regST1 3708 { CVT_regST1, 0, CVT_Done }, 3709 // Convert__regST0 3710 { CVT_regST0, 0, CVT_Done }, 3711 // Convert__Mem805_0 3712 { CVT_95_addMemOperands, 1, CVT_Done }, 3713 // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1 3714 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3715 // Convert__Reg1_0__Reg1_0__Imm1_1 3716 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3717 // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1 3718 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3719 // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1 3720 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3721 // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1 3722 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3723 // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2 3724 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3725 // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2 3726 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3727 // Convert__Reg1_0__Mem165_1__Imm1_2 3728 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3729 // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2 3730 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3731 // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2 3732 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3733 // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2 3734 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3735 // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2 3736 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3737 // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0 3738 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3739 // Convert__Reg1_1__Reg1_1__Imm1_0 3740 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3741 // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0 3742 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3743 // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0 3744 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3745 // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0 3746 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3747 // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0 3748 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3749 // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0 3750 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3751 // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0 3752 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3753 // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0 3754 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3755 // Convert__Reg1_1__Tie0_1_1__Mem165_0 3756 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done }, 3757 // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0 3758 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3759 // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0 3760 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3761 // Convert__Reg1_2__Mem165_1__Imm1_0 3762 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3763 // Convert__ImmUnsignedi81_1 3764 { CVT_95_addImmOperands, 2, CVT_Done }, 3765 // Convert__ImmUnsignedi81_0 3766 { CVT_95_addImmOperands, 1, CVT_Done }, 3767 // Convert__DstIdx161_0 3768 { CVT_95_addDstIdxOperands, 1, CVT_Done }, 3769 // Convert__DstIdx321_0 3770 { CVT_95_addDstIdxOperands, 1, CVT_Done }, 3771 // Convert__DstIdx81_0 3772 { CVT_95_addDstIdxOperands, 1, CVT_Done }, 3773 // Convert__DstIdx81_1 3774 { CVT_95_addDstIdxOperands, 2, CVT_Done }, 3775 // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3 3776 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 3777 // Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0 3778 { CVT_95_Reg, 4, CVT_Tied, Tie0_4_4, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3779 // Convert__DstIdx321_1 3780 { CVT_95_addDstIdxOperands, 2, CVT_Done }, 3781 // Convert__DstIdx161_1 3782 { CVT_95_addDstIdxOperands, 2, CVT_Done }, 3783 // Convert__AbsMem1_0__imm_95_7 3784 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_7, 0, CVT_Done }, 3785 // Convert__AbsMem1_0__imm_95_3 3786 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_3, 0, CVT_Done }, 3787 // Convert__AbsMem1_0__imm_95_2 3788 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_2, 0, CVT_Done }, 3789 // Convert__AbsMem1_0__imm_95_6 3790 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_6, 0, CVT_Done }, 3791 // Convert__AbsMem1_0__imm_95_4 3792 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_4, 0, CVT_Done }, 3793 // Convert__AbsMem1_0__imm_95_15 3794 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_15, 0, CVT_Done }, 3795 // Convert__AbsMem1_0__imm_95_13 3796 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_13, 0, CVT_Done }, 3797 // Convert__AbsMem1_0__imm_95_12 3798 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_12, 0, CVT_Done }, 3799 // Convert__AbsMem1_0__imm_95_14 3800 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_14, 0, CVT_Done }, 3801 // Convert__AbsMem1_0__imm_95_5 3802 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_5, 0, CVT_Done }, 3803 // Convert__AbsMem1_0__imm_95_1 3804 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 3805 // Convert__AbsMem1_0__imm_95_11 3806 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_11, 0, CVT_Done }, 3807 // Convert__AbsMem1_0__imm_95_9 3808 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_9, 0, CVT_Done }, 3809 // Convert__AbsMem1_0__imm_95_0 3810 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 3811 // Convert__AbsMem1_0__imm_95_10 3812 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_10, 0, CVT_Done }, 3813 // Convert__AbsMem1_0__imm_95_8 3814 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_8, 0, CVT_Done }, 3815 // Convert__Mem5_1 3816 { CVT_95_addMemOperands, 2, CVT_Done }, 3817 // Convert__SrcIdx162_0 3818 { CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3819 // Convert__SrcIdx322_0 3820 { CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3821 // Convert__SrcIdx642_0 3822 { CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3823 // Convert__SrcIdx82_0 3824 { CVT_95_addSrcIdxOperands, 1, CVT_Done }, 3825 // Convert__SrcIdx82_1 3826 { CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3827 // Convert__SrcIdx162_1 3828 { CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3829 // Convert__SrcIdx322_1 3830 { CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3831 // Convert__SrcIdx642_1 3832 { CVT_95_addSrcIdxOperands, 2, CVT_Done }, 3833 // Convert__MemOffs16_82_1 3834 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3835 // Convert__MemOffs32_82_1 3836 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3837 // Convert__MemOffs16_162_1 3838 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3839 // Convert__MemOffs32_162_1 3840 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3841 // Convert__MemOffs16_322_1 3842 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3843 // Convert__MemOffs32_322_1 3844 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3845 // Convert__MemOffs32_642_1 3846 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3847 // Convert__MemOffs16_162_0 3848 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3849 // Convert__MemOffs16_322_0 3850 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3851 // Convert__MemOffs16_82_0 3852 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3853 // Convert__MemOffs32_162_0 3854 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3855 // Convert__MemOffs32_322_0 3856 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3857 // Convert__MemOffs32_642_0 3858 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3859 // Convert__MemOffs32_82_0 3860 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3861 // Convert__MemOffs64_82_1 3862 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3863 // Convert__MemOffs64_162_1 3864 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3865 // Convert__MemOffs64_322_1 3866 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3867 // Convert__MemOffs64_642_1 3868 { CVT_95_addMemOffsOperands, 2, CVT_Done }, 3869 // Convert__MemOffs64_162_0 3870 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3871 // Convert__MemOffs64_322_0 3872 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3873 // Convert__MemOffs64_642_0 3874 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3875 // Convert__MemOffs64_82_0 3876 { CVT_95_addMemOffsOperands, 1, CVT_Done }, 3877 // Convert__GR32orGR641_1__Reg1_0 3878 { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done }, 3879 // Convert__GR32orGR641_0__Reg1_1 3880 { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done }, 3881 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17 3882 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done }, 3883 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17 3884 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done }, 3885 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17 3886 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done }, 3887 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17 3888 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done }, 3889 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1 3890 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done }, 3891 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1 3892 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 3893 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16 3894 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done }, 3895 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16 3896 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done }, 3897 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16 3898 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done }, 3899 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16 3900 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done }, 3901 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0 3902 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done }, 3903 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0 3904 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 3905 // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0 3906 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3907 // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2 3908 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3909 // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0 3910 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3911 // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2 3912 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3913 // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0 3914 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3915 // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2 3916 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3917 // Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2 3918 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3919 // Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2 3920 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3921 // Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0 3922 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3923 // Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0 3924 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3925 // Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2 3926 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3927 // Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0 3928 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3929 // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2 3930 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3931 // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0 3932 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3933 // Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0 3934 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done }, 3935 // Convert__ImmSExti64i81_0 3936 { CVT_95_addImmOperands, 1, CVT_Done }, 3937 // Convert__ImmSExti16i81_0 3938 { CVT_95_addImmOperands, 1, CVT_Done }, 3939 // Convert__ImmSExti32i81_0 3940 { CVT_95_addImmOperands, 1, CVT_Done }, 3941 // Convert__Mem85_0__ImmUnsignedi81_1 3942 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, 3943 // Convert__Reg1_1__Tie0_1_1 3944 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Done }, 3945 // Convert__Mem85_1__ImmUnsignedi81_0 3946 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3947 // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2 3948 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 3949 // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0 3950 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 3951 // Convert__DstIdx641_0 3952 { CVT_95_addDstIdxOperands, 1, CVT_Done }, 3953 // Convert__DstIdx641_1 3954 { CVT_95_addDstIdxOperands, 2, CVT_Done }, 3955 // Convert__Reg1_0__imm_95_7 3956 { CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done }, 3957 // Convert__Mem85_0__imm_95_7 3958 { CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done }, 3959 // Convert__Reg1_0__imm_95_3 3960 { CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done }, 3961 // Convert__Mem85_0__imm_95_3 3962 { CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done }, 3963 // Convert__Reg1_0__imm_95_2 3964 { CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done }, 3965 // Convert__Mem85_0__imm_95_2 3966 { CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done }, 3967 // Convert__Reg1_0__imm_95_6 3968 { CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done }, 3969 // Convert__Mem85_0__imm_95_6 3970 { CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done }, 3971 // Convert__Reg1_0__imm_95_4 3972 { CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done }, 3973 // Convert__Mem85_0__imm_95_4 3974 { CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done }, 3975 // Convert__Reg1_0__imm_95_15 3976 { CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done }, 3977 // Convert__Mem85_0__imm_95_15 3978 { CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done }, 3979 // Convert__Reg1_0__imm_95_13 3980 { CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done }, 3981 // Convert__Mem85_0__imm_95_13 3982 { CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done }, 3983 // Convert__Reg1_0__imm_95_12 3984 { CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done }, 3985 // Convert__Mem85_0__imm_95_12 3986 { CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done }, 3987 // Convert__Reg1_0__imm_95_14 3988 { CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done }, 3989 // Convert__Mem85_0__imm_95_14 3990 { CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done }, 3991 // Convert__Reg1_0__imm_95_5 3992 { CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done }, 3993 // Convert__Mem85_0__imm_95_5 3994 { CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done }, 3995 // Convert__Reg1_0__imm_95_1 3996 { CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done }, 3997 // Convert__Mem85_0__imm_95_1 3998 { CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 3999 // Convert__Reg1_0__imm_95_11 4000 { CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done }, 4001 // Convert__Mem85_0__imm_95_11 4002 { CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done }, 4003 // Convert__Reg1_0__imm_95_9 4004 { CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done }, 4005 // Convert__Mem85_0__imm_95_9 4006 { CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done }, 4007 // Convert__Reg1_0__imm_95_0 4008 { CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done }, 4009 // Convert__Mem85_0__imm_95_0 4010 { CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 4011 // Convert__Reg1_0__imm_95_10 4012 { CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done }, 4013 // Convert__Mem85_0__imm_95_10 4014 { CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done }, 4015 // Convert__Reg1_0__imm_95_8 4016 { CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done }, 4017 // Convert__Mem85_0__imm_95_8 4018 { CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done }, 4019 // Convert__Mem325_2__Reg1_1 4020 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done }, 4021 // Convert__Mem645_2__Reg1_1 4022 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done }, 4023 // Convert__Mem165_2__Reg1_1 4024 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done }, 4025 // Convert__GR32orGR641_0 4026 { CVT_95_addGR32orGR64Operands, 1, CVT_Done }, 4027 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2 4028 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4029 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0 4030 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4031 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5 4032 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4033 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0 4034 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4035 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6 4036 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4037 // Convert__Reg1_0__Reg1_1__Mem1285_2 4038 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4039 // Convert__Reg1_0__Reg1_1__Mem2565_2 4040 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4041 // Convert__Reg1_0__Reg1_1__Mem5125_2 4042 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4043 // Convert__Reg1_2__Reg1_1__Mem1285_0 4044 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4045 // Convert__Reg1_2__Reg1_1__Mem2565_0 4046 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4047 // Convert__Reg1_2__Reg1_1__Mem5125_0 4048 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4049 // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3 4050 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done }, 4051 // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0 4052 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4053 // Convert__Reg1_3__Reg1_2__Mem645_0 4054 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4055 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5 4056 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, 4057 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0 4058 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4059 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5 4060 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4061 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5 4062 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4063 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0 4064 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4065 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0 4066 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4067 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6 4068 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, 4069 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6 4070 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4071 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5 4072 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4073 // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0 4074 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4075 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6 4076 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4077 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6 4078 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4079 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6 4080 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done }, 4081 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0 4082 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4083 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0 4084 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4085 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0 4086 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4087 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0 4088 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4089 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0 4090 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4091 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6 4092 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4093 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7 4094 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done }, 4095 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0 4096 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4097 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0 4098 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4099 // Convert__Reg1_3__Reg1_2__Mem325_0 4100 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4101 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5 4102 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4103 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0 4104 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4105 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6 4106 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4107 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0 4108 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4109 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0 4110 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4111 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0 4112 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4113 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0 4114 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4115 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0 4116 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4117 // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3 4118 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4119 // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3 4120 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4121 // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3 4122 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4123 // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3 4124 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4125 // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0 4126 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4127 // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0 4128 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4129 // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0 4130 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4131 // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0 4132 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4133 // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4 4134 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4135 // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0 4136 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4137 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6 4138 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4139 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6 4140 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4141 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6 4142 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4143 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6 4144 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4145 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0 4146 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4147 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0 4148 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4149 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0 4150 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4151 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0 4152 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4153 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7 4154 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4155 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7 4156 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4157 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7 4158 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4159 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7 4160 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4161 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7 4162 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4163 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0 4164 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4165 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0 4166 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4167 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0 4168 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4169 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0 4170 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4171 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0 4172 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4173 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8 4174 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4175 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0 4176 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4177 // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4 4178 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4179 // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0 4180 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4181 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7 4182 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4183 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0 4184 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4185 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8 4186 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4187 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0 4188 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4189 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5 4190 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, 4191 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5 4192 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4193 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5 4194 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4195 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5 4196 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4197 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5 4198 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4199 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5 4200 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done }, 4201 // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0 4202 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4203 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3 4204 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, 4205 // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3 4206 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done }, 4207 // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0 4208 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4209 // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3 4210 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done }, 4211 // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0 4212 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4213 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0 4214 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4215 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4 4216 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4217 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4 4218 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4219 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0 4220 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4221 // Convert__Reg1_1__Reg1_3__Reg1_0 4222 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4223 // Convert__Reg1_0__Reg1_2__Reg1_5 4224 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done }, 4225 // Convert__Reg1_0__Reg1_2__Mem645_5 4226 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4227 // Convert__Reg1_1__Reg1_3__Mem645_0 4228 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4229 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4 4230 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4231 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0 4232 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4233 // Convert__Reg1_0__Reg1_2__Mem1285_5 4234 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4235 // Convert__Reg1_1__Reg1_3__Mem1285_0 4236 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4237 // Convert__Reg1_0__Mem2565_1 4238 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done }, 4239 // Convert__Reg1_1__Mem2565_0 4240 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4241 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4 4242 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4243 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0 4244 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4245 // Convert__Reg1_0__Reg1_2__Mem2565_5 4246 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4247 // Convert__Reg1_1__Reg1_3__Mem2565_0 4248 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4249 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4 4250 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4251 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0 4252 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4253 // Convert__Reg1_0__Reg1_2__Mem325_5 4254 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4255 // Convert__Reg1_1__Reg1_3__Mem325_0 4256 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4257 // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4 4258 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4259 // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0 4260 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4261 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6 4262 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4263 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6 4264 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4265 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6 4266 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4267 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6 4268 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4269 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7 4270 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4271 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7 4272 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4273 // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0 4274 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4275 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7 4276 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4277 // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3 4278 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4279 // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0 4280 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4281 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6 4282 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4283 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0 4284 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4285 // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3 4286 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4287 // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0 4288 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4289 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6 4290 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4291 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0 4292 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4293 // Convert__Reg1_2__Reg1_1 4294 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done }, 4295 // Convert__Mem2565_1__Reg1_0 4296 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4297 // Convert__Mem5125_1__Reg1_0 4298 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4299 // Convert__Mem2565_0__Reg1_1 4300 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 4301 // Convert__Mem5125_0__Reg1_1 4302 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done }, 4303 // Convert__Mem1285_1__Reg1_3__Reg1_0 4304 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4305 // Convert__Mem2565_1__Reg1_3__Reg1_0 4306 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4307 // Convert__Mem5125_1__Reg1_3__Reg1_0 4308 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4309 // Convert__Mem1285_0__Reg1_2__Reg1_4 4310 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4311 // Convert__Mem2565_0__Reg1_2__Reg1_4 4312 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4313 // Convert__Mem5125_0__Reg1_2__Reg1_4 4314 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4315 // Convert__Reg1_2__Mem325_0 4316 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4317 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0 4318 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done }, 4319 // Convert__Reg1_2__Reg1_4__Mem325_0 4320 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done }, 4321 // Convert__Reg1_0__Reg1_1__AVX512RC1_2 4322 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done }, 4323 // Convert__Reg1_2__Reg1_1__AVX512RC1_0 4324 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4325 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4 4326 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4327 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0 4328 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4329 // Convert__Reg1_0__Reg1_2__Mem5125_5 4330 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4331 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5 4332 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done }, 4333 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0 4334 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4335 // Convert__Reg1_1__Reg1_3__Mem5125_0 4336 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4337 // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6 4338 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done }, 4339 // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0 4340 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4341 // Convert__Reg1_2__Mem645_0 4342 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4343 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0 4344 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done }, 4345 // Convert__Reg1_2__Reg1_4__Mem645_0 4346 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done }, 4347 // Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0 4348 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4349 // Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0 4350 { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done }, 4351 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1 4352 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done }, 4353 // Convert__Reg1_2__Reg1_4__Reg1_1 4354 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done }, 4355 // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0 4356 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4357 // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0 4358 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4359 // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2 4360 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 4361 // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2 4362 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 4363 // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3 4364 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done }, 4365 // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0 4366 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4367 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5 4368 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4369 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0 4370 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4371 // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0 4372 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4373 // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0 4374 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4375 // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0 4376 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4377 // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5 4378 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4379 // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5 4380 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4381 // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5 4382 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4383 // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6 4384 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4385 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6 4386 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, 4387 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0 4388 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4389 // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0 4390 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4391 // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7 4392 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4393 // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0 4394 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4395 // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1 4396 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done }, 4397 // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2 4398 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done }, 4399 // Convert__Reg1_3__Reg1_2__Reg1_1 4400 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done }, 4401 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1 4402 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done }, 4403 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1 4404 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done }, 4405 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0 4406 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4407 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2 4408 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4409 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2 4410 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4411 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2 4412 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4413 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0 4414 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4415 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0 4416 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4417 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2 4418 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4419 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0 4420 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4421 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6 4422 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, 4423 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6 4424 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4425 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6 4426 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4427 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6 4428 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4429 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3 4430 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4431 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3 4432 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4433 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3 4434 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4435 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3 4436 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4437 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0 4438 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4439 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0 4440 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4441 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0 4442 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4443 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0 4444 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4445 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4 4446 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4447 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4 4448 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4449 // Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0 4450 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4451 // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0 4452 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4453 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7 4454 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4455 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7 4456 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4457 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7 4458 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4459 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7 4460 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4461 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7 4462 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4463 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0 4464 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done }, 4465 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8 4466 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4467 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8 4468 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4469 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4 4470 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4471 // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0 4472 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4473 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8 4474 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4475 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3 4476 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4477 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0 4478 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4479 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6 4480 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4481 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0 4482 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4483 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7 4484 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4485 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3 4486 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4487 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0 4488 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4489 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6 4490 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4491 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0 4492 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4493 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7 4494 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4495 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2 4496 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4497 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3 4498 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done }, 4499 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0 4500 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done }, 4501 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0 4502 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4503 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6 4504 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done }, 4505 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7 4506 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done }, 4507 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0 4508 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4509 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0 4510 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4511 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3 4512 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done }, 4513 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3 4514 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done }, 4515 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0 4516 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4517 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0 4518 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4519 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3 4520 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done }, 4521 // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3 4522 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done }, 4523 // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0 4524 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4525 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0 4526 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4527 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3 4528 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done }, 4529 // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3 4530 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done }, 4531 // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0 4532 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4533 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0 4534 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4535 // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2 4536 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 4537 // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2 4538 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, 4539 // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3 4540 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done }, 4541 // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0 4542 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4543 // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5 4544 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4545 // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5 4546 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4547 // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5 4548 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4549 // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5 4550 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4551 // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6 4552 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, 4553 // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0 4554 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4555 // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0 4556 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4557 // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0 4558 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4559 // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0 4560 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4561 // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0 4562 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4563 // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0 4564 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4565 // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3 4566 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done }, 4567 // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0 4568 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4569 // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6 4570 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, 4571 // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0 4572 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4573 // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5 4574 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4575 // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0 4576 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4577 // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5 4578 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4579 // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0 4580 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4581 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1 4582 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done }, 4583 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3 4584 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done }, 4585 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1 4586 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done }, 4587 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3 4588 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done }, 4589 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4 4590 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4591 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4 4592 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4593 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4 4594 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4595 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0 4596 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4597 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0 4598 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4599 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0 4600 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4601 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1 4602 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done }, 4603 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3 4604 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done }, 4605 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4 4606 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4607 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4 4608 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4609 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0 4610 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4611 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0 4612 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4613 // Convert__Reg1_1__Mem512_RC256X5_3 4614 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done }, 4615 // Convert__Reg1_2__Mem512_RC256X5_0 4616 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4617 // Convert__Reg1_1__Mem512_RC5125_3 4618 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done }, 4619 // Convert__Reg1_2__Mem512_RC5125_0 4620 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4621 // Convert__Reg1_1__Mem256_RC5125_3 4622 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done }, 4623 // Convert__Reg1_2__Mem256_RC5125_0 4624 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4625 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1 4626 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done }, 4627 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3 4628 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done }, 4629 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1 4630 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done }, 4631 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3 4632 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done }, 4633 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4 4634 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4635 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4 4636 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4637 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4 4638 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done }, 4639 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0 4640 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4641 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0 4642 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4643 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0 4644 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done }, 4645 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5 4646 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4647 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5 4648 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4649 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5 4650 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, 4651 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0 4652 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4653 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0 4654 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4655 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0 4656 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4657 // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6 4658 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4659 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6 4660 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, 4661 // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6 4662 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4663 // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6 4664 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done }, 4665 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0 4666 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4667 // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7 4668 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4669 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6 4670 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, 4671 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0 4672 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4673 // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7 4674 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4675 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7 4676 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4677 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8 4678 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4679 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7 4680 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done }, 4681 // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4 4682 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done }, 4683 // Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0 4684 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4685 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7 4686 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, 4687 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0 4688 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4689 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8 4690 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done }, 4691 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0 4692 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4693 // Convert__Mem1285_2__Reg1_1__Reg1_0 4694 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4695 // Convert__Mem2565_2__Reg1_1__Reg1_0 4696 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4697 // Convert__Mem1285_0__Reg1_1__Reg1_2 4698 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4699 // Convert__Mem2565_0__Reg1_1__Reg1_2 4700 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4701 // Convert__Reg1_0__Reg1_2__Reg1_4 4702 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4703 // Convert__Mem645_1__Reg1_3__Reg1_0 4704 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4705 // Convert__Mem645_0__Reg1_2__Reg1_4 4706 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4707 // Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0 4708 { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4709 // Convert__Mem325_1__Reg1_3__Reg1_0 4710 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4711 // Convert__Mem325_0__Reg1_2__Reg1_4 4712 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4713 // Convert__VK4Pair1_2__Reg1_1__Reg1_0 4714 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4715 // Convert__VK8Pair1_2__Reg1_1__Reg1_0 4716 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4717 // Convert__VK16Pair1_2__Reg1_1__Reg1_0 4718 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4719 // Convert__VK16Pair1_0__Reg1_1__Reg1_2 4720 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4721 // Convert__VK16Pair1_0__Reg1_1__Mem5125_2 4722 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4723 // Convert__VK4Pair1_0__Reg1_1__Reg1_2 4724 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4725 // Convert__VK4Pair1_0__Reg1_1__Mem1285_2 4726 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4727 // Convert__VK8Pair1_0__Reg1_1__Reg1_2 4728 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4729 // Convert__VK8Pair1_0__Reg1_1__Mem2565_2 4730 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4731 // Convert__VK4Pair1_2__Reg1_1__Mem1285_0 4732 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4733 // Convert__VK8Pair1_2__Reg1_1__Mem2565_0 4734 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4735 // Convert__VK16Pair1_2__Reg1_1__Mem5125_0 4736 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4737 // Convert__VK16Pair1_0__Reg1_1__Mem325_2 4738 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4739 // Convert__VK4Pair1_0__Reg1_1__Mem325_2 4740 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4741 // Convert__VK8Pair1_0__Reg1_1__Mem325_2 4742 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4743 // Convert__VK16Pair1_3__Reg1_2__Mem325_0 4744 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4745 // Convert__VK4Pair1_3__Reg1_2__Mem325_0 4746 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4747 // Convert__VK8Pair1_3__Reg1_2__Mem325_0 4748 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4749 // Convert__VK2Pair1_2__Reg1_1__Reg1_0 4750 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done }, 4751 // Convert__VK2Pair1_0__Reg1_1__Reg1_2 4752 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 4753 // Convert__VK2Pair1_0__Reg1_1__Mem1285_2 4754 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4755 // Convert__VK4Pair1_0__Reg1_1__Mem2565_2 4756 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4757 // Convert__VK8Pair1_0__Reg1_1__Mem5125_2 4758 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4759 // Convert__VK2Pair1_2__Reg1_1__Mem1285_0 4760 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4761 // Convert__VK4Pair1_2__Reg1_1__Mem2565_0 4762 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4763 // Convert__VK8Pair1_2__Reg1_1__Mem5125_0 4764 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done }, 4765 // Convert__VK2Pair1_0__Reg1_1__Mem645_2 4766 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4767 // Convert__VK4Pair1_0__Reg1_1__Mem645_2 4768 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4769 // Convert__VK8Pair1_0__Reg1_1__Mem645_2 4770 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done }, 4771 // Convert__VK2Pair1_3__Reg1_2__Mem645_0 4772 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4773 // Convert__VK4Pair1_3__Reg1_2__Mem645_0 4774 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4775 // Convert__VK8Pair1_3__Reg1_2__Mem645_0 4776 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done }, 4777 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4 4778 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4779 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0 4780 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4781 // Convert__Reg1_0__Reg1_2__Mem85_5 4782 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4783 // Convert__Reg1_1__Reg1_3__Mem85_0 4784 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4785 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4 4786 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done }, 4787 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0 4788 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4789 // Convert__Reg1_0__Reg1_2__Mem165_5 4790 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done }, 4791 // Convert__Reg1_1__Reg1_3__Mem165_0 4792 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done }, 4793 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17 4794 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done }, 4795 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17 4796 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done }, 4797 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17 4798 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done }, 4799 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17 4800 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done }, 4801 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17 4802 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done }, 4803 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17 4804 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done }, 4805 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17 4806 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done }, 4807 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17 4808 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done }, 4809 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1 4810 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done }, 4811 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1 4812 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done }, 4813 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1 4814 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done }, 4815 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1 4816 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done }, 4817 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1 4818 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done }, 4819 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1 4820 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 4821 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1 4822 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 4823 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1 4824 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done }, 4825 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16 4826 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done }, 4827 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16 4828 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done }, 4829 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16 4830 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done }, 4831 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16 4832 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done }, 4833 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16 4834 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done }, 4835 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16 4836 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done }, 4837 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16 4838 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done }, 4839 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16 4840 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done }, 4841 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0 4842 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done }, 4843 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0 4844 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done }, 4845 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0 4846 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done }, 4847 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0 4848 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done }, 4849 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0 4850 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done }, 4851 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0 4852 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 4853 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0 4854 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 4855 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0 4856 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done }, 4857 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4 4858 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done }, 4859 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4 4860 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, 4861 // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4 4862 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done }, 4863 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4 4864 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, 4865 // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4 4866 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done }, 4867 // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0 4868 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4869 // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0 4870 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4871 // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0 4872 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4873 // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0 4874 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4875 // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0 4876 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4877 // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3 4878 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4879 // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3 4880 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4881 // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0 4882 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4883 // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0 4884 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4885 // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3 4886 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 4887 // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0 4888 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done }, 4889 // Convert__Mem165_1__Reg1_3__Reg1_0 4890 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done }, 4891 // Convert__Mem165_0__Reg1_2__Reg1_4 4892 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done }, 4893 // Convert__Reg1_2__Mem1285_1__Reg1_0 4894 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done }, 4895 // Convert__Reg1_0__Mem1285_1__Reg1_2 4896 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done }, 4897 // Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0 4898 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4899 // Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0 4900 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4901 // Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0 4902 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4903 // Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4 4904 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4905 // Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4 4906 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4907 // Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4 4908 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4909 // Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0 4910 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4911 // Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0 4912 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4913 // Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4 4914 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4915 // Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4 4916 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4917 // Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0 4918 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4919 // Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0 4920 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4921 // Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0 4922 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done }, 4923 // Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4 4924 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4925 // Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4 4926 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4927 // Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4 4928 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done }, 4929 // Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2 4930 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_2_2, CVT_Done }, 4931 // Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1 4932 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_1_1, CVT_Done }, 4933 // Convert__AbsMem161_0 4934 { CVT_95_addAbsMemOperands, 1, CVT_Done }, 4935 // Convert__Reg1_1__Tie0_2_2 4936 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done }, 4937 // Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1 4938 { CVT_regEAX, 0, CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_1_1, CVT_Done }, 4939}; 4940 4941void X86AsmParser:: 4942convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, 4943 const OperandVector &Operands) { 4944 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); 4945 const uint8_t *Converter = ConversionTable[Kind]; 4946 unsigned OpIdx; 4947 Inst.setOpcode(Opcode); 4948 for (const uint8_t *p = Converter; *p; p+= 2) { 4949 OpIdx = *(p + 1); 4950 switch (*p) { 4951 default: llvm_unreachable("invalid conversion entry!"); 4952 case CVT_Reg: 4953 static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1); 4954 break; 4955 case CVT_Tied: { 4956 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - 4957 std::begin(TiedAsmOperandTable)) && 4958 "Tied operand not found"); 4959 unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0]; 4960 if (TiedResOpnd != (uint8_t) -1) 4961 Inst.addOperand(Inst.getOperand(TiedResOpnd)); 4962 break; 4963 } 4964 case CVT_imm_95_10: 4965 Inst.addOperand(MCOperand::createImm(10)); 4966 break; 4967 case CVT_95_addImmOperands: 4968 static_cast<X86Operand&>(*Operands[OpIdx]).addImmOperands(Inst, 1); 4969 break; 4970 case CVT_regAX: 4971 Inst.addOperand(MCOperand::createReg(X86::AX)); 4972 break; 4973 case CVT_regEAX: 4974 Inst.addOperand(MCOperand::createReg(X86::EAX)); 4975 break; 4976 case CVT_regRAX: 4977 Inst.addOperand(MCOperand::createReg(X86::RAX)); 4978 break; 4979 case CVT_95_Reg: 4980 static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1); 4981 break; 4982 case CVT_95_addMemOperands: 4983 static_cast<X86Operand&>(*Operands[OpIdx]).addMemOperands(Inst, 5); 4984 break; 4985 case CVT_95_addAbsMemOperands: 4986 static_cast<X86Operand&>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1); 4987 break; 4988 case CVT_imm_95_7: 4989 Inst.addOperand(MCOperand::createImm(7)); 4990 break; 4991 case CVT_imm_95_3: 4992 Inst.addOperand(MCOperand::createImm(3)); 4993 break; 4994 case CVT_imm_95_2: 4995 Inst.addOperand(MCOperand::createImm(2)); 4996 break; 4997 case CVT_imm_95_6: 4998 Inst.addOperand(MCOperand::createImm(6)); 4999 break; 5000 case CVT_imm_95_4: 5001 Inst.addOperand(MCOperand::createImm(4)); 5002 break; 5003 case CVT_imm_95_15: 5004 Inst.addOperand(MCOperand::createImm(15)); 5005 break; 5006 case CVT_imm_95_13: 5007 Inst.addOperand(MCOperand::createImm(13)); 5008 break; 5009 case CVT_imm_95_12: 5010 Inst.addOperand(MCOperand::createImm(12)); 5011 break; 5012 case CVT_imm_95_14: 5013 Inst.addOperand(MCOperand::createImm(14)); 5014 break; 5015 case CVT_imm_95_5: 5016 Inst.addOperand(MCOperand::createImm(5)); 5017 break; 5018 case CVT_imm_95_1: 5019 Inst.addOperand(MCOperand::createImm(1)); 5020 break; 5021 case CVT_imm_95_11: 5022 Inst.addOperand(MCOperand::createImm(11)); 5023 break; 5024 case CVT_imm_95_9: 5025 Inst.addOperand(MCOperand::createImm(9)); 5026 break; 5027 case CVT_imm_95_0: 5028 Inst.addOperand(MCOperand::createImm(0)); 5029 break; 5030 case CVT_imm_95_8: 5031 Inst.addOperand(MCOperand::createImm(8)); 5032 break; 5033 case CVT_95_addDstIdxOperands: 5034 static_cast<X86Operand&>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1); 5035 break; 5036 case CVT_95_addSrcIdxOperands: 5037 static_cast<X86Operand&>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2); 5038 break; 5039 case CVT_95_addGR32orGR64Operands: 5040 static_cast<X86Operand&>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1); 5041 break; 5042 case CVT_regST1: 5043 Inst.addOperand(MCOperand::createReg(X86::ST1)); 5044 break; 5045 case CVT_regST0: 5046 Inst.addOperand(MCOperand::createReg(X86::ST0)); 5047 break; 5048 case CVT_95_addMemOffsOperands: 5049 static_cast<X86Operand&>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2); 5050 break; 5051 case CVT_imm_95_17: 5052 Inst.addOperand(MCOperand::createImm(17)); 5053 break; 5054 case CVT_imm_95_16: 5055 Inst.addOperand(MCOperand::createImm(16)); 5056 break; 5057 case CVT_95_addAVX512RCOperands: 5058 static_cast<X86Operand&>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1); 5059 break; 5060 case CVT_95_addMaskPairOperands: 5061 static_cast<X86Operand&>(*Operands[OpIdx]).addMaskPairOperands(Inst, 1); 5062 break; 5063 } 5064 } 5065} 5066 5067void X86AsmParser:: 5068convertToMapAndConstraints(unsigned Kind, 5069 const OperandVector &Operands) { 5070 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); 5071 unsigned NumMCOperands = 0; 5072 const uint8_t *Converter = ConversionTable[Kind]; 5073 for (const uint8_t *p = Converter; *p; p+= 2) { 5074 switch (*p) { 5075 default: llvm_unreachable("invalid conversion entry!"); 5076 case CVT_Reg: 5077 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5078 Operands[*(p + 1)]->setConstraint("r"); 5079 ++NumMCOperands; 5080 break; 5081 case CVT_Tied: 5082 ++NumMCOperands; 5083 break; 5084 case CVT_imm_95_10: 5085 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5086 Operands[*(p + 1)]->setConstraint(""); 5087 ++NumMCOperands; 5088 break; 5089 case CVT_95_addImmOperands: 5090 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5091 Operands[*(p + 1)]->setConstraint("m"); 5092 NumMCOperands += 1; 5093 break; 5094 case CVT_regAX: 5095 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5096 Operands[*(p + 1)]->setConstraint("m"); 5097 ++NumMCOperands; 5098 break; 5099 case CVT_regEAX: 5100 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5101 Operands[*(p + 1)]->setConstraint("m"); 5102 ++NumMCOperands; 5103 break; 5104 case CVT_regRAX: 5105 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5106 Operands[*(p + 1)]->setConstraint("m"); 5107 ++NumMCOperands; 5108 break; 5109 case CVT_95_Reg: 5110 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5111 Operands[*(p + 1)]->setConstraint("r"); 5112 NumMCOperands += 1; 5113 break; 5114 case CVT_95_addMemOperands: 5115 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5116 Operands[*(p + 1)]->setConstraint("m"); 5117 NumMCOperands += 5; 5118 break; 5119 case CVT_95_addAbsMemOperands: 5120 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5121 Operands[*(p + 1)]->setConstraint("m"); 5122 NumMCOperands += 1; 5123 break; 5124 case CVT_imm_95_7: 5125 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5126 Operands[*(p + 1)]->setConstraint(""); 5127 ++NumMCOperands; 5128 break; 5129 case CVT_imm_95_3: 5130 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5131 Operands[*(p + 1)]->setConstraint(""); 5132 ++NumMCOperands; 5133 break; 5134 case CVT_imm_95_2: 5135 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5136 Operands[*(p + 1)]->setConstraint(""); 5137 ++NumMCOperands; 5138 break; 5139 case CVT_imm_95_6: 5140 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5141 Operands[*(p + 1)]->setConstraint(""); 5142 ++NumMCOperands; 5143 break; 5144 case CVT_imm_95_4: 5145 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5146 Operands[*(p + 1)]->setConstraint(""); 5147 ++NumMCOperands; 5148 break; 5149 case CVT_imm_95_15: 5150 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5151 Operands[*(p + 1)]->setConstraint(""); 5152 ++NumMCOperands; 5153 break; 5154 case CVT_imm_95_13: 5155 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5156 Operands[*(p + 1)]->setConstraint(""); 5157 ++NumMCOperands; 5158 break; 5159 case CVT_imm_95_12: 5160 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5161 Operands[*(p + 1)]->setConstraint(""); 5162 ++NumMCOperands; 5163 break; 5164 case CVT_imm_95_14: 5165 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5166 Operands[*(p + 1)]->setConstraint(""); 5167 ++NumMCOperands; 5168 break; 5169 case CVT_imm_95_5: 5170 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5171 Operands[*(p + 1)]->setConstraint(""); 5172 ++NumMCOperands; 5173 break; 5174 case CVT_imm_95_1: 5175 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5176 Operands[*(p + 1)]->setConstraint(""); 5177 ++NumMCOperands; 5178 break; 5179 case CVT_imm_95_11: 5180 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5181 Operands[*(p + 1)]->setConstraint(""); 5182 ++NumMCOperands; 5183 break; 5184 case CVT_imm_95_9: 5185 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5186 Operands[*(p + 1)]->setConstraint(""); 5187 ++NumMCOperands; 5188 break; 5189 case CVT_imm_95_0: 5190 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5191 Operands[*(p + 1)]->setConstraint(""); 5192 ++NumMCOperands; 5193 break; 5194 case CVT_imm_95_8: 5195 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5196 Operands[*(p + 1)]->setConstraint(""); 5197 ++NumMCOperands; 5198 break; 5199 case CVT_95_addDstIdxOperands: 5200 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5201 Operands[*(p + 1)]->setConstraint("m"); 5202 NumMCOperands += 1; 5203 break; 5204 case CVT_95_addSrcIdxOperands: 5205 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5206 Operands[*(p + 1)]->setConstraint("m"); 5207 NumMCOperands += 2; 5208 break; 5209 case CVT_95_addGR32orGR64Operands: 5210 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5211 Operands[*(p + 1)]->setConstraint("m"); 5212 NumMCOperands += 1; 5213 break; 5214 case CVT_regST1: 5215 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5216 Operands[*(p + 1)]->setConstraint("m"); 5217 ++NumMCOperands; 5218 break; 5219 case CVT_regST0: 5220 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5221 Operands[*(p + 1)]->setConstraint("m"); 5222 ++NumMCOperands; 5223 break; 5224 case CVT_95_addMemOffsOperands: 5225 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5226 Operands[*(p + 1)]->setConstraint("m"); 5227 NumMCOperands += 2; 5228 break; 5229 case CVT_imm_95_17: 5230 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5231 Operands[*(p + 1)]->setConstraint(""); 5232 ++NumMCOperands; 5233 break; 5234 case CVT_imm_95_16: 5235 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5236 Operands[*(p + 1)]->setConstraint(""); 5237 ++NumMCOperands; 5238 break; 5239 case CVT_95_addAVX512RCOperands: 5240 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5241 Operands[*(p + 1)]->setConstraint("m"); 5242 NumMCOperands += 1; 5243 break; 5244 case CVT_95_addMaskPairOperands: 5245 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 5246 Operands[*(p + 1)]->setConstraint("m"); 5247 NumMCOperands += 1; 5248 break; 5249 } 5250 } 5251} 5252 5253namespace { 5254 5255/// MatchClassKind - The kinds of classes which participate in 5256/// instruction matching. 5257enum MatchClassKind { 5258 InvalidMatchClass = 0, 5259 OptionalMatchClass = 1, 5260 MCK__STAR_, // '*' 5261 MCK__123_, // '{' 5262 MCK__123_1to16_125_, // '{1to16}' 5263 MCK__123_1to2_125_, // '{1to2}' 5264 MCK__123_1to4_125_, // '{1to4}' 5265 MCK__123_1to8_125_, // '{1to8}' 5266 MCK__123_sae_125_, // '{sae}' 5267 MCK__123_z_125_, // '{z}' 5268 MCK__125_, // '}' 5269 MCK_LAST_TOKEN = MCK__125_, 5270 MCK_Reg77, // derived register class 5271 MCK_Reg76, // derived register class 5272 MCK_Reg73, // derived register class 5273 MCK_Reg71, // derived register class 5274 MCK_Reg69, // derived register class 5275 MCK_Reg38, // derived register class 5276 MCK_Reg36, // derived register class 5277 MCK_Reg34, // derived register class 5278 MCK_Reg32, // derived register class 5279 MCK_AL, // register class 'AL' 5280 MCK_AX, // register class 'AX' 5281 MCK_CCR, // register class 'CCR' 5282 MCK_CL, // register class 'CL' 5283 MCK_CS, // register class 'CS' 5284 MCK_DFCCR, // register class 'DFCCR' 5285 MCK_DS, // register class 'DS' 5286 MCK_DX, // register class 'DX' 5287 MCK_EAX, // register class 'EAX' 5288 MCK_EBX, // register class 'EBX' 5289 MCK_ECX, // register class 'ECX' 5290 MCK_EDX, // register class 'EDX' 5291 MCK_ES, // register class 'ES' 5292 MCK_FPCCR, // register class 'FPCCR' 5293 MCK_FS, // register class 'FS' 5294 MCK_GS, // register class 'GS' 5295 MCK_RAX, // register class 'RAX' 5296 MCK_RBX, // register class 'RBX' 5297 MCK_RCX, // register class 'RCX' 5298 MCK_RDX, // register class 'RDX' 5299 MCK_RFP80_7, // register class 'RFP80_7' 5300 MCK_SS, // register class 'SS' 5301 MCK_ST0, // register class 'ST0' 5302 MCK_XMM0, // register class 'XMM0' 5303 MCK_Reg75, // derived register class 5304 MCK_Reg74, // derived register class 5305 MCK_Reg72, // derived register class 5306 MCK_Reg70, // derived register class 5307 MCK_Reg68, // derived register class 5308 MCK_Reg66, // derived register class 5309 MCK_Reg64, // derived register class 5310 MCK_GR32_AD, // register class 'GR32_AD' 5311 MCK_GR32_BPSP, // register class 'GR32_BPSP' 5312 MCK_GR32_BSI, // register class 'GR32_BSI' 5313 MCK_GR32_CB, // register class 'GR32_CB' 5314 MCK_GR32_DC, // register class 'GR32_DC' 5315 MCK_GR32_DIBP, // register class 'GR32_DIBP' 5316 MCK_GR32_SIDI, // register class 'GR32_SIDI' 5317 MCK_GR64_AD, // register class 'GR64_AD' 5318 MCK_Reg106, // derived register class 5319 MCK_Reg41, // derived register class 5320 MCK_Reg15, // derived register class 5321 MCK_Reg55, // derived register class 5322 MCK_BNDR, // register class 'BNDR' 5323 MCK_GR16_ABCD, // register class 'GR16_ABCD' 5324 MCK_GR32_ABCD, // register class 'GR32_ABCD' 5325 MCK_GR32_TC, // register class 'GR32_TC' 5326 MCK_GR64_ABCD, // register class 'GR64_ABCD' 5327 MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H' 5328 MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L' 5329 MCK_VK16PAIR, // register class 'VK16PAIR,VK1PAIR,VK2PAIR,VK4PAIR,VK8PAIR' 5330 MCK_Reg60, // derived register class 5331 MCK_Reg49, // derived register class 5332 MCK_Reg62, // derived register class 5333 MCK_Reg50, // derived register class 5334 MCK_SEGMENT_REG, // register class 'SEGMENT_REG' 5335 MCK_Reg61, // derived register class 5336 MCK_Reg58, // derived register class 5337 MCK_Reg53, // derived register class 5338 MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP' 5339 MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP' 5340 MCK_RFP32, // register class 'RFP32,RFP64,RFP80' 5341 MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM' 5342 MCK_Reg59, // derived register class 5343 MCK_Reg56, // derived register class 5344 MCK_Reg54, // derived register class 5345 MCK_Reg44, // derived register class 5346 MCK_GR16_NOREX, // register class 'GR16_NOREX' 5347 MCK_GR32_NOREX, // register class 'GR32_NOREX' 5348 MCK_GR8_NOREX, // register class 'GR8_NOREX' 5349 MCK_RST, // register class 'RST' 5350 MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64' 5351 MCK_VR64, // register class 'VR64' 5352 MCK_Reg51, // derived register class 5353 MCK_Reg23, // derived register class 5354 MCK_GR64_NOREX, // register class 'GR64_NOREX' 5355 MCK_GR64_TCW64, // register class 'GR64_TCW64' 5356 MCK_GR64_TC, // register class 'GR64_TC' 5357 MCK_GRH8, // register class 'GRH8' 5358 MCK_GR32_NOSP, // register class 'GR32_NOSP' 5359 MCK_GR64_NOSP, // register class 'GR64_NOSP' 5360 MCK_Reg45, // derived register class 5361 MCK_CONTROL_REG, // register class 'CONTROL_REG' 5362 MCK_DEBUG_REG, // register class 'DEBUG_REG' 5363 MCK_FR32, // register class 'FR32,FR64,VR128' 5364 MCK_GR16, // register class 'GR16' 5365 MCK_GR32, // register class 'GR32' 5366 MCK_VR256, // register class 'VR256' 5367 MCK_VR512_0_15, // register class 'VR512_0_15' 5368 MCK_Reg20, // derived register class 5369 MCK_GR64, // register class 'GR64' 5370 MCK_GRH16, // register class 'GRH16' 5371 MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS' 5372 MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP' 5373 MCK_GR8, // register class 'GR8' 5374 MCK_FR32X, // register class 'FR32X,FR64X,VR128X' 5375 MCK_VR256X, // register class 'VR256X' 5376 MCK_VR512, // register class 'VR512' 5377 MCK_LAST_REGISTER = MCK_VR512, 5378 MCK_AVX512RC, // user defined class 'AVX512RCOperand' 5379 MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand' 5380 MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand' 5381 MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand' 5382 MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand' 5383 MCK_Imm, // user defined class 'ImmAsmOperand' 5384 MCK_ImmUnsignedi4, // user defined class 'ImmUnsignedi4AsmOperand' 5385 MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand' 5386 MCK_VK16Pair, // user defined class 'VK16PairAsmOperand' 5387 MCK_VK1Pair, // user defined class 'VK1PairAsmOperand' 5388 MCK_VK2Pair, // user defined class 'VK2PairAsmOperand' 5389 MCK_VK4Pair, // user defined class 'VK4PairAsmOperand' 5390 MCK_VK8Pair, // user defined class 'VK8PairAsmOperand' 5391 MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand' 5392 MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand' 5393 MCK_DstIdx16, // user defined class 'X86DstIdx16Operand' 5394 MCK_DstIdx32, // user defined class 'X86DstIdx32Operand' 5395 MCK_DstIdx64, // user defined class 'X86DstIdx64Operand' 5396 MCK_DstIdx8, // user defined class 'X86DstIdx8Operand' 5397 MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand' 5398 MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand' 5399 MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand' 5400 MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand' 5401 MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand' 5402 MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand' 5403 MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand' 5404 MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand' 5405 MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand' 5406 MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand' 5407 MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand' 5408 MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand' 5409 MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand' 5410 MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand' 5411 MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand' 5412 MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand' 5413 MCK_Mem128, // user defined class 'X86Mem128AsmOperand' 5414 MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand' 5415 MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand' 5416 MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand' 5417 MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand' 5418 MCK_Mem16, // user defined class 'X86Mem16AsmOperand' 5419 MCK_Mem256, // user defined class 'X86Mem256AsmOperand' 5420 MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand' 5421 MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand' 5422 MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand' 5423 MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand' 5424 MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand' 5425 MCK_Mem32, // user defined class 'X86Mem32AsmOperand' 5426 MCK_Mem512, // user defined class 'X86Mem512AsmOperand' 5427 MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand' 5428 MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand' 5429 MCK_Mem64, // user defined class 'X86Mem64AsmOperand' 5430 MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand' 5431 MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand' 5432 MCK_Mem80, // user defined class 'X86Mem80AsmOperand' 5433 MCK_Mem8, // user defined class 'X86Mem8AsmOperand' 5434 MCK_Mem, // user defined class 'X86MemAsmOperand' 5435 NumMatchClassKinds 5436}; 5437 5438} // end anonymous namespace 5439 5440static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { 5441 return MCTargetAsmParser::Match_InvalidOperand; 5442} 5443 5444static MatchClassKind matchTokenString(StringRef Name) { 5445 switch (Name.size()) { 5446 default: break; 5447 case 1: // 3 strings to match. 5448 switch (Name[0]) { 5449 default: break; 5450 case '*': // 1 string to match. 5451 return MCK__STAR_; // "*" 5452 case '{': // 1 string to match. 5453 return MCK__123_; // "{" 5454 case '}': // 1 string to match. 5455 return MCK__125_; // "}" 5456 } 5457 break; 5458 case 3: // 1 string to match. 5459 if (memcmp(Name.data()+0, "{z}", 3) != 0) 5460 break; 5461 return MCK__123_z_125_; // "{z}" 5462 case 5: // 1 string to match. 5463 if (memcmp(Name.data()+0, "{sae}", 5) != 0) 5464 break; 5465 return MCK__123_sae_125_; // "{sae}" 5466 case 6: // 3 strings to match. 5467 if (memcmp(Name.data()+0, "{1to", 4) != 0) 5468 break; 5469 switch (Name[4]) { 5470 default: break; 5471 case '2': // 1 string to match. 5472 if (Name[5] != '}') 5473 break; 5474 return MCK__123_1to2_125_; // "{1to2}" 5475 case '4': // 1 string to match. 5476 if (Name[5] != '}') 5477 break; 5478 return MCK__123_1to4_125_; // "{1to4}" 5479 case '8': // 1 string to match. 5480 if (Name[5] != '}') 5481 break; 5482 return MCK__123_1to8_125_; // "{1to8}" 5483 } 5484 break; 5485 case 7: // 1 string to match. 5486 if (memcmp(Name.data()+0, "{1to16}", 7) != 0) 5487 break; 5488 return MCK__123_1to16_125_; // "{1to16}" 5489 } 5490 return InvalidMatchClass; 5491} 5492 5493/// isSubclass - Compute whether \p A is a subclass of \p B. 5494static bool isSubclass(MatchClassKind A, MatchClassKind B) { 5495 if (A == B) 5496 return true; 5497 5498 switch (A) { 5499 default: 5500 return false; 5501 5502 case MCK_Reg77: 5503 switch (B) { 5504 default: return false; 5505 case MCK_Reg75: return true; 5506 case MCK_Reg60: return true; 5507 case MCK_Reg53: return true; 5508 case MCK_Reg59: return true; 5509 case MCK_GR64_NOREX: return true; 5510 case MCK_GR64_TCW64: return true; 5511 case MCK_GR64_TC: return true; 5512 case MCK_GR64: return true; 5513 case MCK_LOW32_ADDR_ACCESS: return true; 5514 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5515 } 5516 5517 case MCK_Reg76: 5518 switch (B) { 5519 default: return false; 5520 case MCK_Reg74: return true; 5521 case MCK_Reg55: return true; 5522 case MCK_Reg60: return true; 5523 case MCK_Reg50: return true; 5524 case MCK_Reg58: return true; 5525 case MCK_Reg53: return true; 5526 case MCK_Reg59: return true; 5527 case MCK_Reg56: return true; 5528 case MCK_Reg44: return true; 5529 case MCK_Reg51: return true; 5530 case MCK_GR64_NOREX: return true; 5531 case MCK_GR64_TCW64: return true; 5532 case MCK_GR64_TC: return true; 5533 case MCK_Reg45: return true; 5534 case MCK_GR64: return true; 5535 } 5536 5537 case MCK_Reg73: 5538 switch (B) { 5539 default: return false; 5540 case MCK_Reg75: return true; 5541 case MCK_Reg74: return true; 5542 case MCK_Reg72: return true; 5543 case MCK_GR64_NOREX_NOSP: return true; 5544 case MCK_Reg44: return true; 5545 case MCK_Reg23: return true; 5546 case MCK_GR64_NOREX: return true; 5547 case MCK_GR64_NOSP: return true; 5548 case MCK_Reg45: return true; 5549 case MCK_Reg20: return true; 5550 case MCK_GR64: return true; 5551 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5552 } 5553 5554 case MCK_Reg71: 5555 switch (B) { 5556 default: return false; 5557 case MCK_Reg72: return true; 5558 case MCK_Reg70: return true; 5559 case MCK_Reg49: return true; 5560 case MCK_Reg50: return true; 5561 case MCK_Reg53: return true; 5562 case MCK_GR64_NOREX_NOSP: return true; 5563 case MCK_Reg54: return true; 5564 case MCK_Reg44: return true; 5565 case MCK_Reg51: return true; 5566 case MCK_GR64_NOREX: return true; 5567 case MCK_GR64_TC: return true; 5568 case MCK_GR64_NOSP: return true; 5569 case MCK_Reg45: return true; 5570 case MCK_GR64: return true; 5571 } 5572 5573 case MCK_Reg69: 5574 switch (B) { 5575 default: return false; 5576 case MCK_Reg70: return true; 5577 case MCK_Reg68: return true; 5578 case MCK_Reg49: return true; 5579 case MCK_Reg50: return true; 5580 case MCK_Reg53: return true; 5581 case MCK_GR64_NOREX_NOSP: return true; 5582 case MCK_Reg54: return true; 5583 case MCK_Reg44: return true; 5584 case MCK_Reg51: return true; 5585 case MCK_GR64_NOREX: return true; 5586 case MCK_GR64_TC: return true; 5587 case MCK_GR64_NOSP: return true; 5588 case MCK_Reg45: return true; 5589 case MCK_GR64: return true; 5590 } 5591 5592 case MCK_Reg38: 5593 switch (B) { 5594 default: return false; 5595 case MCK_GR32_BPSP: return true; 5596 case MCK_GR32_TC: return true; 5597 case MCK_GR32_NOREX: return true; 5598 case MCK_Reg23: return true; 5599 case MCK_GR32: return true; 5600 case MCK_Reg20: return true; 5601 case MCK_LOW32_ADDR_ACCESS: return true; 5602 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5603 } 5604 5605 case MCK_Reg36: 5606 switch (B) { 5607 default: return false; 5608 case MCK_GR32_BPSP: return true; 5609 case MCK_GR32_DIBP: return true; 5610 case MCK_GR32_NOREX_NOSP: return true; 5611 case MCK_GR32_NOREX: return true; 5612 case MCK_Reg23: return true; 5613 case MCK_GR32_NOSP: return true; 5614 case MCK_GR32: return true; 5615 case MCK_Reg20: return true; 5616 case MCK_LOW32_ADDR_ACCESS: return true; 5617 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5618 } 5619 5620 case MCK_Reg34: 5621 switch (B) { 5622 default: return false; 5623 case MCK_GR32_DIBP: return true; 5624 case MCK_GR32_SIDI: return true; 5625 case MCK_GR32_NOREX_NOSP: return true; 5626 case MCK_GR32_NOREX: return true; 5627 case MCK_Reg23: return true; 5628 case MCK_GR32_NOSP: return true; 5629 case MCK_GR32: return true; 5630 case MCK_Reg20: return true; 5631 case MCK_LOW32_ADDR_ACCESS: return true; 5632 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5633 } 5634 5635 case MCK_Reg32: 5636 switch (B) { 5637 default: return false; 5638 case MCK_GR32_BSI: return true; 5639 case MCK_GR32_SIDI: return true; 5640 case MCK_GR32_NOREX_NOSP: return true; 5641 case MCK_GR32_NOREX: return true; 5642 case MCK_Reg23: return true; 5643 case MCK_GR32_NOSP: return true; 5644 case MCK_GR32: return true; 5645 case MCK_Reg20: return true; 5646 case MCK_LOW32_ADDR_ACCESS: return true; 5647 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5648 } 5649 5650 case MCK_AL: 5651 switch (B) { 5652 default: return false; 5653 case MCK_GR8_ABCD_L: return true; 5654 case MCK_GR8_NOREX: return true; 5655 case MCK_GR8: return true; 5656 } 5657 5658 case MCK_AX: 5659 switch (B) { 5660 default: return false; 5661 case MCK_GR16_ABCD: return true; 5662 case MCK_GR16_NOREX: return true; 5663 case MCK_GR16: return true; 5664 } 5665 5666 case MCK_CL: 5667 switch (B) { 5668 default: return false; 5669 case MCK_GR8_ABCD_L: return true; 5670 case MCK_GR8_NOREX: return true; 5671 case MCK_GR8: return true; 5672 } 5673 5674 case MCK_CS: 5675 return B == MCK_SEGMENT_REG; 5676 5677 case MCK_DS: 5678 return B == MCK_SEGMENT_REG; 5679 5680 case MCK_DX: 5681 switch (B) { 5682 default: return false; 5683 case MCK_GR16_ABCD: return true; 5684 case MCK_GR16_NOREX: return true; 5685 case MCK_GR16: return true; 5686 } 5687 5688 case MCK_EAX: 5689 switch (B) { 5690 default: return false; 5691 case MCK_GR32_AD: return true; 5692 case MCK_Reg15: return true; 5693 case MCK_GR32_ABCD: return true; 5694 case MCK_GR32_TC: return true; 5695 case MCK_GR32_NOREX_NOSP: return true; 5696 case MCK_GR32_NOREX: return true; 5697 case MCK_Reg23: return true; 5698 case MCK_GR32_NOSP: return true; 5699 case MCK_GR32: return true; 5700 case MCK_Reg20: return true; 5701 case MCK_LOW32_ADDR_ACCESS: return true; 5702 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5703 } 5704 5705 case MCK_EBX: 5706 switch (B) { 5707 default: return false; 5708 case MCK_GR32_BSI: return true; 5709 case MCK_GR32_CB: return true; 5710 case MCK_GR32_ABCD: return true; 5711 case MCK_GR32_NOREX_NOSP: return true; 5712 case MCK_GR32_NOREX: return true; 5713 case MCK_Reg23: return true; 5714 case MCK_GR32_NOSP: return true; 5715 case MCK_GR32: return true; 5716 case MCK_Reg20: return true; 5717 case MCK_LOW32_ADDR_ACCESS: return true; 5718 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5719 } 5720 5721 case MCK_ECX: 5722 switch (B) { 5723 default: return false; 5724 case MCK_GR32_CB: return true; 5725 case MCK_GR32_DC: return true; 5726 case MCK_Reg15: return true; 5727 case MCK_GR32_ABCD: return true; 5728 case MCK_GR32_TC: return true; 5729 case MCK_GR32_NOREX_NOSP: return true; 5730 case MCK_GR32_NOREX: return true; 5731 case MCK_Reg23: return true; 5732 case MCK_GR32_NOSP: return true; 5733 case MCK_GR32: return true; 5734 case MCK_Reg20: return true; 5735 case MCK_LOW32_ADDR_ACCESS: return true; 5736 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5737 } 5738 5739 case MCK_EDX: 5740 switch (B) { 5741 default: return false; 5742 case MCK_GR32_AD: return true; 5743 case MCK_GR32_DC: return true; 5744 case MCK_Reg15: return true; 5745 case MCK_GR32_ABCD: return true; 5746 case MCK_GR32_TC: return true; 5747 case MCK_GR32_NOREX_NOSP: return true; 5748 case MCK_GR32_NOREX: return true; 5749 case MCK_Reg23: return true; 5750 case MCK_GR32_NOSP: return true; 5751 case MCK_GR32: return true; 5752 case MCK_Reg20: return true; 5753 case MCK_LOW32_ADDR_ACCESS: return true; 5754 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5755 } 5756 5757 case MCK_ES: 5758 return B == MCK_SEGMENT_REG; 5759 5760 case MCK_FS: 5761 return B == MCK_SEGMENT_REG; 5762 5763 case MCK_GS: 5764 return B == MCK_SEGMENT_REG; 5765 5766 case MCK_RAX: 5767 switch (B) { 5768 default: return false; 5769 case MCK_GR64_AD: return true; 5770 case MCK_Reg41: return true; 5771 case MCK_Reg55: return true; 5772 case MCK_GR64_ABCD: return true; 5773 case MCK_Reg60: return true; 5774 case MCK_Reg49: return true; 5775 case MCK_Reg62: return true; 5776 case MCK_Reg50: return true; 5777 case MCK_Reg61: return true; 5778 case MCK_Reg58: return true; 5779 case MCK_Reg53: return true; 5780 case MCK_GR64_NOREX_NOSP: return true; 5781 case MCK_Reg59: return true; 5782 case MCK_Reg56: return true; 5783 case MCK_Reg54: return true; 5784 case MCK_Reg44: return true; 5785 case MCK_Reg51: return true; 5786 case MCK_GR64_NOREX: return true; 5787 case MCK_GR64_TCW64: return true; 5788 case MCK_GR64_TC: return true; 5789 case MCK_GR64_NOSP: return true; 5790 case MCK_Reg45: return true; 5791 case MCK_GR64: return true; 5792 } 5793 5794 case MCK_RBX: 5795 switch (B) { 5796 default: return false; 5797 case MCK_Reg68: return true; 5798 case MCK_Reg66: return true; 5799 case MCK_GR64_ABCD: return true; 5800 case MCK_GR64_NOREX_NOSP: return true; 5801 case MCK_Reg44: return true; 5802 case MCK_GR64_NOREX: return true; 5803 case MCK_GR64_NOSP: return true; 5804 case MCK_Reg45: return true; 5805 case MCK_GR64: return true; 5806 } 5807 5808 case MCK_RCX: 5809 switch (B) { 5810 default: return false; 5811 case MCK_Reg66: return true; 5812 case MCK_Reg64: return true; 5813 case MCK_Reg41: return true; 5814 case MCK_Reg55: return true; 5815 case MCK_GR64_ABCD: return true; 5816 case MCK_Reg60: return true; 5817 case MCK_Reg49: return true; 5818 case MCK_Reg62: return true; 5819 case MCK_Reg50: return true; 5820 case MCK_Reg61: return true; 5821 case MCK_Reg58: return true; 5822 case MCK_Reg53: return true; 5823 case MCK_GR64_NOREX_NOSP: return true; 5824 case MCK_Reg59: return true; 5825 case MCK_Reg56: return true; 5826 case MCK_Reg54: return true; 5827 case MCK_Reg44: return true; 5828 case MCK_Reg51: return true; 5829 case MCK_GR64_NOREX: return true; 5830 case MCK_GR64_TCW64: return true; 5831 case MCK_GR64_TC: return true; 5832 case MCK_GR64_NOSP: return true; 5833 case MCK_Reg45: return true; 5834 case MCK_GR64: return true; 5835 } 5836 5837 case MCK_RDX: 5838 switch (B) { 5839 default: return false; 5840 case MCK_Reg64: return true; 5841 case MCK_GR64_AD: return true; 5842 case MCK_Reg41: return true; 5843 case MCK_Reg55: return true; 5844 case MCK_GR64_ABCD: return true; 5845 case MCK_Reg60: return true; 5846 case MCK_Reg49: return true; 5847 case MCK_Reg62: return true; 5848 case MCK_Reg50: return true; 5849 case MCK_Reg61: return true; 5850 case MCK_Reg58: return true; 5851 case MCK_Reg53: return true; 5852 case MCK_GR64_NOREX_NOSP: return true; 5853 case MCK_Reg59: return true; 5854 case MCK_Reg56: return true; 5855 case MCK_Reg54: return true; 5856 case MCK_Reg44: return true; 5857 case MCK_Reg51: return true; 5858 case MCK_GR64_NOREX: return true; 5859 case MCK_GR64_TCW64: return true; 5860 case MCK_GR64_TC: return true; 5861 case MCK_GR64_NOSP: return true; 5862 case MCK_Reg45: return true; 5863 case MCK_GR64: return true; 5864 } 5865 5866 case MCK_SS: 5867 return B == MCK_SEGMENT_REG; 5868 5869 case MCK_ST0: 5870 return B == MCK_RST; 5871 5872 case MCK_XMM0: 5873 switch (B) { 5874 default: return false; 5875 case MCK_FR32: return true; 5876 case MCK_FR32X: return true; 5877 } 5878 5879 case MCK_Reg75: 5880 switch (B) { 5881 default: return false; 5882 case MCK_GR64_NOREX: return true; 5883 case MCK_GR64: return true; 5884 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5885 } 5886 5887 case MCK_Reg74: 5888 switch (B) { 5889 default: return false; 5890 case MCK_Reg44: return true; 5891 case MCK_GR64_NOREX: return true; 5892 case MCK_Reg45: return true; 5893 case MCK_GR64: return true; 5894 } 5895 5896 case MCK_Reg72: 5897 switch (B) { 5898 default: return false; 5899 case MCK_GR64_NOREX_NOSP: return true; 5900 case MCK_Reg44: return true; 5901 case MCK_GR64_NOREX: return true; 5902 case MCK_GR64_NOSP: return true; 5903 case MCK_Reg45: return true; 5904 case MCK_GR64: return true; 5905 } 5906 5907 case MCK_Reg70: 5908 switch (B) { 5909 default: return false; 5910 case MCK_Reg49: return true; 5911 case MCK_Reg50: return true; 5912 case MCK_Reg53: return true; 5913 case MCK_GR64_NOREX_NOSP: return true; 5914 case MCK_Reg54: return true; 5915 case MCK_Reg44: return true; 5916 case MCK_Reg51: return true; 5917 case MCK_GR64_NOREX: return true; 5918 case MCK_GR64_TC: return true; 5919 case MCK_GR64_NOSP: return true; 5920 case MCK_Reg45: return true; 5921 case MCK_GR64: return true; 5922 } 5923 5924 case MCK_Reg68: 5925 switch (B) { 5926 default: return false; 5927 case MCK_GR64_NOREX_NOSP: return true; 5928 case MCK_Reg44: return true; 5929 case MCK_GR64_NOREX: return true; 5930 case MCK_GR64_NOSP: return true; 5931 case MCK_Reg45: return true; 5932 case MCK_GR64: return true; 5933 } 5934 5935 case MCK_Reg66: 5936 switch (B) { 5937 default: return false; 5938 case MCK_GR64_ABCD: return true; 5939 case MCK_GR64_NOREX_NOSP: return true; 5940 case MCK_Reg44: return true; 5941 case MCK_GR64_NOREX: return true; 5942 case MCK_GR64_NOSP: return true; 5943 case MCK_Reg45: return true; 5944 case MCK_GR64: return true; 5945 } 5946 5947 case MCK_Reg64: 5948 switch (B) { 5949 default: return false; 5950 case MCK_Reg41: return true; 5951 case MCK_Reg55: return true; 5952 case MCK_GR64_ABCD: return true; 5953 case MCK_Reg60: return true; 5954 case MCK_Reg49: return true; 5955 case MCK_Reg62: return true; 5956 case MCK_Reg50: return true; 5957 case MCK_Reg61: return true; 5958 case MCK_Reg58: return true; 5959 case MCK_Reg53: return true; 5960 case MCK_GR64_NOREX_NOSP: return true; 5961 case MCK_Reg59: return true; 5962 case MCK_Reg56: return true; 5963 case MCK_Reg54: return true; 5964 case MCK_Reg44: return true; 5965 case MCK_Reg51: return true; 5966 case MCK_GR64_NOREX: return true; 5967 case MCK_GR64_TCW64: return true; 5968 case MCK_GR64_TC: return true; 5969 case MCK_GR64_NOSP: return true; 5970 case MCK_Reg45: return true; 5971 case MCK_GR64: return true; 5972 } 5973 5974 case MCK_GR32_AD: 5975 switch (B) { 5976 default: return false; 5977 case MCK_Reg15: return true; 5978 case MCK_GR32_ABCD: return true; 5979 case MCK_GR32_TC: return true; 5980 case MCK_GR32_NOREX_NOSP: return true; 5981 case MCK_GR32_NOREX: return true; 5982 case MCK_Reg23: return true; 5983 case MCK_GR32_NOSP: return true; 5984 case MCK_GR32: return true; 5985 case MCK_Reg20: return true; 5986 case MCK_LOW32_ADDR_ACCESS: return true; 5987 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5988 } 5989 5990 case MCK_GR32_BPSP: 5991 switch (B) { 5992 default: return false; 5993 case MCK_GR32_NOREX: return true; 5994 case MCK_Reg23: return true; 5995 case MCK_GR32: return true; 5996 case MCK_Reg20: return true; 5997 case MCK_LOW32_ADDR_ACCESS: return true; 5998 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 5999 } 6000 6001 case MCK_GR32_BSI: 6002 switch (B) { 6003 default: return false; 6004 case MCK_GR32_NOREX_NOSP: return true; 6005 case MCK_GR32_NOREX: return true; 6006 case MCK_Reg23: return true; 6007 case MCK_GR32_NOSP: return true; 6008 case MCK_GR32: return true; 6009 case MCK_Reg20: return true; 6010 case MCK_LOW32_ADDR_ACCESS: return true; 6011 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6012 } 6013 6014 case MCK_GR32_CB: 6015 switch (B) { 6016 default: return false; 6017 case MCK_GR32_ABCD: return true; 6018 case MCK_GR32_NOREX_NOSP: return true; 6019 case MCK_GR32_NOREX: return true; 6020 case MCK_Reg23: return true; 6021 case MCK_GR32_NOSP: return true; 6022 case MCK_GR32: return true; 6023 case MCK_Reg20: return true; 6024 case MCK_LOW32_ADDR_ACCESS: return true; 6025 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6026 } 6027 6028 case MCK_GR32_DC: 6029 switch (B) { 6030 default: return false; 6031 case MCK_Reg15: return true; 6032 case MCK_GR32_ABCD: return true; 6033 case MCK_GR32_TC: return true; 6034 case MCK_GR32_NOREX_NOSP: return true; 6035 case MCK_GR32_NOREX: return true; 6036 case MCK_Reg23: return true; 6037 case MCK_GR32_NOSP: return true; 6038 case MCK_GR32: return true; 6039 case MCK_Reg20: return true; 6040 case MCK_LOW32_ADDR_ACCESS: return true; 6041 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6042 } 6043 6044 case MCK_GR32_DIBP: 6045 switch (B) { 6046 default: return false; 6047 case MCK_GR32_NOREX_NOSP: return true; 6048 case MCK_GR32_NOREX: return true; 6049 case MCK_Reg23: return true; 6050 case MCK_GR32_NOSP: return true; 6051 case MCK_GR32: return true; 6052 case MCK_Reg20: return true; 6053 case MCK_LOW32_ADDR_ACCESS: return true; 6054 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6055 } 6056 6057 case MCK_GR32_SIDI: 6058 switch (B) { 6059 default: return false; 6060 case MCK_GR32_NOREX_NOSP: return true; 6061 case MCK_GR32_NOREX: return true; 6062 case MCK_Reg23: return true; 6063 case MCK_GR32_NOSP: return true; 6064 case MCK_GR32: return true; 6065 case MCK_Reg20: return true; 6066 case MCK_LOW32_ADDR_ACCESS: return true; 6067 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6068 } 6069 6070 case MCK_GR64_AD: 6071 switch (B) { 6072 default: return false; 6073 case MCK_Reg41: return true; 6074 case MCK_Reg55: return true; 6075 case MCK_GR64_ABCD: return true; 6076 case MCK_Reg60: return true; 6077 case MCK_Reg49: return true; 6078 case MCK_Reg62: return true; 6079 case MCK_Reg50: return true; 6080 case MCK_Reg61: return true; 6081 case MCK_Reg58: return true; 6082 case MCK_Reg53: return true; 6083 case MCK_GR64_NOREX_NOSP: return true; 6084 case MCK_Reg59: return true; 6085 case MCK_Reg56: return true; 6086 case MCK_Reg54: return true; 6087 case MCK_Reg44: return true; 6088 case MCK_Reg51: return true; 6089 case MCK_GR64_NOREX: return true; 6090 case MCK_GR64_TCW64: return true; 6091 case MCK_GR64_TC: return true; 6092 case MCK_GR64_NOSP: return true; 6093 case MCK_Reg45: return true; 6094 case MCK_GR64: return true; 6095 } 6096 6097 case MCK_Reg106: 6098 return B == MCK_VK16PAIR; 6099 6100 case MCK_Reg41: 6101 switch (B) { 6102 default: return false; 6103 case MCK_Reg55: return true; 6104 case MCK_GR64_ABCD: return true; 6105 case MCK_Reg60: return true; 6106 case MCK_Reg49: return true; 6107 case MCK_Reg62: return true; 6108 case MCK_Reg50: return true; 6109 case MCK_Reg61: return true; 6110 case MCK_Reg58: return true; 6111 case MCK_Reg53: return true; 6112 case MCK_GR64_NOREX_NOSP: return true; 6113 case MCK_Reg59: return true; 6114 case MCK_Reg56: return true; 6115 case MCK_Reg54: return true; 6116 case MCK_Reg44: return true; 6117 case MCK_Reg51: return true; 6118 case MCK_GR64_NOREX: return true; 6119 case MCK_GR64_TCW64: return true; 6120 case MCK_GR64_TC: return true; 6121 case MCK_GR64_NOSP: return true; 6122 case MCK_Reg45: return true; 6123 case MCK_GR64: return true; 6124 } 6125 6126 case MCK_Reg15: 6127 switch (B) { 6128 default: return false; 6129 case MCK_GR32_ABCD: return true; 6130 case MCK_GR32_TC: return true; 6131 case MCK_GR32_NOREX_NOSP: return true; 6132 case MCK_GR32_NOREX: return true; 6133 case MCK_Reg23: return true; 6134 case MCK_GR32_NOSP: return true; 6135 case MCK_GR32: return true; 6136 case MCK_Reg20: return true; 6137 case MCK_LOW32_ADDR_ACCESS: return true; 6138 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6139 } 6140 6141 case MCK_Reg55: 6142 switch (B) { 6143 default: return false; 6144 case MCK_Reg60: return true; 6145 case MCK_Reg50: return true; 6146 case MCK_Reg58: return true; 6147 case MCK_Reg53: return true; 6148 case MCK_Reg59: return true; 6149 case MCK_Reg56: return true; 6150 case MCK_Reg44: return true; 6151 case MCK_Reg51: return true; 6152 case MCK_GR64_NOREX: return true; 6153 case MCK_GR64_TCW64: return true; 6154 case MCK_GR64_TC: return true; 6155 case MCK_Reg45: return true; 6156 case MCK_GR64: return true; 6157 } 6158 6159 case MCK_GR16_ABCD: 6160 switch (B) { 6161 default: return false; 6162 case MCK_GR16_NOREX: return true; 6163 case MCK_GR16: return true; 6164 } 6165 6166 case MCK_GR32_ABCD: 6167 switch (B) { 6168 default: return false; 6169 case MCK_GR32_NOREX_NOSP: return true; 6170 case MCK_GR32_NOREX: return true; 6171 case MCK_Reg23: return true; 6172 case MCK_GR32_NOSP: return true; 6173 case MCK_GR32: return true; 6174 case MCK_Reg20: return true; 6175 case MCK_LOW32_ADDR_ACCESS: return true; 6176 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6177 } 6178 6179 case MCK_GR32_TC: 6180 switch (B) { 6181 default: return false; 6182 case MCK_GR32_NOREX: return true; 6183 case MCK_Reg23: return true; 6184 case MCK_GR32: return true; 6185 case MCK_Reg20: return true; 6186 case MCK_LOW32_ADDR_ACCESS: return true; 6187 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6188 } 6189 6190 case MCK_GR64_ABCD: 6191 switch (B) { 6192 default: return false; 6193 case MCK_GR64_NOREX_NOSP: return true; 6194 case MCK_Reg44: return true; 6195 case MCK_GR64_NOREX: return true; 6196 case MCK_GR64_NOSP: return true; 6197 case MCK_Reg45: return true; 6198 case MCK_GR64: return true; 6199 } 6200 6201 case MCK_GR8_ABCD_H: 6202 switch (B) { 6203 default: return false; 6204 case MCK_GR8_NOREX: return true; 6205 case MCK_GR8: return true; 6206 } 6207 6208 case MCK_GR8_ABCD_L: 6209 switch (B) { 6210 default: return false; 6211 case MCK_GR8_NOREX: return true; 6212 case MCK_GR8: return true; 6213 } 6214 6215 case MCK_Reg60: 6216 switch (B) { 6217 default: return false; 6218 case MCK_Reg53: return true; 6219 case MCK_Reg59: return true; 6220 case MCK_GR64_NOREX: return true; 6221 case MCK_GR64_TCW64: return true; 6222 case MCK_GR64_TC: return true; 6223 case MCK_GR64: return true; 6224 } 6225 6226 case MCK_Reg49: 6227 switch (B) { 6228 default: return false; 6229 case MCK_Reg50: return true; 6230 case MCK_Reg53: return true; 6231 case MCK_GR64_NOREX_NOSP: return true; 6232 case MCK_Reg54: return true; 6233 case MCK_Reg44: return true; 6234 case MCK_Reg51: return true; 6235 case MCK_GR64_NOREX: return true; 6236 case MCK_GR64_TC: return true; 6237 case MCK_GR64_NOSP: return true; 6238 case MCK_Reg45: return true; 6239 case MCK_GR64: return true; 6240 } 6241 6242 case MCK_Reg62: 6243 switch (B) { 6244 default: return false; 6245 case MCK_Reg61: return true; 6246 case MCK_Reg58: return true; 6247 case MCK_Reg59: return true; 6248 case MCK_Reg56: return true; 6249 case MCK_Reg54: return true; 6250 case MCK_Reg51: return true; 6251 case MCK_GR64_TCW64: return true; 6252 case MCK_GR64_TC: return true; 6253 case MCK_GR64_NOSP: return true; 6254 case MCK_Reg45: return true; 6255 case MCK_GR64: return true; 6256 } 6257 6258 case MCK_Reg50: 6259 switch (B) { 6260 default: return false; 6261 case MCK_Reg53: return true; 6262 case MCK_Reg44: return true; 6263 case MCK_Reg51: return true; 6264 case MCK_GR64_NOREX: return true; 6265 case MCK_GR64_TC: return true; 6266 case MCK_Reg45: return true; 6267 case MCK_GR64: return true; 6268 } 6269 6270 case MCK_Reg61: 6271 switch (B) { 6272 default: return false; 6273 case MCK_Reg56: return true; 6274 case MCK_GR64_TCW64: return true; 6275 case MCK_GR64_NOSP: return true; 6276 case MCK_Reg45: return true; 6277 case MCK_GR64: return true; 6278 } 6279 6280 case MCK_Reg58: 6281 switch (B) { 6282 default: return false; 6283 case MCK_Reg59: return true; 6284 case MCK_Reg56: return true; 6285 case MCK_Reg51: return true; 6286 case MCK_GR64_TCW64: return true; 6287 case MCK_GR64_TC: return true; 6288 case MCK_Reg45: return true; 6289 case MCK_GR64: return true; 6290 } 6291 6292 case MCK_Reg53: 6293 switch (B) { 6294 default: return false; 6295 case MCK_GR64_NOREX: return true; 6296 case MCK_GR64_TC: return true; 6297 case MCK_GR64: return true; 6298 } 6299 6300 case MCK_GR32_NOREX_NOSP: 6301 switch (B) { 6302 default: return false; 6303 case MCK_GR32_NOREX: return true; 6304 case MCK_Reg23: return true; 6305 case MCK_GR32_NOSP: return true; 6306 case MCK_GR32: return true; 6307 case MCK_Reg20: return true; 6308 case MCK_LOW32_ADDR_ACCESS: return true; 6309 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6310 } 6311 6312 case MCK_GR64_NOREX_NOSP: 6313 switch (B) { 6314 default: return false; 6315 case MCK_Reg44: return true; 6316 case MCK_GR64_NOREX: return true; 6317 case MCK_GR64_NOSP: return true; 6318 case MCK_Reg45: return true; 6319 case MCK_GR64: return true; 6320 } 6321 6322 case MCK_VK16WM: 6323 return B == MCK_VK1; 6324 6325 case MCK_Reg59: 6326 switch (B) { 6327 default: return false; 6328 case MCK_GR64_TCW64: return true; 6329 case MCK_GR64_TC: return true; 6330 case MCK_GR64: return true; 6331 } 6332 6333 case MCK_Reg56: 6334 switch (B) { 6335 default: return false; 6336 case MCK_GR64_TCW64: return true; 6337 case MCK_Reg45: return true; 6338 case MCK_GR64: return true; 6339 } 6340 6341 case MCK_Reg54: 6342 switch (B) { 6343 default: return false; 6344 case MCK_Reg51: return true; 6345 case MCK_GR64_TC: return true; 6346 case MCK_GR64_NOSP: return true; 6347 case MCK_Reg45: return true; 6348 case MCK_GR64: return true; 6349 } 6350 6351 case MCK_Reg44: 6352 switch (B) { 6353 default: return false; 6354 case MCK_GR64_NOREX: return true; 6355 case MCK_Reg45: return true; 6356 case MCK_GR64: return true; 6357 } 6358 6359 case MCK_GR16_NOREX: 6360 return B == MCK_GR16; 6361 6362 case MCK_GR32_NOREX: 6363 switch (B) { 6364 default: return false; 6365 case MCK_Reg23: return true; 6366 case MCK_GR32: return true; 6367 case MCK_Reg20: return true; 6368 case MCK_LOW32_ADDR_ACCESS: return true; 6369 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6370 } 6371 6372 case MCK_GR8_NOREX: 6373 return B == MCK_GR8; 6374 6375 case MCK_Reg51: 6376 switch (B) { 6377 default: return false; 6378 case MCK_GR64_TC: return true; 6379 case MCK_Reg45: return true; 6380 case MCK_GR64: return true; 6381 } 6382 6383 case MCK_Reg23: 6384 switch (B) { 6385 default: return false; 6386 case MCK_Reg20: return true; 6387 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6388 } 6389 6390 case MCK_GR64_NOREX: 6391 return B == MCK_GR64; 6392 6393 case MCK_GR64_TCW64: 6394 return B == MCK_GR64; 6395 6396 case MCK_GR64_TC: 6397 return B == MCK_GR64; 6398 6399 case MCK_GR32_NOSP: 6400 switch (B) { 6401 default: return false; 6402 case MCK_GR32: return true; 6403 case MCK_Reg20: return true; 6404 case MCK_LOW32_ADDR_ACCESS: return true; 6405 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6406 } 6407 6408 case MCK_GR64_NOSP: 6409 switch (B) { 6410 default: return false; 6411 case MCK_Reg45: return true; 6412 case MCK_GR64: return true; 6413 } 6414 6415 case MCK_Reg45: 6416 return B == MCK_GR64; 6417 6418 case MCK_FR32: 6419 return B == MCK_FR32X; 6420 6421 case MCK_GR32: 6422 switch (B) { 6423 default: return false; 6424 case MCK_Reg20: return true; 6425 case MCK_LOW32_ADDR_ACCESS: return true; 6426 case MCK_LOW32_ADDR_ACCESS_RBP: return true; 6427 } 6428 6429 case MCK_VR256: 6430 return B == MCK_VR256X; 6431 6432 case MCK_VR512_0_15: 6433 return B == MCK_VR512; 6434 6435 case MCK_Reg20: 6436 return B == MCK_LOW32_ADDR_ACCESS_RBP; 6437 6438 case MCK_LOW32_ADDR_ACCESS: 6439 return B == MCK_LOW32_ADDR_ACCESS_RBP; 6440 6441 case MCK_ImmSExti64i8: 6442 switch (B) { 6443 default: return false; 6444 case MCK_ImmSExti16i8: return true; 6445 case MCK_ImmSExti32i8: return true; 6446 case MCK_ImmSExti64i32: return true; 6447 case MCK_Imm: return true; 6448 } 6449 6450 case MCK_ImmSExti16i8: 6451 switch (B) { 6452 default: return false; 6453 case MCK_ImmSExti64i32: return true; 6454 case MCK_Imm: return true; 6455 } 6456 6457 case MCK_ImmSExti32i8: 6458 return B == MCK_Imm; 6459 6460 case MCK_ImmSExti64i32: 6461 return B == MCK_Imm; 6462 6463 case MCK_AbsMem16: 6464 switch (B) { 6465 default: return false; 6466 case MCK_AbsMem: return true; 6467 case MCK_Mem: return true; 6468 } 6469 6470 case MCK_DstIdx16: 6471 switch (B) { 6472 default: return false; 6473 case MCK_Mem16: return true; 6474 case MCK_Mem: return true; 6475 } 6476 6477 case MCK_DstIdx32: 6478 switch (B) { 6479 default: return false; 6480 case MCK_Mem32: return true; 6481 case MCK_Mem: return true; 6482 } 6483 6484 case MCK_DstIdx64: 6485 switch (B) { 6486 default: return false; 6487 case MCK_Mem64: return true; 6488 case MCK_Mem: return true; 6489 } 6490 6491 case MCK_DstIdx8: 6492 switch (B) { 6493 default: return false; 6494 case MCK_Mem8: return true; 6495 case MCK_Mem: return true; 6496 } 6497 6498 case MCK_MemOffs16_16: 6499 switch (B) { 6500 default: return false; 6501 case MCK_Mem16: return true; 6502 case MCK_Mem: return true; 6503 } 6504 6505 case MCK_MemOffs16_32: 6506 switch (B) { 6507 default: return false; 6508 case MCK_Mem32: return true; 6509 case MCK_Mem: return true; 6510 } 6511 6512 case MCK_MemOffs16_8: 6513 switch (B) { 6514 default: return false; 6515 case MCK_Mem8: return true; 6516 case MCK_Mem: return true; 6517 } 6518 6519 case MCK_MemOffs32_16: 6520 switch (B) { 6521 default: return false; 6522 case MCK_Mem16: return true; 6523 case MCK_Mem: return true; 6524 } 6525 6526 case MCK_MemOffs32_32: 6527 switch (B) { 6528 default: return false; 6529 case MCK_Mem32: return true; 6530 case MCK_Mem: return true; 6531 } 6532 6533 case MCK_MemOffs32_64: 6534 switch (B) { 6535 default: return false; 6536 case MCK_Mem64: return true; 6537 case MCK_Mem: return true; 6538 } 6539 6540 case MCK_MemOffs32_8: 6541 switch (B) { 6542 default: return false; 6543 case MCK_Mem8: return true; 6544 case MCK_Mem: return true; 6545 } 6546 6547 case MCK_MemOffs64_16: 6548 switch (B) { 6549 default: return false; 6550 case MCK_Mem16: return true; 6551 case MCK_Mem: return true; 6552 } 6553 6554 case MCK_MemOffs64_32: 6555 switch (B) { 6556 default: return false; 6557 case MCK_Mem32: return true; 6558 case MCK_Mem: return true; 6559 } 6560 6561 case MCK_MemOffs64_64: 6562 switch (B) { 6563 default: return false; 6564 case MCK_Mem64: return true; 6565 case MCK_Mem: return true; 6566 } 6567 6568 case MCK_MemOffs64_8: 6569 switch (B) { 6570 default: return false; 6571 case MCK_Mem8: return true; 6572 case MCK_Mem: return true; 6573 } 6574 6575 case MCK_SrcIdx16: 6576 switch (B) { 6577 default: return false; 6578 case MCK_Mem16: return true; 6579 case MCK_Mem: return true; 6580 } 6581 6582 case MCK_SrcIdx32: 6583 switch (B) { 6584 default: return false; 6585 case MCK_Mem32: return true; 6586 case MCK_Mem: return true; 6587 } 6588 6589 case MCK_SrcIdx64: 6590 switch (B) { 6591 default: return false; 6592 case MCK_Mem64: return true; 6593 case MCK_Mem: return true; 6594 } 6595 6596 case MCK_SrcIdx8: 6597 switch (B) { 6598 default: return false; 6599 case MCK_Mem8: return true; 6600 case MCK_Mem: return true; 6601 } 6602 6603 case MCK_AbsMem: 6604 return B == MCK_Mem; 6605 6606 case MCK_Mem128: 6607 return B == MCK_Mem; 6608 6609 case MCK_Mem128_RC128: 6610 return B == MCK_Mem; 6611 6612 case MCK_Mem128_RC128X: 6613 return B == MCK_Mem; 6614 6615 case MCK_Mem128_RC256: 6616 return B == MCK_Mem; 6617 6618 case MCK_Mem128_RC256X: 6619 return B == MCK_Mem; 6620 6621 case MCK_Mem16: 6622 return B == MCK_Mem; 6623 6624 case MCK_Mem256: 6625 return B == MCK_Mem; 6626 6627 case MCK_Mem256_RC128: 6628 return B == MCK_Mem; 6629 6630 case MCK_Mem256_RC128X: 6631 return B == MCK_Mem; 6632 6633 case MCK_Mem256_RC256: 6634 return B == MCK_Mem; 6635 6636 case MCK_Mem256_RC256X: 6637 return B == MCK_Mem; 6638 6639 case MCK_Mem256_RC512: 6640 return B == MCK_Mem; 6641 6642 case MCK_Mem32: 6643 return B == MCK_Mem; 6644 6645 case MCK_Mem512: 6646 return B == MCK_Mem; 6647 6648 case MCK_Mem512_RC256X: 6649 return B == MCK_Mem; 6650 6651 case MCK_Mem512_RC512: 6652 return B == MCK_Mem; 6653 6654 case MCK_Mem64: 6655 return B == MCK_Mem; 6656 6657 case MCK_Mem64_RC128: 6658 return B == MCK_Mem; 6659 6660 case MCK_Mem64_RC128X: 6661 return B == MCK_Mem; 6662 6663 case MCK_Mem80: 6664 return B == MCK_Mem; 6665 6666 case MCK_Mem8: 6667 return B == MCK_Mem; 6668 } 6669} 6670 6671static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { 6672 X86Operand &Operand = (X86Operand&)GOp; 6673 if (Kind == InvalidMatchClass) 6674 return MCTargetAsmParser::Match_InvalidOperand; 6675 6676 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) 6677 return isSubclass(matchTokenString(Operand.getToken()), Kind) ? 6678 MCTargetAsmParser::Match_Success : 6679 MCTargetAsmParser::Match_InvalidOperand; 6680 6681 switch (Kind) { 6682 default: break; 6683 // 'AVX512RC' class 6684 case MCK_AVX512RC: { 6685 DiagnosticPredicate DP(Operand.isAVX512RC()); 6686 if (DP.isMatch()) 6687 return MCTargetAsmParser::Match_Success; 6688 break; 6689 } 6690 // 'ImmSExti64i8' class 6691 case MCK_ImmSExti64i8: { 6692 DiagnosticPredicate DP(Operand.isImmSExti64i8()); 6693 if (DP.isMatch()) 6694 return MCTargetAsmParser::Match_Success; 6695 break; 6696 } 6697 // 'ImmSExti16i8' class 6698 case MCK_ImmSExti16i8: { 6699 DiagnosticPredicate DP(Operand.isImmSExti16i8()); 6700 if (DP.isMatch()) 6701 return MCTargetAsmParser::Match_Success; 6702 break; 6703 } 6704 // 'ImmSExti32i8' class 6705 case MCK_ImmSExti32i8: { 6706 DiagnosticPredicate DP(Operand.isImmSExti32i8()); 6707 if (DP.isMatch()) 6708 return MCTargetAsmParser::Match_Success; 6709 break; 6710 } 6711 // 'ImmSExti64i32' class 6712 case MCK_ImmSExti64i32: { 6713 DiagnosticPredicate DP(Operand.isImmSExti64i32()); 6714 if (DP.isMatch()) 6715 return MCTargetAsmParser::Match_Success; 6716 break; 6717 } 6718 // 'Imm' class 6719 case MCK_Imm: { 6720 DiagnosticPredicate DP(Operand.isImm()); 6721 if (DP.isMatch()) 6722 return MCTargetAsmParser::Match_Success; 6723 break; 6724 } 6725 // 'ImmUnsignedi4' class 6726 case MCK_ImmUnsignedi4: { 6727 DiagnosticPredicate DP(Operand.isImmUnsignedi4()); 6728 if (DP.isMatch()) 6729 return MCTargetAsmParser::Match_Success; 6730 if (DP.isNearMatch()) 6731 return X86AsmParser::Match_InvalidImmUnsignedi4; 6732 break; 6733 } 6734 // 'ImmUnsignedi8' class 6735 case MCK_ImmUnsignedi8: { 6736 DiagnosticPredicate DP(Operand.isImmUnsignedi8()); 6737 if (DP.isMatch()) 6738 return MCTargetAsmParser::Match_Success; 6739 break; 6740 } 6741 // 'VK16Pair' class 6742 case MCK_VK16Pair: { 6743 DiagnosticPredicate DP(Operand.isVK16Pair()); 6744 if (DP.isMatch()) 6745 return MCTargetAsmParser::Match_Success; 6746 break; 6747 } 6748 // 'VK1Pair' class 6749 case MCK_VK1Pair: { 6750 DiagnosticPredicate DP(Operand.isVK1Pair()); 6751 if (DP.isMatch()) 6752 return MCTargetAsmParser::Match_Success; 6753 break; 6754 } 6755 // 'VK2Pair' class 6756 case MCK_VK2Pair: { 6757 DiagnosticPredicate DP(Operand.isVK2Pair()); 6758 if (DP.isMatch()) 6759 return MCTargetAsmParser::Match_Success; 6760 break; 6761 } 6762 // 'VK4Pair' class 6763 case MCK_VK4Pair: { 6764 DiagnosticPredicate DP(Operand.isVK4Pair()); 6765 if (DP.isMatch()) 6766 return MCTargetAsmParser::Match_Success; 6767 break; 6768 } 6769 // 'VK8Pair' class 6770 case MCK_VK8Pair: { 6771 DiagnosticPredicate DP(Operand.isVK8Pair()); 6772 if (DP.isMatch()) 6773 return MCTargetAsmParser::Match_Success; 6774 break; 6775 } 6776 // 'GR32orGR64' class 6777 case MCK_GR32orGR64: { 6778 DiagnosticPredicate DP(Operand.isGR32orGR64()); 6779 if (DP.isMatch()) 6780 return MCTargetAsmParser::Match_Success; 6781 break; 6782 } 6783 // 'AbsMem16' class 6784 case MCK_AbsMem16: { 6785 DiagnosticPredicate DP(Operand.isAbsMem16()); 6786 if (DP.isMatch()) 6787 return MCTargetAsmParser::Match_Success; 6788 break; 6789 } 6790 // 'DstIdx16' class 6791 case MCK_DstIdx16: { 6792 DiagnosticPredicate DP(Operand.isDstIdx16()); 6793 if (DP.isMatch()) 6794 return MCTargetAsmParser::Match_Success; 6795 break; 6796 } 6797 // 'DstIdx32' class 6798 case MCK_DstIdx32: { 6799 DiagnosticPredicate DP(Operand.isDstIdx32()); 6800 if (DP.isMatch()) 6801 return MCTargetAsmParser::Match_Success; 6802 break; 6803 } 6804 // 'DstIdx64' class 6805 case MCK_DstIdx64: { 6806 DiagnosticPredicate DP(Operand.isDstIdx64()); 6807 if (DP.isMatch()) 6808 return MCTargetAsmParser::Match_Success; 6809 break; 6810 } 6811 // 'DstIdx8' class 6812 case MCK_DstIdx8: { 6813 DiagnosticPredicate DP(Operand.isDstIdx8()); 6814 if (DP.isMatch()) 6815 return MCTargetAsmParser::Match_Success; 6816 break; 6817 } 6818 // 'MemOffs16_16' class 6819 case MCK_MemOffs16_16: { 6820 DiagnosticPredicate DP(Operand.isMemOffs16_16()); 6821 if (DP.isMatch()) 6822 return MCTargetAsmParser::Match_Success; 6823 break; 6824 } 6825 // 'MemOffs16_32' class 6826 case MCK_MemOffs16_32: { 6827 DiagnosticPredicate DP(Operand.isMemOffs16_32()); 6828 if (DP.isMatch()) 6829 return MCTargetAsmParser::Match_Success; 6830 break; 6831 } 6832 // 'MemOffs16_8' class 6833 case MCK_MemOffs16_8: { 6834 DiagnosticPredicate DP(Operand.isMemOffs16_8()); 6835 if (DP.isMatch()) 6836 return MCTargetAsmParser::Match_Success; 6837 break; 6838 } 6839 // 'MemOffs32_16' class 6840 case MCK_MemOffs32_16: { 6841 DiagnosticPredicate DP(Operand.isMemOffs32_16()); 6842 if (DP.isMatch()) 6843 return MCTargetAsmParser::Match_Success; 6844 break; 6845 } 6846 // 'MemOffs32_32' class 6847 case MCK_MemOffs32_32: { 6848 DiagnosticPredicate DP(Operand.isMemOffs32_32()); 6849 if (DP.isMatch()) 6850 return MCTargetAsmParser::Match_Success; 6851 break; 6852 } 6853 // 'MemOffs32_64' class 6854 case MCK_MemOffs32_64: { 6855 DiagnosticPredicate DP(Operand.isMemOffs32_64()); 6856 if (DP.isMatch()) 6857 return MCTargetAsmParser::Match_Success; 6858 break; 6859 } 6860 // 'MemOffs32_8' class 6861 case MCK_MemOffs32_8: { 6862 DiagnosticPredicate DP(Operand.isMemOffs32_8()); 6863 if (DP.isMatch()) 6864 return MCTargetAsmParser::Match_Success; 6865 break; 6866 } 6867 // 'MemOffs64_16' class 6868 case MCK_MemOffs64_16: { 6869 DiagnosticPredicate DP(Operand.isMemOffs64_16()); 6870 if (DP.isMatch()) 6871 return MCTargetAsmParser::Match_Success; 6872 break; 6873 } 6874 // 'MemOffs64_32' class 6875 case MCK_MemOffs64_32: { 6876 DiagnosticPredicate DP(Operand.isMemOffs64_32()); 6877 if (DP.isMatch()) 6878 return MCTargetAsmParser::Match_Success; 6879 break; 6880 } 6881 // 'MemOffs64_64' class 6882 case MCK_MemOffs64_64: { 6883 DiagnosticPredicate DP(Operand.isMemOffs64_64()); 6884 if (DP.isMatch()) 6885 return MCTargetAsmParser::Match_Success; 6886 break; 6887 } 6888 // 'MemOffs64_8' class 6889 case MCK_MemOffs64_8: { 6890 DiagnosticPredicate DP(Operand.isMemOffs64_8()); 6891 if (DP.isMatch()) 6892 return MCTargetAsmParser::Match_Success; 6893 break; 6894 } 6895 // 'SrcIdx16' class 6896 case MCK_SrcIdx16: { 6897 DiagnosticPredicate DP(Operand.isSrcIdx16()); 6898 if (DP.isMatch()) 6899 return MCTargetAsmParser::Match_Success; 6900 break; 6901 } 6902 // 'SrcIdx32' class 6903 case MCK_SrcIdx32: { 6904 DiagnosticPredicate DP(Operand.isSrcIdx32()); 6905 if (DP.isMatch()) 6906 return MCTargetAsmParser::Match_Success; 6907 break; 6908 } 6909 // 'SrcIdx64' class 6910 case MCK_SrcIdx64: { 6911 DiagnosticPredicate DP(Operand.isSrcIdx64()); 6912 if (DP.isMatch()) 6913 return MCTargetAsmParser::Match_Success; 6914 break; 6915 } 6916 // 'SrcIdx8' class 6917 case MCK_SrcIdx8: { 6918 DiagnosticPredicate DP(Operand.isSrcIdx8()); 6919 if (DP.isMatch()) 6920 return MCTargetAsmParser::Match_Success; 6921 break; 6922 } 6923 // 'AbsMem' class 6924 case MCK_AbsMem: { 6925 DiagnosticPredicate DP(Operand.isAbsMem()); 6926 if (DP.isMatch()) 6927 return MCTargetAsmParser::Match_Success; 6928 break; 6929 } 6930 // 'Mem128' class 6931 case MCK_Mem128: { 6932 DiagnosticPredicate DP(Operand.isMem128()); 6933 if (DP.isMatch()) 6934 return MCTargetAsmParser::Match_Success; 6935 break; 6936 } 6937 // 'Mem128_RC128' class 6938 case MCK_Mem128_RC128: { 6939 DiagnosticPredicate DP(Operand.isMem128_RC128()); 6940 if (DP.isMatch()) 6941 return MCTargetAsmParser::Match_Success; 6942 break; 6943 } 6944 // 'Mem128_RC128X' class 6945 case MCK_Mem128_RC128X: { 6946 DiagnosticPredicate DP(Operand.isMem128_RC128X()); 6947 if (DP.isMatch()) 6948 return MCTargetAsmParser::Match_Success; 6949 break; 6950 } 6951 // 'Mem128_RC256' class 6952 case MCK_Mem128_RC256: { 6953 DiagnosticPredicate DP(Operand.isMem128_RC256()); 6954 if (DP.isMatch()) 6955 return MCTargetAsmParser::Match_Success; 6956 break; 6957 } 6958 // 'Mem128_RC256X' class 6959 case MCK_Mem128_RC256X: { 6960 DiagnosticPredicate DP(Operand.isMem128_RC256X()); 6961 if (DP.isMatch()) 6962 return MCTargetAsmParser::Match_Success; 6963 break; 6964 } 6965 // 'Mem16' class 6966 case MCK_Mem16: { 6967 DiagnosticPredicate DP(Operand.isMem16()); 6968 if (DP.isMatch()) 6969 return MCTargetAsmParser::Match_Success; 6970 break; 6971 } 6972 // 'Mem256' class 6973 case MCK_Mem256: { 6974 DiagnosticPredicate DP(Operand.isMem256()); 6975 if (DP.isMatch()) 6976 return MCTargetAsmParser::Match_Success; 6977 break; 6978 } 6979 // 'Mem256_RC128' class 6980 case MCK_Mem256_RC128: { 6981 DiagnosticPredicate DP(Operand.isMem256_RC128()); 6982 if (DP.isMatch()) 6983 return MCTargetAsmParser::Match_Success; 6984 break; 6985 } 6986 // 'Mem256_RC128X' class 6987 case MCK_Mem256_RC128X: { 6988 DiagnosticPredicate DP(Operand.isMem256_RC128X()); 6989 if (DP.isMatch()) 6990 return MCTargetAsmParser::Match_Success; 6991 break; 6992 } 6993 // 'Mem256_RC256' class 6994 case MCK_Mem256_RC256: { 6995 DiagnosticPredicate DP(Operand.isMem256_RC256()); 6996 if (DP.isMatch()) 6997 return MCTargetAsmParser::Match_Success; 6998 break; 6999 } 7000 // 'Mem256_RC256X' class 7001 case MCK_Mem256_RC256X: { 7002 DiagnosticPredicate DP(Operand.isMem256_RC256X()); 7003 if (DP.isMatch()) 7004 return MCTargetAsmParser::Match_Success; 7005 break; 7006 } 7007 // 'Mem256_RC512' class 7008 case MCK_Mem256_RC512: { 7009 DiagnosticPredicate DP(Operand.isMem256_RC512()); 7010 if (DP.isMatch()) 7011 return MCTargetAsmParser::Match_Success; 7012 break; 7013 } 7014 // 'Mem32' class 7015 case MCK_Mem32: { 7016 DiagnosticPredicate DP(Operand.isMem32()); 7017 if (DP.isMatch()) 7018 return MCTargetAsmParser::Match_Success; 7019 break; 7020 } 7021 // 'Mem512' class 7022 case MCK_Mem512: { 7023 DiagnosticPredicate DP(Operand.isMem512()); 7024 if (DP.isMatch()) 7025 return MCTargetAsmParser::Match_Success; 7026 break; 7027 } 7028 // 'Mem512_RC256X' class 7029 case MCK_Mem512_RC256X: { 7030 DiagnosticPredicate DP(Operand.isMem512_RC256X()); 7031 if (DP.isMatch()) 7032 return MCTargetAsmParser::Match_Success; 7033 break; 7034 } 7035 // 'Mem512_RC512' class 7036 case MCK_Mem512_RC512: { 7037 DiagnosticPredicate DP(Operand.isMem512_RC512()); 7038 if (DP.isMatch()) 7039 return MCTargetAsmParser::Match_Success; 7040 break; 7041 } 7042 // 'Mem64' class 7043 case MCK_Mem64: { 7044 DiagnosticPredicate DP(Operand.isMem64()); 7045 if (DP.isMatch()) 7046 return MCTargetAsmParser::Match_Success; 7047 break; 7048 } 7049 // 'Mem64_RC128' class 7050 case MCK_Mem64_RC128: { 7051 DiagnosticPredicate DP(Operand.isMem64_RC128()); 7052 if (DP.isMatch()) 7053 return MCTargetAsmParser::Match_Success; 7054 break; 7055 } 7056 // 'Mem64_RC128X' class 7057 case MCK_Mem64_RC128X: { 7058 DiagnosticPredicate DP(Operand.isMem64_RC128X()); 7059 if (DP.isMatch()) 7060 return MCTargetAsmParser::Match_Success; 7061 break; 7062 } 7063 // 'Mem80' class 7064 case MCK_Mem80: { 7065 DiagnosticPredicate DP(Operand.isMem80()); 7066 if (DP.isMatch()) 7067 return MCTargetAsmParser::Match_Success; 7068 break; 7069 } 7070 // 'Mem8' class 7071 case MCK_Mem8: { 7072 DiagnosticPredicate DP(Operand.isMem8()); 7073 if (DP.isMatch()) 7074 return MCTargetAsmParser::Match_Success; 7075 break; 7076 } 7077 // 'Mem' class 7078 case MCK_Mem: { 7079 DiagnosticPredicate DP(Operand.isMem()); 7080 if (DP.isMatch()) 7081 return MCTargetAsmParser::Match_Success; 7082 break; 7083 } 7084 } // end switch (Kind) 7085 7086 if (Operand.isReg()) { 7087 MatchClassKind OpKind; 7088 switch (Operand.getReg()) { 7089 default: OpKind = InvalidMatchClass; break; 7090 case X86::AL: OpKind = MCK_AL; break; 7091 case X86::DL: OpKind = MCK_GR8_ABCD_L; break; 7092 case X86::CL: OpKind = MCK_CL; break; 7093 case X86::BL: OpKind = MCK_GR8_ABCD_L; break; 7094 case X86::AH: OpKind = MCK_GR8_ABCD_H; break; 7095 case X86::DH: OpKind = MCK_GR8_ABCD_H; break; 7096 case X86::CH: OpKind = MCK_GR8_ABCD_H; break; 7097 case X86::BH: OpKind = MCK_GR8_ABCD_H; break; 7098 case X86::SIL: OpKind = MCK_GR8; break; 7099 case X86::DIL: OpKind = MCK_GR8; break; 7100 case X86::BPL: OpKind = MCK_GR8; break; 7101 case X86::SPL: OpKind = MCK_GR8; break; 7102 case X86::R8B: OpKind = MCK_GR8; break; 7103 case X86::R9B: OpKind = MCK_GR8; break; 7104 case X86::R10B: OpKind = MCK_GR8; break; 7105 case X86::R11B: OpKind = MCK_GR8; break; 7106 case X86::R12B: OpKind = MCK_GR8; break; 7107 case X86::R13B: OpKind = MCK_GR8; break; 7108 case X86::R14B: OpKind = MCK_GR8; break; 7109 case X86::R15B: OpKind = MCK_GR8; break; 7110 case X86::SIH: OpKind = MCK_GRH8; break; 7111 case X86::DIH: OpKind = MCK_GRH8; break; 7112 case X86::BPH: OpKind = MCK_GRH8; break; 7113 case X86::SPH: OpKind = MCK_GRH8; break; 7114 case X86::R8BH: OpKind = MCK_GRH8; break; 7115 case X86::R9BH: OpKind = MCK_GRH8; break; 7116 case X86::R10BH: OpKind = MCK_GRH8; break; 7117 case X86::R11BH: OpKind = MCK_GRH8; break; 7118 case X86::R12BH: OpKind = MCK_GRH8; break; 7119 case X86::R13BH: OpKind = MCK_GRH8; break; 7120 case X86::R14BH: OpKind = MCK_GRH8; break; 7121 case X86::R15BH: OpKind = MCK_GRH8; break; 7122 case X86::HAX: OpKind = MCK_GRH16; break; 7123 case X86::HDX: OpKind = MCK_GRH16; break; 7124 case X86::HCX: OpKind = MCK_GRH16; break; 7125 case X86::HBX: OpKind = MCK_GRH16; break; 7126 case X86::HSI: OpKind = MCK_GRH16; break; 7127 case X86::HDI: OpKind = MCK_GRH16; break; 7128 case X86::HBP: OpKind = MCK_GRH16; break; 7129 case X86::HSP: OpKind = MCK_GRH16; break; 7130 case X86::HIP: OpKind = MCK_GRH16; break; 7131 case X86::R8WH: OpKind = MCK_GRH16; break; 7132 case X86::R9WH: OpKind = MCK_GRH16; break; 7133 case X86::R10WH: OpKind = MCK_GRH16; break; 7134 case X86::R11WH: OpKind = MCK_GRH16; break; 7135 case X86::R12WH: OpKind = MCK_GRH16; break; 7136 case X86::R13WH: OpKind = MCK_GRH16; break; 7137 case X86::R14WH: OpKind = MCK_GRH16; break; 7138 case X86::R15WH: OpKind = MCK_GRH16; break; 7139 case X86::AX: OpKind = MCK_AX; break; 7140 case X86::DX: OpKind = MCK_DX; break; 7141 case X86::CX: OpKind = MCK_GR16_ABCD; break; 7142 case X86::BX: OpKind = MCK_GR16_ABCD; break; 7143 case X86::SI: OpKind = MCK_GR16_NOREX; break; 7144 case X86::DI: OpKind = MCK_GR16_NOREX; break; 7145 case X86::BP: OpKind = MCK_GR16_NOREX; break; 7146 case X86::SP: OpKind = MCK_GR16_NOREX; break; 7147 case X86::R8W: OpKind = MCK_GR16; break; 7148 case X86::R9W: OpKind = MCK_GR16; break; 7149 case X86::R10W: OpKind = MCK_GR16; break; 7150 case X86::R11W: OpKind = MCK_GR16; break; 7151 case X86::R12W: OpKind = MCK_GR16; break; 7152 case X86::R13W: OpKind = MCK_GR16; break; 7153 case X86::R14W: OpKind = MCK_GR16; break; 7154 case X86::R15W: OpKind = MCK_GR16; break; 7155 case X86::EAX: OpKind = MCK_EAX; break; 7156 case X86::EDX: OpKind = MCK_EDX; break; 7157 case X86::ECX: OpKind = MCK_ECX; break; 7158 case X86::EBX: OpKind = MCK_EBX; break; 7159 case X86::ESI: OpKind = MCK_Reg32; break; 7160 case X86::EDI: OpKind = MCK_Reg34; break; 7161 case X86::EBP: OpKind = MCK_Reg36; break; 7162 case X86::ESP: OpKind = MCK_Reg38; break; 7163 case X86::R8D: OpKind = MCK_GR32_NOSP; break; 7164 case X86::R9D: OpKind = MCK_GR32_NOSP; break; 7165 case X86::R10D: OpKind = MCK_GR32_NOSP; break; 7166 case X86::R11D: OpKind = MCK_GR32_NOSP; break; 7167 case X86::R12D: OpKind = MCK_GR32_NOSP; break; 7168 case X86::R13D: OpKind = MCK_GR32_NOSP; break; 7169 case X86::R14D: OpKind = MCK_GR32_NOSP; break; 7170 case X86::R15D: OpKind = MCK_GR32_NOSP; break; 7171 case X86::RAX: OpKind = MCK_RAX; break; 7172 case X86::RDX: OpKind = MCK_RDX; break; 7173 case X86::RCX: OpKind = MCK_RCX; break; 7174 case X86::RBX: OpKind = MCK_RBX; break; 7175 case X86::RSI: OpKind = MCK_Reg69; break; 7176 case X86::RDI: OpKind = MCK_Reg71; break; 7177 case X86::RBP: OpKind = MCK_Reg73; break; 7178 case X86::RSP: OpKind = MCK_Reg76; break; 7179 case X86::R8: OpKind = MCK_Reg62; break; 7180 case X86::R9: OpKind = MCK_Reg62; break; 7181 case X86::R10: OpKind = MCK_Reg61; break; 7182 case X86::R11: OpKind = MCK_Reg62; break; 7183 case X86::R12: OpKind = MCK_GR64_NOSP; break; 7184 case X86::R13: OpKind = MCK_GR64_NOSP; break; 7185 case X86::R14: OpKind = MCK_GR64_NOSP; break; 7186 case X86::R15: OpKind = MCK_GR64_NOSP; break; 7187 case X86::RIP: OpKind = MCK_Reg77; break; 7188 case X86::MM0: OpKind = MCK_VR64; break; 7189 case X86::MM1: OpKind = MCK_VR64; break; 7190 case X86::MM2: OpKind = MCK_VR64; break; 7191 case X86::MM3: OpKind = MCK_VR64; break; 7192 case X86::MM4: OpKind = MCK_VR64; break; 7193 case X86::MM5: OpKind = MCK_VR64; break; 7194 case X86::MM6: OpKind = MCK_VR64; break; 7195 case X86::MM7: OpKind = MCK_VR64; break; 7196 case X86::FP0: OpKind = MCK_RFP32; break; 7197 case X86::FP1: OpKind = MCK_RFP32; break; 7198 case X86::FP2: OpKind = MCK_RFP32; break; 7199 case X86::FP3: OpKind = MCK_RFP32; break; 7200 case X86::FP4: OpKind = MCK_RFP32; break; 7201 case X86::FP5: OpKind = MCK_RFP32; break; 7202 case X86::FP6: OpKind = MCK_RFP32; break; 7203 case X86::FP7: OpKind = MCK_RFP80_7; break; 7204 case X86::XMM0: OpKind = MCK_XMM0; break; 7205 case X86::XMM1: OpKind = MCK_FR32; break; 7206 case X86::XMM2: OpKind = MCK_FR32; break; 7207 case X86::XMM3: OpKind = MCK_FR32; break; 7208 case X86::XMM4: OpKind = MCK_FR32; break; 7209 case X86::XMM5: OpKind = MCK_FR32; break; 7210 case X86::XMM6: OpKind = MCK_FR32; break; 7211 case X86::XMM7: OpKind = MCK_FR32; break; 7212 case X86::XMM8: OpKind = MCK_FR32; break; 7213 case X86::XMM9: OpKind = MCK_FR32; break; 7214 case X86::XMM10: OpKind = MCK_FR32; break; 7215 case X86::XMM11: OpKind = MCK_FR32; break; 7216 case X86::XMM12: OpKind = MCK_FR32; break; 7217 case X86::XMM13: OpKind = MCK_FR32; break; 7218 case X86::XMM14: OpKind = MCK_FR32; break; 7219 case X86::XMM15: OpKind = MCK_FR32; break; 7220 case X86::XMM16: OpKind = MCK_FR32X; break; 7221 case X86::XMM17: OpKind = MCK_FR32X; break; 7222 case X86::XMM18: OpKind = MCK_FR32X; break; 7223 case X86::XMM19: OpKind = MCK_FR32X; break; 7224 case X86::XMM20: OpKind = MCK_FR32X; break; 7225 case X86::XMM21: OpKind = MCK_FR32X; break; 7226 case X86::XMM22: OpKind = MCK_FR32X; break; 7227 case X86::XMM23: OpKind = MCK_FR32X; break; 7228 case X86::XMM24: OpKind = MCK_FR32X; break; 7229 case X86::XMM25: OpKind = MCK_FR32X; break; 7230 case X86::XMM26: OpKind = MCK_FR32X; break; 7231 case X86::XMM27: OpKind = MCK_FR32X; break; 7232 case X86::XMM28: OpKind = MCK_FR32X; break; 7233 case X86::XMM29: OpKind = MCK_FR32X; break; 7234 case X86::XMM30: OpKind = MCK_FR32X; break; 7235 case X86::XMM31: OpKind = MCK_FR32X; break; 7236 case X86::YMM0: OpKind = MCK_VR256; break; 7237 case X86::YMM1: OpKind = MCK_VR256; break; 7238 case X86::YMM2: OpKind = MCK_VR256; break; 7239 case X86::YMM3: OpKind = MCK_VR256; break; 7240 case X86::YMM4: OpKind = MCK_VR256; break; 7241 case X86::YMM5: OpKind = MCK_VR256; break; 7242 case X86::YMM6: OpKind = MCK_VR256; break; 7243 case X86::YMM7: OpKind = MCK_VR256; break; 7244 case X86::YMM8: OpKind = MCK_VR256; break; 7245 case X86::YMM9: OpKind = MCK_VR256; break; 7246 case X86::YMM10: OpKind = MCK_VR256; break; 7247 case X86::YMM11: OpKind = MCK_VR256; break; 7248 case X86::YMM12: OpKind = MCK_VR256; break; 7249 case X86::YMM13: OpKind = MCK_VR256; break; 7250 case X86::YMM14: OpKind = MCK_VR256; break; 7251 case X86::YMM15: OpKind = MCK_VR256; break; 7252 case X86::YMM16: OpKind = MCK_VR256X; break; 7253 case X86::YMM17: OpKind = MCK_VR256X; break; 7254 case X86::YMM18: OpKind = MCK_VR256X; break; 7255 case X86::YMM19: OpKind = MCK_VR256X; break; 7256 case X86::YMM20: OpKind = MCK_VR256X; break; 7257 case X86::YMM21: OpKind = MCK_VR256X; break; 7258 case X86::YMM22: OpKind = MCK_VR256X; break; 7259 case X86::YMM23: OpKind = MCK_VR256X; break; 7260 case X86::YMM24: OpKind = MCK_VR256X; break; 7261 case X86::YMM25: OpKind = MCK_VR256X; break; 7262 case X86::YMM26: OpKind = MCK_VR256X; break; 7263 case X86::YMM27: OpKind = MCK_VR256X; break; 7264 case X86::YMM28: OpKind = MCK_VR256X; break; 7265 case X86::YMM29: OpKind = MCK_VR256X; break; 7266 case X86::YMM30: OpKind = MCK_VR256X; break; 7267 case X86::YMM31: OpKind = MCK_VR256X; break; 7268 case X86::ZMM0: OpKind = MCK_VR512_0_15; break; 7269 case X86::ZMM1: OpKind = MCK_VR512_0_15; break; 7270 case X86::ZMM2: OpKind = MCK_VR512_0_15; break; 7271 case X86::ZMM3: OpKind = MCK_VR512_0_15; break; 7272 case X86::ZMM4: OpKind = MCK_VR512_0_15; break; 7273 case X86::ZMM5: OpKind = MCK_VR512_0_15; break; 7274 case X86::ZMM6: OpKind = MCK_VR512_0_15; break; 7275 case X86::ZMM7: OpKind = MCK_VR512_0_15; break; 7276 case X86::ZMM8: OpKind = MCK_VR512_0_15; break; 7277 case X86::ZMM9: OpKind = MCK_VR512_0_15; break; 7278 case X86::ZMM10: OpKind = MCK_VR512_0_15; break; 7279 case X86::ZMM11: OpKind = MCK_VR512_0_15; break; 7280 case X86::ZMM12: OpKind = MCK_VR512_0_15; break; 7281 case X86::ZMM13: OpKind = MCK_VR512_0_15; break; 7282 case X86::ZMM14: OpKind = MCK_VR512_0_15; break; 7283 case X86::ZMM15: OpKind = MCK_VR512_0_15; break; 7284 case X86::ZMM16: OpKind = MCK_VR512; break; 7285 case X86::ZMM17: OpKind = MCK_VR512; break; 7286 case X86::ZMM18: OpKind = MCK_VR512; break; 7287 case X86::ZMM19: OpKind = MCK_VR512; break; 7288 case X86::ZMM20: OpKind = MCK_VR512; break; 7289 case X86::ZMM21: OpKind = MCK_VR512; break; 7290 case X86::ZMM22: OpKind = MCK_VR512; break; 7291 case X86::ZMM23: OpKind = MCK_VR512; break; 7292 case X86::ZMM24: OpKind = MCK_VR512; break; 7293 case X86::ZMM25: OpKind = MCK_VR512; break; 7294 case X86::ZMM26: OpKind = MCK_VR512; break; 7295 case X86::ZMM27: OpKind = MCK_VR512; break; 7296 case X86::ZMM28: OpKind = MCK_VR512; break; 7297 case X86::ZMM29: OpKind = MCK_VR512; break; 7298 case X86::ZMM30: OpKind = MCK_VR512; break; 7299 case X86::ZMM31: OpKind = MCK_VR512; break; 7300 case X86::K0: OpKind = MCK_VK1; break; 7301 case X86::K1: OpKind = MCK_VK16WM; break; 7302 case X86::K2: OpKind = MCK_VK16WM; break; 7303 case X86::K3: OpKind = MCK_VK16WM; break; 7304 case X86::K4: OpKind = MCK_VK16WM; break; 7305 case X86::K5: OpKind = MCK_VK16WM; break; 7306 case X86::K6: OpKind = MCK_VK16WM; break; 7307 case X86::K7: OpKind = MCK_VK16WM; break; 7308 case X86::ST0: OpKind = MCK_ST0; break; 7309 case X86::ST1: OpKind = MCK_RST; break; 7310 case X86::ST2: OpKind = MCK_RST; break; 7311 case X86::ST3: OpKind = MCK_RST; break; 7312 case X86::ST4: OpKind = MCK_RST; break; 7313 case X86::ST5: OpKind = MCK_RST; break; 7314 case X86::ST6: OpKind = MCK_RST; break; 7315 case X86::ST7: OpKind = MCK_RST; break; 7316 case X86::FPSW: OpKind = MCK_FPCCR; break; 7317 case X86::EFLAGS: OpKind = MCK_CCR; break; 7318 case X86::DF: OpKind = MCK_DFCCR; break; 7319 case X86::CS: OpKind = MCK_CS; break; 7320 case X86::DS: OpKind = MCK_DS; break; 7321 case X86::SS: OpKind = MCK_SS; break; 7322 case X86::ES: OpKind = MCK_ES; break; 7323 case X86::FS: OpKind = MCK_FS; break; 7324 case X86::GS: OpKind = MCK_GS; break; 7325 case X86::DR0: OpKind = MCK_DEBUG_REG; break; 7326 case X86::DR1: OpKind = MCK_DEBUG_REG; break; 7327 case X86::DR2: OpKind = MCK_DEBUG_REG; break; 7328 case X86::DR3: OpKind = MCK_DEBUG_REG; break; 7329 case X86::DR4: OpKind = MCK_DEBUG_REG; break; 7330 case X86::DR5: OpKind = MCK_DEBUG_REG; break; 7331 case X86::DR6: OpKind = MCK_DEBUG_REG; break; 7332 case X86::DR7: OpKind = MCK_DEBUG_REG; break; 7333 case X86::DR8: OpKind = MCK_DEBUG_REG; break; 7334 case X86::DR9: OpKind = MCK_DEBUG_REG; break; 7335 case X86::DR10: OpKind = MCK_DEBUG_REG; break; 7336 case X86::DR11: OpKind = MCK_DEBUG_REG; break; 7337 case X86::DR12: OpKind = MCK_DEBUG_REG; break; 7338 case X86::DR13: OpKind = MCK_DEBUG_REG; break; 7339 case X86::DR14: OpKind = MCK_DEBUG_REG; break; 7340 case X86::DR15: OpKind = MCK_DEBUG_REG; break; 7341 case X86::CR0: OpKind = MCK_CONTROL_REG; break; 7342 case X86::CR1: OpKind = MCK_CONTROL_REG; break; 7343 case X86::CR2: OpKind = MCK_CONTROL_REG; break; 7344 case X86::CR3: OpKind = MCK_CONTROL_REG; break; 7345 case X86::CR4: OpKind = MCK_CONTROL_REG; break; 7346 case X86::CR5: OpKind = MCK_CONTROL_REG; break; 7347 case X86::CR6: OpKind = MCK_CONTROL_REG; break; 7348 case X86::CR7: OpKind = MCK_CONTROL_REG; break; 7349 case X86::CR8: OpKind = MCK_CONTROL_REG; break; 7350 case X86::CR9: OpKind = MCK_CONTROL_REG; break; 7351 case X86::CR10: OpKind = MCK_CONTROL_REG; break; 7352 case X86::CR11: OpKind = MCK_CONTROL_REG; break; 7353 case X86::CR12: OpKind = MCK_CONTROL_REG; break; 7354 case X86::CR13: OpKind = MCK_CONTROL_REG; break; 7355 case X86::CR14: OpKind = MCK_CONTROL_REG; break; 7356 case X86::CR15: OpKind = MCK_CONTROL_REG; break; 7357 case X86::BND0: OpKind = MCK_BNDR; break; 7358 case X86::BND1: OpKind = MCK_BNDR; break; 7359 case X86::BND2: OpKind = MCK_BNDR; break; 7360 case X86::BND3: OpKind = MCK_BNDR; break; 7361 case X86::K0_K1: OpKind = MCK_VK16PAIR; break; 7362 case X86::K2_K3: OpKind = MCK_Reg106; break; 7363 case X86::K4_K5: OpKind = MCK_Reg106; break; 7364 case X86::K6_K7: OpKind = MCK_Reg106; break; 7365 } 7366 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : 7367 getDiagKindFromRegisterClass(Kind); 7368 } 7369 7370 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) 7371 return getDiagKindFromRegisterClass(Kind); 7372 7373 return MCTargetAsmParser::Match_InvalidOperand; 7374} 7375 7376#ifndef NDEBUG 7377const char *getMatchClassName(MatchClassKind Kind) { 7378 switch (Kind) { 7379 case InvalidMatchClass: return "InvalidMatchClass"; 7380 case OptionalMatchClass: return "OptionalMatchClass"; 7381 case MCK__STAR_: return "MCK__STAR_"; 7382 case MCK__123_: return "MCK__123_"; 7383 case MCK__123_1to16_125_: return "MCK__123_1to16_125_"; 7384 case MCK__123_1to2_125_: return "MCK__123_1to2_125_"; 7385 case MCK__123_1to4_125_: return "MCK__123_1to4_125_"; 7386 case MCK__123_1to8_125_: return "MCK__123_1to8_125_"; 7387 case MCK__123_sae_125_: return "MCK__123_sae_125_"; 7388 case MCK__123_z_125_: return "MCK__123_z_125_"; 7389 case MCK__125_: return "MCK__125_"; 7390 case MCK_Reg77: return "MCK_Reg77"; 7391 case MCK_Reg76: return "MCK_Reg76"; 7392 case MCK_Reg73: return "MCK_Reg73"; 7393 case MCK_Reg71: return "MCK_Reg71"; 7394 case MCK_Reg69: return "MCK_Reg69"; 7395 case MCK_Reg38: return "MCK_Reg38"; 7396 case MCK_Reg36: return "MCK_Reg36"; 7397 case MCK_Reg34: return "MCK_Reg34"; 7398 case MCK_Reg32: return "MCK_Reg32"; 7399 case MCK_AL: return "MCK_AL"; 7400 case MCK_AX: return "MCK_AX"; 7401 case MCK_CCR: return "MCK_CCR"; 7402 case MCK_CL: return "MCK_CL"; 7403 case MCK_CS: return "MCK_CS"; 7404 case MCK_DFCCR: return "MCK_DFCCR"; 7405 case MCK_DS: return "MCK_DS"; 7406 case MCK_DX: return "MCK_DX"; 7407 case MCK_EAX: return "MCK_EAX"; 7408 case MCK_EBX: return "MCK_EBX"; 7409 case MCK_ECX: return "MCK_ECX"; 7410 case MCK_EDX: return "MCK_EDX"; 7411 case MCK_ES: return "MCK_ES"; 7412 case MCK_FPCCR: return "MCK_FPCCR"; 7413 case MCK_FS: return "MCK_FS"; 7414 case MCK_GS: return "MCK_GS"; 7415 case MCK_RAX: return "MCK_RAX"; 7416 case MCK_RBX: return "MCK_RBX"; 7417 case MCK_RCX: return "MCK_RCX"; 7418 case MCK_RDX: return "MCK_RDX"; 7419 case MCK_RFP80_7: return "MCK_RFP80_7"; 7420 case MCK_SS: return "MCK_SS"; 7421 case MCK_ST0: return "MCK_ST0"; 7422 case MCK_XMM0: return "MCK_XMM0"; 7423 case MCK_Reg75: return "MCK_Reg75"; 7424 case MCK_Reg74: return "MCK_Reg74"; 7425 case MCK_Reg72: return "MCK_Reg72"; 7426 case MCK_Reg70: return "MCK_Reg70"; 7427 case MCK_Reg68: return "MCK_Reg68"; 7428 case MCK_Reg66: return "MCK_Reg66"; 7429 case MCK_Reg64: return "MCK_Reg64"; 7430 case MCK_GR32_AD: return "MCK_GR32_AD"; 7431 case MCK_GR32_BPSP: return "MCK_GR32_BPSP"; 7432 case MCK_GR32_BSI: return "MCK_GR32_BSI"; 7433 case MCK_GR32_CB: return "MCK_GR32_CB"; 7434 case MCK_GR32_DC: return "MCK_GR32_DC"; 7435 case MCK_GR32_DIBP: return "MCK_GR32_DIBP"; 7436 case MCK_GR32_SIDI: return "MCK_GR32_SIDI"; 7437 case MCK_GR64_AD: return "MCK_GR64_AD"; 7438 case MCK_Reg106: return "MCK_Reg106"; 7439 case MCK_Reg41: return "MCK_Reg41"; 7440 case MCK_Reg15: return "MCK_Reg15"; 7441 case MCK_Reg55: return "MCK_Reg55"; 7442 case MCK_BNDR: return "MCK_BNDR"; 7443 case MCK_GR16_ABCD: return "MCK_GR16_ABCD"; 7444 case MCK_GR32_ABCD: return "MCK_GR32_ABCD"; 7445 case MCK_GR32_TC: return "MCK_GR32_TC"; 7446 case MCK_GR64_ABCD: return "MCK_GR64_ABCD"; 7447 case MCK_GR8_ABCD_H: return "MCK_GR8_ABCD_H"; 7448 case MCK_GR8_ABCD_L: return "MCK_GR8_ABCD_L"; 7449 case MCK_VK16PAIR: return "MCK_VK16PAIR"; 7450 case MCK_Reg60: return "MCK_Reg60"; 7451 case MCK_Reg49: return "MCK_Reg49"; 7452 case MCK_Reg62: return "MCK_Reg62"; 7453 case MCK_Reg50: return "MCK_Reg50"; 7454 case MCK_SEGMENT_REG: return "MCK_SEGMENT_REG"; 7455 case MCK_Reg61: return "MCK_Reg61"; 7456 case MCK_Reg58: return "MCK_Reg58"; 7457 case MCK_Reg53: return "MCK_Reg53"; 7458 case MCK_GR32_NOREX_NOSP: return "MCK_GR32_NOREX_NOSP"; 7459 case MCK_GR64_NOREX_NOSP: return "MCK_GR64_NOREX_NOSP"; 7460 case MCK_RFP32: return "MCK_RFP32"; 7461 case MCK_VK16WM: return "MCK_VK16WM"; 7462 case MCK_Reg59: return "MCK_Reg59"; 7463 case MCK_Reg56: return "MCK_Reg56"; 7464 case MCK_Reg54: return "MCK_Reg54"; 7465 case MCK_Reg44: return "MCK_Reg44"; 7466 case MCK_GR16_NOREX: return "MCK_GR16_NOREX"; 7467 case MCK_GR32_NOREX: return "MCK_GR32_NOREX"; 7468 case MCK_GR8_NOREX: return "MCK_GR8_NOREX"; 7469 case MCK_RST: return "MCK_RST"; 7470 case MCK_VK1: return "MCK_VK1"; 7471 case MCK_VR64: return "MCK_VR64"; 7472 case MCK_Reg51: return "MCK_Reg51"; 7473 case MCK_Reg23: return "MCK_Reg23"; 7474 case MCK_GR64_NOREX: return "MCK_GR64_NOREX"; 7475 case MCK_GR64_TCW64: return "MCK_GR64_TCW64"; 7476 case MCK_GR64_TC: return "MCK_GR64_TC"; 7477 case MCK_GRH8: return "MCK_GRH8"; 7478 case MCK_GR32_NOSP: return "MCK_GR32_NOSP"; 7479 case MCK_GR64_NOSP: return "MCK_GR64_NOSP"; 7480 case MCK_Reg45: return "MCK_Reg45"; 7481 case MCK_CONTROL_REG: return "MCK_CONTROL_REG"; 7482 case MCK_DEBUG_REG: return "MCK_DEBUG_REG"; 7483 case MCK_FR32: return "MCK_FR32"; 7484 case MCK_GR16: return "MCK_GR16"; 7485 case MCK_GR32: return "MCK_GR32"; 7486 case MCK_VR256: return "MCK_VR256"; 7487 case MCK_VR512_0_15: return "MCK_VR512_0_15"; 7488 case MCK_Reg20: return "MCK_Reg20"; 7489 case MCK_GR64: return "MCK_GR64"; 7490 case MCK_GRH16: return "MCK_GRH16"; 7491 case MCK_LOW32_ADDR_ACCESS: return "MCK_LOW32_ADDR_ACCESS"; 7492 case MCK_LOW32_ADDR_ACCESS_RBP: return "MCK_LOW32_ADDR_ACCESS_RBP"; 7493 case MCK_GR8: return "MCK_GR8"; 7494 case MCK_FR32X: return "MCK_FR32X"; 7495 case MCK_VR256X: return "MCK_VR256X"; 7496 case MCK_VR512: return "MCK_VR512"; 7497 case MCK_AVX512RC: return "MCK_AVX512RC"; 7498 case MCK_ImmSExti64i8: return "MCK_ImmSExti64i8"; 7499 case MCK_ImmSExti16i8: return "MCK_ImmSExti16i8"; 7500 case MCK_ImmSExti32i8: return "MCK_ImmSExti32i8"; 7501 case MCK_ImmSExti64i32: return "MCK_ImmSExti64i32"; 7502 case MCK_Imm: return "MCK_Imm"; 7503 case MCK_ImmUnsignedi4: return "MCK_ImmUnsignedi4"; 7504 case MCK_ImmUnsignedi8: return "MCK_ImmUnsignedi8"; 7505 case MCK_VK16Pair: return "MCK_VK16Pair"; 7506 case MCK_VK1Pair: return "MCK_VK1Pair"; 7507 case MCK_VK2Pair: return "MCK_VK2Pair"; 7508 case MCK_VK4Pair: return "MCK_VK4Pair"; 7509 case MCK_VK8Pair: return "MCK_VK8Pair"; 7510 case MCK_GR32orGR64: return "MCK_GR32orGR64"; 7511 case MCK_AbsMem16: return "MCK_AbsMem16"; 7512 case MCK_DstIdx16: return "MCK_DstIdx16"; 7513 case MCK_DstIdx32: return "MCK_DstIdx32"; 7514 case MCK_DstIdx64: return "MCK_DstIdx64"; 7515 case MCK_DstIdx8: return "MCK_DstIdx8"; 7516 case MCK_MemOffs16_16: return "MCK_MemOffs16_16"; 7517 case MCK_MemOffs16_32: return "MCK_MemOffs16_32"; 7518 case MCK_MemOffs16_8: return "MCK_MemOffs16_8"; 7519 case MCK_MemOffs32_16: return "MCK_MemOffs32_16"; 7520 case MCK_MemOffs32_32: return "MCK_MemOffs32_32"; 7521 case MCK_MemOffs32_64: return "MCK_MemOffs32_64"; 7522 case MCK_MemOffs32_8: return "MCK_MemOffs32_8"; 7523 case MCK_MemOffs64_16: return "MCK_MemOffs64_16"; 7524 case MCK_MemOffs64_32: return "MCK_MemOffs64_32"; 7525 case MCK_MemOffs64_64: return "MCK_MemOffs64_64"; 7526 case MCK_MemOffs64_8: return "MCK_MemOffs64_8"; 7527 case MCK_SrcIdx16: return "MCK_SrcIdx16"; 7528 case MCK_SrcIdx32: return "MCK_SrcIdx32"; 7529 case MCK_SrcIdx64: return "MCK_SrcIdx64"; 7530 case MCK_SrcIdx8: return "MCK_SrcIdx8"; 7531 case MCK_AbsMem: return "MCK_AbsMem"; 7532 case MCK_Mem128: return "MCK_Mem128"; 7533 case MCK_Mem128_RC128: return "MCK_Mem128_RC128"; 7534 case MCK_Mem128_RC128X: return "MCK_Mem128_RC128X"; 7535 case MCK_Mem128_RC256: return "MCK_Mem128_RC256"; 7536 case MCK_Mem128_RC256X: return "MCK_Mem128_RC256X"; 7537 case MCK_Mem16: return "MCK_Mem16"; 7538 case MCK_Mem256: return "MCK_Mem256"; 7539 case MCK_Mem256_RC128: return "MCK_Mem256_RC128"; 7540 case MCK_Mem256_RC128X: return "MCK_Mem256_RC128X"; 7541 case MCK_Mem256_RC256: return "MCK_Mem256_RC256"; 7542 case MCK_Mem256_RC256X: return "MCK_Mem256_RC256X"; 7543 case MCK_Mem256_RC512: return "MCK_Mem256_RC512"; 7544 case MCK_Mem32: return "MCK_Mem32"; 7545 case MCK_Mem512: return "MCK_Mem512"; 7546 case MCK_Mem512_RC256X: return "MCK_Mem512_RC256X"; 7547 case MCK_Mem512_RC512: return "MCK_Mem512_RC512"; 7548 case MCK_Mem64: return "MCK_Mem64"; 7549 case MCK_Mem64_RC128: return "MCK_Mem64_RC128"; 7550 case MCK_Mem64_RC128X: return "MCK_Mem64_RC128X"; 7551 case MCK_Mem80: return "MCK_Mem80"; 7552 case MCK_Mem8: return "MCK_Mem8"; 7553 case MCK_Mem: return "MCK_Mem"; 7554 case NumMatchClassKinds: return "NumMatchClassKinds"; 7555 } 7556 llvm_unreachable("unhandled MatchClassKind!"); 7557} 7558 7559#endif // NDEBUG 7560FeatureBitset X86AsmParser:: 7561ComputeAvailableFeatures(const FeatureBitset& FB) const { 7562 FeatureBitset Features; 7563 if ((!FB[X86::Mode64Bit])) 7564 Features.set(Feature_Not64BitModeBit); 7565 if ((FB[X86::Mode64Bit])) 7566 Features.set(Feature_In64BitModeBit); 7567 if ((FB[X86::Mode16Bit])) 7568 Features.set(Feature_In16BitModeBit); 7569 if ((!FB[X86::Mode16Bit])) 7570 Features.set(Feature_Not16BitModeBit); 7571 if ((FB[X86::Mode32Bit])) 7572 Features.set(Feature_In32BitModeBit); 7573 return Features; 7574} 7575 7576static bool checkAsmTiedOperandConstraints(const X86AsmParser&AsmParser, 7577 unsigned Kind, 7578 const OperandVector &Operands, 7579 uint64_t &ErrorInfo) { 7580 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); 7581 const uint8_t *Converter = ConversionTable[Kind]; 7582 for (const uint8_t *p = Converter; *p; p+= 2) { 7583 switch (*p) { 7584 case CVT_Tied: { 7585 unsigned OpIdx = *(p+1); 7586 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - 7587 std::begin(TiedAsmOperandTable)) && 7588 "Tied operand not found"); 7589 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; 7590 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; 7591 if (OpndNum1 != OpndNum2) { 7592 auto &SrcOp1 = Operands[OpndNum1]; 7593 auto &SrcOp2 = Operands[OpndNum2]; 7594 if (SrcOp1->isReg() && SrcOp2->isReg()) { 7595 if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) { 7596 ErrorInfo = OpndNum2; 7597 return false; 7598 } 7599 } 7600 } 7601 break; 7602 } 7603 default: 7604 break; 7605 } 7606 } 7607 return true; 7608} 7609 7610static const char *const MnemonicTable = 7611 "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004" 7612 "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq" 7613 "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005" 7614 "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge" 7615 "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005" 7616 "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b" 7617 "extrq\007blcfill\010blcfilll\010blcfillq\004blci\005blcic\006blcicl\006" 7618 "blcicq\005blcil\005blciq\006blcmsk\007blcmskl\007blcmskq\004blcs\005blc" 7619 "sl\005blcsq\007blendpd\007blendps\010blendvpd\010blendvps\007blsfill\010" 7620 "blsfilll\010blsfillq\004blsi\005blsic\006blsicl\006blsicq\005blsil\005b" 7621 "lsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl" 7622 "\005bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003b" 7623 "sf\004bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006b" 7624 "swapl\006bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003b" 7625 "tr\004btrl\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzh" 7626 "i\005bzhil\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003" 7627 "cdq\004cdqe\004clac\003clc\003cld\010cldemote\007clflush\nclflushopt\004" 7628 "clgi\003cli\003clr\004clrb\004clrl\004clrq\010clrssbsy\004clrw\004cltd\004" 7629 "cltq\004clts\004clwb\006clzero\003cmc\005cmova\006cmovae\007cmovael\007" 7630 "cmovaeq\007cmovaew\006cmoval\006cmovaq\006cmovaw\005cmovb\006cmovbe\007" 7631 "cmovbel\007cmovbeq\007cmovbew\006cmovbl\006cmovbq\006cmovbw\005cmove\006" 7632 "cmovel\006cmoveq\006cmovew\005cmovg\006cmovge\007cmovgel\007cmovgeq\007" 7633 "cmovgew\006cmovgl\006cmovgq\006cmovgw\005cmovl\006cmovle\007cmovlel\007" 7634 "cmovleq\007cmovlew\006cmovll\006cmovlq\006cmovlw\006cmovne\007cmovnel\007" 7635 "cmovneq\007cmovnew\006cmovno\007cmovnol\007cmovnoq\007cmovnow\006cmovnp" 7636 "\007cmovnpl\007cmovnpq\007cmovnpw\006cmovns\007cmovnsl\007cmovnsq\007cm" 7637 "ovnsw\005cmovo\006cmovol\006cmovoq\006cmovow\005cmovp\006cmovpl\006cmov" 7638 "pq\006cmovpw\005cmovs\006cmovsl\006cmovsq\006cmovsw\003cmp\004cmpb\004c" 7639 "mpl\005cmppd\005cmpps\004cmpq\004cmps\005cmpsb\005cmpsd\005cmpsl\005cmp" 7640 "sq\005cmpss\005cmpsw\004cmpw\007cmpxchg\ncmpxchg16b\tcmpxchg8b\010cmpxc" 7641 "hgb\010cmpxchgl\010cmpxchgq\010cmpxchgw\006comisd\006comiss\005cpuid\003" 7642 "cqo\004cqto\005crc32\006crc32b\006crc32l\006crc32q\006crc32w\002cs\010c" 7643 "vtdq2pd\010cvtdq2ps\010cvtpd2dq\010cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010" 7644 "cvtpi2ps\010cvtps2dq\010cvtps2pd\010cvtps2pi\010cvtsd2si\tcvtsd2sil\tcv" 7645 "tsd2siq\010cvtsd2ss\010cvtsi2sd\tcvtsi2sdl\tcvtsi2sdq\010cvtsi2ss\tcvts" 7646 "i2ssl\tcvtsi2ssq\010cvtss2sd\010cvtss2si\tcvtss2sil\tcvtss2siq\tcvttpd2" 7647 "dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\tcvttsd2si\ncvttsd2sil\ncvttsd2siq\t" 7648 "cvttss2si\ncvttss2sil\ncvttss2siq\003cwd\004cwde\004cwtd\004cwtl\003daa" 7649 "\003das\006data16\003dec\004decb\004decl\004decq\004decw\003div\004divb" 7650 "\004divl\005divpd\005divps\004divq\005divsd\005divss\004divw\004dppd\004" 7651 "dpps\002ds\004emms\005encls\005enclu\005enclv\007endbr32\007endbr64\006" 7652 "enqcmd\007enqcmds\005enter\002es\textractps\005extrq\005f2xm1\004fabs\004" 7653 "fadd\005faddl\005faddp\005fadds\004fbld\005fbstp\004fchs\006fcmovb\007f" 7654 "cmovbe\006fcmove\007fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006fcmovu" 7655 "\004fcom\005fcomi\005fcoml\005fcomp\006fcompi\006fcompl\006fcompp\006fc" 7656 "omps\005fcoms\004fcos\007fdecstp\004fdiv\005fdivl\005fdivp\005fdivr\006" 7657 "fdivrl\006fdivrp\006fdivrs\005fdivs\005femms\005ffree\006ffreep\005fiad" 7658 "d\006fiaddl\006fiadds\005ficom\006ficoml\006ficomp\007ficompl\007ficomp" 7659 "s\006ficoms\005fidiv\006fidivl\006fidivr\007fidivrl\007fidivrs\006fidiv" 7660 "s\004fild\005fildl\006fildll\005filds\005fimul\006fimull\006fimuls\007f" 7661 "incstp\004fist\005fistl\005fistp\006fistpl\007fistpll\006fistps\005fist" 7662 "s\006fisttp\007fisttpl\010fisttpll\007fisttps\005fisub\006fisubl\006fis" 7663 "ubr\007fisubrl\007fisubrs\006fisubs\003fld\004fld1\005fldcw\006fldenv\004" 7664 "fldl\006fldl2e\006fldl2t\006fldlg2\006fldln2\005fldpi\004flds\004fldt\004" 7665 "fldz\004fmul\005fmull\005fmulp\005fmuls\006fnclex\006fninit\004fnop\006" 7666 "fnsave\006fnstcw\007fnstenv\006fnstsw\006fpatan\005fprem\006fprem1\005f" 7667 "ptan\007frndint\006frstor\002fs\006fscale\004fsin\007fsincos\005fsqrt\003" 7668 "fst\004fstl\004fstp\005fstpl\005fstps\005fstpt\004fsts\004fsub\005fsubl" 7669 "\005fsubp\005fsubr\006fsubrl\006fsubrp\006fsubrs\005fsubs\004ftst\005fu" 7670 "com\006fucomi\006fucomp\007fucompi\007fucompp\004fxam\004fxch\007fxrsto" 7671 "r\tfxrstor64\006fxsave\010fxsave64\007fxtract\005fyl2x\007fyl2xp1\006ge" 7672 "tsec\020gf2p8affineinvqb\015gf2p8affineqb\tgf2p8mulb\002gs\006haddpd\006" 7673 "haddps\003hlt\006hsubpd\006hsubps\004idiv\005idivb\005idivl\005idivq\005" 7674 "idivw\004imul\005imulb\005imull\005imulq\005imulw\002in\003inb\003inc\004" 7675 "incb\004incl\004incq\007incsspd\007incsspq\004incw\003inl\003ins\004ins" 7676 "b\004insd\010insertps\007insertq\004insl\004insw\003int\004int3\004into" 7677 "\004invd\006invept\006invlpg\007invlpga\007invpcid\007invvpid\003inw\004" 7678 "iret\005iretd\005iretl\005iretq\005iretw\002ja\003jae\002jb\003jbe\004j" 7679 "cxz\002je\005jecxz\002jg\003jge\002jl\003jle\003jmp\004jmpl\004jmpq\004" 7680 "jmpw\003jne\003jno\003jnp\003jns\002jo\002jp\005jrcxz\002js\005kaddb\005" 7681 "kaddd\005kaddq\005kaddw\005kandb\005kandd\006kandnb\006kandnd\006kandnq" 7682 "\006kandnw\005kandq\005kandw\005kmovb\005kmovd\005kmovq\005kmovw\005kno" 7683 "tb\005knotd\005knotq\005knotw\004korb\004kord\004korq\010kortestb\010ko" 7684 "rtestd\010kortestq\010kortestw\004korw\010kshiftlb\010kshiftld\010kshif" 7685 "tlq\010kshiftlw\010kshiftrb\010kshiftrd\010kshiftrq\010kshiftrw\006ktes" 7686 "tb\006ktestd\006ktestq\006ktestw\010kunpckbw\010kunpckdq\010kunpckwd\006" 7687 "kxnorb\006kxnord\006kxnorq\006kxnorw\005kxorb\005kxord\005kxorq\005kxor" 7688 "w\004lahf\003lar\004larl\004larq\004larw\005lcall\006lcalll\006lcallq\006" 7689 "lcallw\005lddqu\007ldmxcsr\003lds\004ldsl\004ldsw\003lea\004leal\004lea" 7690 "q\005leave\004leaw\003les\004lesl\004lesw\006lfence\003lfs\004lfsl\004l" 7691 "fsq\004lfsw\004lgdt\005lgdtd\005lgdtl\005lgdtq\005lgdtw\003lgs\004lgsl\004" 7692 "lgsq\004lgsw\004lidt\005lidtd\005lidtl\005lidtq\005lidtw\004ljmp\005ljm" 7693 "pl\005ljmpq\005ljmpw\004lldt\005lldtw\006llwpcb\004lmsw\005lmsww\004loc" 7694 "k\004lods\005lodsb\005lodsd\005lodsl\005lodsq\005lodsw\004loop\005loope" 7695 "\006loopne\005lretl\005lretq\005lretw\003lsl\004lsll\004lslq\004lslw\003" 7696 "lss\004lssl\004lssq\004lssw\003ltr\004ltrw\006lwpins\006lwpval\005lzcnt" 7697 "\006lzcntl\006lzcntq\006lzcntw\nmaskmovdqu\010maskmovq\005maxpd\005maxp" 7698 "s\005maxsd\005maxss\006mfence\005minpd\005minps\005minsd\005minss\007mo" 7699 "nitor\010monitorx\007montmul\003mov\005mov.s\006movabs\007movabsb\007mo" 7700 "vabsl\007movabsq\007movabsw\006movapd\010movapd.s\006movaps\010movaps.s" 7701 "\004movb\006movb.s\005movbe\006movbel\006movbeq\006movbew\004movd\007mo" 7702 "vddup\tmovdir64b\007movdiri\007movdq2q\006movdqa\010movdqa.s\006movdqu\010" 7703 "movdqu.s\007movhlps\006movhpd\006movhps\004movl\006movl.s\007movlhps\006" 7704 "movlpd\006movlps\010movmskpd\010movmskps\007movntdq\010movntdqa\006movn" 7705 "ti\007movntil\007movntiq\007movntpd\007movntps\006movntq\007movntsd\007" 7706 "movntss\004movq\006movq.s\007movq2dq\004movs\005movsb\006movsbl\006movs" 7707 "bq\006movsbw\005movsd\007movsd.s\010movshdup\005movsl\010movsldup\006mo" 7708 "vslq\005movsq\005movss\007movss.s\005movsw\006movswl\006movswq\005movsx" 7709 "\006movsxd\006movupd\010movupd.s\006movups\010movups.s\004movw\006movw." 7710 "s\006movzbl\006movzbq\006movzbw\006movzwl\006movzwq\005movzx\007mpsadbw" 7711 "\003mul\004mulb\004mull\005mulpd\005mulps\004mulq\005mulsd\005mulss\004" 7712 "mulw\004mulx\005mulxl\005mulxq\005mwait\006mwaitx\003neg\004negb\004neg" 7713 "l\004negq\004negw\003nop\004nopl\004nopq\004nopw\003not\004notb\004notl" 7714 "\004notq\004notw\002or\003orb\003orl\004orpd\004orps\003orq\003orw\003o" 7715 "ut\004outb\004outl\004outs\005outsb\005outsd\005outsl\005outsw\004outw\005" 7716 "pabsb\005pabsd\005pabsw\010packssdw\010packsswb\010packusdw\010packuswb" 7717 "\005paddb\005paddd\005paddq\006paddsb\006paddsw\007paddusb\007paddusw\005" 7718 "paddw\007palignr\004pand\005pandn\005pause\005pavgb\007pavgusb\005pavgw" 7719 "\010pblendvb\007pblendw\014pclmulhqhqdq\014pclmulhqlqdq\014pclmullqhqdq" 7720 "\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007pcmpeqd\007pcmpeqq\007pcmpeqw" 7721 "\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpgtd\007pcmpgtq\007pcmpgtw\tpcm" 7722 "pistri\tpcmpistrm\007pconfig\004pdep\005pdepl\005pdepq\004pext\005pextl" 7723 "\005pextq\006pextrb\006pextrd\006pextrq\006pextrw\005pf2id\005pf2iw\005" 7724 "pfacc\005pfadd\007pfcmpeq\007pfcmpge\007pfcmpgt\005pfmax\005pfmin\005pf" 7725 "mul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpit1\010pfrcpit2\010pfrsqit1\007" 7726 "pfrsqrt\005pfsub\006pfsubr\006phaddd\007phaddsw\006phaddw\nphminposuw\006" 7727 "phsubd\007phsubsw\006phsubw\005pi2fd\005pi2fw\006pinsrb\006pinsrd\006pi" 7728 "nsrq\006pinsrw\tpmaddubsw\007pmaddwd\006pmaxsb\006pmaxsd\006pmaxsw\006p" 7729 "maxub\006pmaxud\006pmaxuw\006pminsb\006pminsd\006pminsw\006pminub\006pm" 7730 "inud\006pminuw\010pmovmskb\010pmovsxbd\010pmovsxbq\010pmovsxbw\010pmovs" 7731 "xdq\010pmovsxwd\010pmovsxwq\010pmovzxbd\010pmovzxbq\010pmovzxbw\010pmov" 7732 "zxdq\010pmovzxwd\010pmovzxwq\006pmuldq\010pmulhrsw\007pmulhrw\007pmulhu" 7733 "w\006pmulhw\006pmulld\006pmullw\007pmuludq\003pop\005popal\005popaw\006" 7734 "popcnt\007popcntl\007popcntq\007popcntw\004popf\005popfd\005popfl\005po" 7735 "pfq\005popfw\004popl\004popq\004popw\003por\010prefetch\013prefetchnta\n" 7736 "prefetcht0\nprefetcht1\nprefetcht2\tprefetchw\013prefetchwt1\006psadbw\006" 7737 "pshufb\006pshufd\007pshufhw\007pshuflw\006pshufw\006psignb\006psignd\006" 7738 "psignw\005pslld\006pslldq\005psllq\005psllw\005psrad\005psraw\005psrld\006" 7739 "psrldq\005psrlq\005psrlw\005psubb\005psubd\005psubq\006psubsb\006psubsw" 7740 "\007psubusb\007psubusw\005psubw\006pswapd\005ptest\007ptwrite\010ptwrit" 7741 "el\010ptwriteq\tpunpckhbw\tpunpckhdq\npunpckhqdq\tpunpckhwd\tpunpcklbw\t" 7742 "punpckldq\npunpcklqdq\tpunpcklwd\004push\006pushal\006pushaw\005pushf\006" 7743 "pushfd\006pushfl\006pushfq\006pushfw\005pushl\005pushq\005pushw\004pxor" 7744 "\003rcl\004rclb\004rcll\004rclq\004rclw\005rcpps\005rcpss\003rcr\004rcr" 7745 "b\004rcrl\004rcrq\004rcrw\010rdfsbase\trdfsbasel\trdfsbaseq\010rdgsbase" 7746 "\trdgsbasel\trdgsbaseq\005rdmsr\005rdpid\006rdpkru\005rdpmc\006rdrand\007" 7747 "rdrandl\007rdrandq\007rdrandw\006rdseed\007rdseedl\007rdseedq\007rdseed" 7748 "w\006rdsspd\006rdsspq\005rdtsc\006rdtscp\003rep\005repne\003ret\004retf" 7749 "\005retfq\004retl\004retq\004retw\005rex64\003rol\004rolb\004roll\004ro" 7750 "lq\004rolw\003ror\004rorb\004rorl\004rorq\004rorw\004rorx\005rorxl\005r" 7751 "orxq\007roundpd\007roundps\007roundsd\007roundss\003rsm\007rsqrtps\007r" 7752 "sqrtss\010rstorssp\004sahf\004salc\003sar\004sarb\004sarl\004sarq\004sa" 7753 "rw\004sarx\005sarxl\005sarxq\013saveprevssp\003sbb\004sbbb\004sbbl\004s" 7754 "bbq\004sbbw\004scas\005scasb\005scasd\005scasl\005scasq\005scasw\004set" 7755 "a\005setae\004setb\005setbe\004sete\004setg\005setge\004setl\005setle\005" 7756 "setne\005setno\005setnp\005setns\004seto\004setp\004sets\010setssbsy\006" 7757 "sfence\004sgdt\005sgdtd\005sgdtl\005sgdtq\005sgdtw\010sha1msg1\010sha1m" 7758 "sg2\tsha1nexte\tsha1rnds4\nsha256msg1\nsha256msg2\013sha256rnds2\003shl" 7759 "\004shlb\004shld\005shldl\005shldq\005shldw\004shll\004shlq\004shlw\004" 7760 "shlx\005shlxl\005shlxq\003shr\004shrb\004shrd\005shrdl\005shrdq\005shrd" 7761 "w\004shrl\004shrq\004shrw\004shrx\005shrxl\005shrxq\006shufpd\006shufps" 7762 "\004sidt\005sidtd\005sidtl\005sidtq\005sidtw\006skinit\004sldt\005sldtl" 7763 "\005sldtq\005sldtw\006slwpcb\004smsw\005smswl\005smswq\005smsww\006sqrt" 7764 "pd\006sqrtps\006sqrtsd\006sqrtss\002ss\004stac\003stc\003std\004stgi\003" 7765 "sti\007stmxcsr\004stos\005stosb\005stosd\005stosl\005stosq\005stosw\003" 7766 "str\004strl\004strq\004strw\003sub\004subb\004subl\005subpd\005subps\004" 7767 "subq\005subsd\005subss\004subw\006swapgs\007syscall\010sysenter\007syse" 7768 "xit\010sysexitl\010sysexitq\006sysret\007sysretl\007sysretq\006t1mskc\007" 7769 "t1mskcl\007t1mskcq\004test\005testb\005testl\005testq\005testw\006tpaus" 7770 "e\005tzcnt\006tzcntl\006tzcntq\006tzcntw\005tzmsk\006tzmskl\006tzmskq\007" 7771 "ucomisd\007ucomiss\003ud2\004ud2b\010umonitor\006umwait\010unpckhpd\010" 7772 "unpckhps\010unpcklpd\010unpcklps\tv4fmaddps\tv4fmaddss\nv4fnmaddps\nv4f" 7773 "nmaddss\006vaddpd\006vaddps\006vaddsd\006vaddss\tvaddsubpd\tvaddsubps\007" 7774 "vaesdec\013vaesdeclast\007vaesenc\013vaesenclast\007vaesimc\020vaeskeyg" 7775 "enassist\007valignd\007valignq\007vandnpd\007vandnps\006vandpd\006vandp" 7776 "s\tvblendmpd\tvblendmps\010vblendpd\010vblendps\tvblendvpd\tvblendvps\016" 7777 "vbroadcastf128\017vbroadcastf32x2\017vbroadcastf32x4\017vbroadcastf32x8" 7778 "\017vbroadcastf64x2\017vbroadcastf64x4\016vbroadcasti128\017vbroadcasti" 7779 "32x2\017vbroadcasti32x4\017vbroadcasti32x8\017vbroadcasti64x2\017vbroad" 7780 "casti64x4\014vbroadcastsd\014vbroadcastss\006vcmppd\006vcmpps\006vcmpsd" 7781 "\006vcmpss\007vcomisd\007vcomiss\013vcompresspd\013vcompressps\tvcvtdq2" 7782 "pd\tvcvtdq2ps\016vcvtne2ps2bf16\015vcvtneps2bf16\016vcvtneps2bf16x\016v" 7783 "cvtneps2bf16y\tvcvtpd2dq\nvcvtpd2dqx\nvcvtpd2dqy\tvcvtpd2ps\nvcvtpd2psx" 7784 "\nvcvtpd2psy\tvcvtpd2qq\nvcvtpd2udq\013vcvtpd2udqx\013vcvtpd2udqy\nvcvt" 7785 "pd2uqq\tvcvtph2ps\tvcvtps2dq\tvcvtps2pd\tvcvtps2ph\tvcvtps2qq\nvcvtps2u" 7786 "dq\nvcvtps2uqq\tvcvtqq2pd\tvcvtqq2ps\nvcvtqq2psx\nvcvtqq2psy\tvcvtsd2si" 7787 "\nvcvtsd2sil\nvcvtsd2siq\tvcvtsd2ss\nvcvtsd2usi\013vcvtsd2usil\013vcvts" 7788 "d2usiq\tvcvtsi2sd\nvcvtsi2sdl\nvcvtsi2sdq\tvcvtsi2ss\nvcvtsi2ssl\nvcvts" 7789 "i2ssq\tvcvtss2sd\tvcvtss2si\nvcvtss2sil\nvcvtss2siq\nvcvtss2usi\013vcvt" 7790 "ss2usil\013vcvtss2usiq\nvcvttpd2dq\013vcvttpd2dqx\013vcvttpd2dqy\nvcvtt" 7791 "pd2qq\013vcvttpd2udq\014vcvttpd2udqx\014vcvttpd2udqy\013vcvttpd2uqq\nvc" 7792 "vttps2dq\nvcvttps2qq\013vcvttps2udq\013vcvttps2uqq\nvcvttsd2si\013vcvtt" 7793 "sd2sil\013vcvttsd2siq\013vcvttsd2usi\014vcvttsd2usil\014vcvttsd2usiq\nv" 7794 "cvttss2si\013vcvttss2sil\013vcvttss2siq\013vcvttss2usi\014vcvttss2usil\014" 7795 "vcvttss2usiq\nvcvtudq2pd\nvcvtudq2ps\nvcvtuqq2pd\nvcvtuqq2ps\013vcvtuqq" 7796 "2psx\013vcvtuqq2psy\nvcvtusi2sd\013vcvtusi2sdl\013vcvtusi2sdq\nvcvtusi2" 7797 "ss\013vcvtusi2ssl\013vcvtusi2ssq\tvdbpsadbw\006vdivpd\006vdivps\006vdiv" 7798 "sd\006vdivss\tvdpbf16ps\005vdppd\005vdpps\004verr\004verw\007vexp2pd\007" 7799 "vexp2ps\tvexpandpd\tvexpandps\014vextractf128\015vextractf32x4\015vextr" 7800 "actf32x8\015vextractf64x2\015vextractf64x4\014vextracti128\015vextracti" 7801 "32x4\015vextracti32x8\015vextracti64x2\015vextracti64x4\nvextractps\013" 7802 "vfixupimmpd\013vfixupimmps\013vfixupimmsd\013vfixupimmss\013vfmadd132pd" 7803 "\013vfmadd132ps\013vfmadd132sd\013vfmadd132ss\013vfmadd213pd\013vfmadd2" 7804 "13ps\013vfmadd213sd\013vfmadd213ss\013vfmadd231pd\013vfmadd231ps\013vfm" 7805 "add231sd\013vfmadd231ss\010vfmaddpd\010vfmaddps\010vfmaddsd\010vfmaddss" 7806 "\016vfmaddsub132pd\016vfmaddsub132ps\016vfmaddsub213pd\016vfmaddsub213p" 7807 "s\016vfmaddsub231pd\016vfmaddsub231ps\013vfmaddsubpd\013vfmaddsubps\013" 7808 "vfmsub132pd\013vfmsub132ps\013vfmsub132sd\013vfmsub132ss\013vfmsub213pd" 7809 "\013vfmsub213ps\013vfmsub213sd\013vfmsub213ss\013vfmsub231pd\013vfmsub2" 7810 "31ps\013vfmsub231sd\013vfmsub231ss\016vfmsubadd132pd\016vfmsubadd132ps\016" 7811 "vfmsubadd213pd\016vfmsubadd213ps\016vfmsubadd231pd\016vfmsubadd231ps\013" 7812 "vfmsubaddpd\013vfmsubaddps\010vfmsubpd\010vfmsubps\010vfmsubsd\010vfmsu" 7813 "bss\014vfnmadd132pd\014vfnmadd132ps\014vfnmadd132sd\014vfnmadd132ss\014" 7814 "vfnmadd213pd\014vfnmadd213ps\014vfnmadd213sd\014vfnmadd213ss\014vfnmadd" 7815 "231pd\014vfnmadd231ps\014vfnmadd231sd\014vfnmadd231ss\tvfnmaddpd\tvfnma" 7816 "ddps\tvfnmaddsd\tvfnmaddss\014vfnmsub132pd\014vfnmsub132ps\014vfnmsub13" 7817 "2sd\014vfnmsub132ss\014vfnmsub213pd\014vfnmsub213ps\014vfnmsub213sd\014" 7818 "vfnmsub213ss\014vfnmsub231pd\014vfnmsub231ps\014vfnmsub231sd\014vfnmsub" 7819 "231ss\tvfnmsubpd\tvfnmsubps\tvfnmsubsd\tvfnmsubss\nvfpclasspd\013vfpcla" 7820 "sspdx\013vfpclasspdy\013vfpclasspdz\nvfpclassps\013vfpclasspsx\013vfpcl" 7821 "asspsy\013vfpclasspsz\nvfpclasssd\nvfpclassss\007vfrczpd\007vfrczps\007" 7822 "vfrczsd\007vfrczss\nvgatherdpd\nvgatherdps\015vgatherpf0dpd\015vgatherp" 7823 "f0dps\015vgatherpf0qpd\015vgatherpf0qps\015vgatherpf1dpd\015vgatherpf1d" 7824 "ps\015vgatherpf1qpd\015vgatherpf1qps\nvgatherqpd\nvgatherqps\tvgetexppd" 7825 "\tvgetexpps\tvgetexpsd\tvgetexpss\nvgetmantpd\nvgetmantps\nvgetmantsd\n" 7826 "vgetmantss\021vgf2p8affineinvqb\016vgf2p8affineqb\nvgf2p8mulb\007vhaddp" 7827 "d\007vhaddps\007vhsubpd\007vhsubps\013vinsertf128\014vinsertf32x4\014vi" 7828 "nsertf32x8\014vinsertf64x2\014vinsertf64x4\013vinserti128\014vinserti32" 7829 "x4\014vinserti32x8\014vinserti64x2\014vinserti64x4\tvinsertps\006vlddqu" 7830 "\010vldmxcsr\013vmaskmovdqu\nvmaskmovpd\nvmaskmovps\006vmaxpd\006vmaxps" 7831 "\006vmaxsd\006vmaxss\006vmcall\007vmclear\006vmfunc\006vminpd\006vminps" 7832 "\006vminsd\006vminss\010vmlaunch\006vmload\007vmmcall\007vmovapd\tvmova" 7833 "pd.s\007vmovaps\tvmovaps.s\005vmovd\010vmovddup\007vmovdqa\tvmovdqa.s\t" 7834 "vmovdqa32\013vmovdqa32.s\tvmovdqa64\013vmovdqa64.s\007vmovdqu\tvmovdqu." 7835 "s\tvmovdqu16\013vmovdqu16.s\tvmovdqu32\013vmovdqu32.s\tvmovdqu64\013vmo" 7836 "vdqu64.s\010vmovdqu8\nvmovdqu8.s\010vmovhlps\007vmovhpd\007vmovhps\010v" 7837 "movlhps\007vmovlpd\007vmovlps\tvmovmskpd\tvmovmskps\010vmovntdq\tvmovnt" 7838 "dqa\010vmovntpd\010vmovntps\005vmovq\007vmovq.s\006vmovsd\010vmovsd.s\t" 7839 "vmovshdup\tvmovsldup\006vmovss\010vmovss.s\007vmovupd\tvmovupd.s\007vmo" 7840 "vups\tvmovups.s\010vmpsadbw\007vmptrld\007vmptrst\006vmread\007vmreadl\007" 7841 "vmreadq\010vmresume\005vmrun\006vmsave\006vmulpd\006vmulps\006vmulsd\006" 7842 "vmulss\007vmwrite\010vmwritel\010vmwriteq\006vmxoff\005vmxon\005vorpd\005" 7843 "vorps\015vp2intersectd\015vp2intersectq\tvp4dpwssd\nvp4dpwssds\006vpabs" 7844 "b\006vpabsd\006vpabsq\006vpabsw\tvpackssdw\tvpacksswb\tvpackusdw\tvpack" 7845 "uswb\006vpaddb\006vpaddd\006vpaddq\007vpaddsb\007vpaddsw\010vpaddusb\010" 7846 "vpaddusw\006vpaddw\010vpalignr\005vpand\006vpandd\006vpandn\007vpandnd\007" 7847 "vpandnq\006vpandq\006vpavgb\006vpavgw\010vpblendd\tvpblendmb\tvpblendmd" 7848 "\tvpblendmq\tvpblendmw\tvpblendvb\010vpblendw\014vpbroadcastb\014vpbroa" 7849 "dcastd\017vpbroadcastmb2q\017vpbroadcastmw2d\014vpbroadcastq\014vpbroad" 7850 "castw\015vpclmulhqhqdq\015vpclmulhqlqdq\015vpclmullqhqdq\015vpclmullqlq" 7851 "dq\nvpclmulqdq\006vpcmov\006vpcmpb\006vpcmpd\010vpcmpeqb\010vpcmpeqd\010" 7852 "vpcmpeqq\010vpcmpeqw\nvpcmpestri\nvpcmpestrm\010vpcmpgtb\010vpcmpgtd\010" 7853 "vpcmpgtq\010vpcmpgtw\nvpcmpistri\nvpcmpistrm\006vpcmpq\007vpcmpub\007vp" 7854 "cmpud\007vpcmpuq\007vpcmpuw\006vpcmpw\006vpcomb\006vpcomd\013vpcompress" 7855 "b\013vpcompressd\013vpcompressq\013vpcompressw\006vpcomq\007vpcomub\007" 7856 "vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vpconflictd\013vpconflictq\010" 7857 "vpdpbusd\tvpdpbusds\010vpdpwssd\tvpdpwssds\nvperm2f128\nvperm2i128\006v" 7858 "permb\006vpermd\010vpermi2b\010vpermi2d\tvpermi2pd\tvpermi2ps\010vpermi" 7859 "2q\010vpermi2w\nvpermil2pd\nvpermil2ps\tvpermilpd\tvpermilps\007vpermpd" 7860 "\007vpermps\006vpermq\010vpermt2b\010vpermt2d\tvpermt2pd\tvpermt2ps\010" 7861 "vpermt2q\010vpermt2w\006vpermw\tvpexpandb\tvpexpandd\tvpexpandq\tvpexpa" 7862 "ndw\007vpextrb\007vpextrd\007vpextrq\007vpextrw\nvpgatherdd\nvpgatherdq" 7863 "\nvpgatherqd\nvpgatherqq\010vphaddbd\010vphaddbq\010vphaddbw\007vphaddd" 7864 "\010vphadddq\010vphaddsw\tvphaddubd\tvphaddubq\tvphaddubw\tvphaddudq\tv" 7865 "phadduwd\tvphadduwq\007vphaddw\010vphaddwd\010vphaddwq\013vphminposuw\010" 7866 "vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007vphsubw\010vphsubwd\007v" 7867 "pinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplzcntd\010vplzcntq\010vpma" 7868 "csdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssdqh\nvpmacssdql\tvpmacssw" 7869 "d\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcsswd\tvpmadcswd\013vpmadd52" 7870 "huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpmaskmovd\nvpmaskmovq\007v" 7871 "pmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpmaxub\007vpmaxud\007vpmaxu" 7872 "q\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007vpminsw\007vpminub\007" 7873 "vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmovd2m\007vpmovdb\007vpm" 7874 "ovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmovm2w\tvpmovmskb\010vpmo" 7875 "vq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb\010vpmovsdw\010vpmovs" 7876 "qb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd\tvpmovsxbq\tvpmovsxbw" 7877 "\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpmovusdw\tvpmovusqb\tvpm" 7878 "ovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmovwb\tvpmovzxbd\tvpmovzx" 7879 "bq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007vpmuldq\tvpmulhrsw\010" 7880 "vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmullw\016vpmultishiftqb\010" 7881 "vpmuludq\010vpopcntb\010vpopcntd\010vpopcntq\010vpopcntw\004vpor\005vpo" 7882 "rd\005vporq\006vpperm\006vprold\006vprolq\007vprolvd\007vprolvq\006vpro" 7883 "rd\006vprorq\007vprorvd\007vprorvq\006vprotb\006vprotd\006vprotq\006vpr" 7884 "otw\007vpsadbw\013vpscatterdd\013vpscatterdq\013vpscatterqd\013vpscatte" 7885 "rqq\006vpshab\006vpshad\006vpshaq\006vpshaw\006vpshlb\006vpshld\007vpsh" 7886 "ldd\007vpshldq\010vpshldvd\010vpshldvq\010vpshldvw\007vpshldw\006vpshlq" 7887 "\006vpshlw\007vpshrdd\007vpshrdq\010vpshrdvd\010vpshrdvq\010vpshrdvw\007" 7888 "vpshrdw\007vpshufb\014vpshufbitqmb\007vpshufd\010vpshufhw\010vpshuflw\007" 7889 "vpsignb\007vpsignd\007vpsignw\006vpslld\007vpslldq\006vpsllq\007vpsllvd" 7890 "\007vpsllvq\007vpsllvw\006vpsllw\006vpsrad\006vpsraq\007vpsravd\007vpsr" 7891 "avq\007vpsravw\006vpsraw\006vpsrld\007vpsrldq\006vpsrlq\007vpsrlvd\007v" 7892 "psrlvq\007vpsrlvw\006vpsrlw\006vpsubb\006vpsubd\006vpsubq\007vpsubsb\007" 7893 "vpsubsw\010vpsubusb\010vpsubusw\006vpsubw\nvpternlogd\nvpternlogq\006vp" 7894 "test\010vptestmb\010vptestmd\010vptestmq\010vptestmw\tvptestnmb\tvptest" 7895 "nmd\tvptestnmq\tvptestnmw\nvpunpckhbw\nvpunpckhdq\013vpunpckhqdq\nvpunp" 7896 "ckhwd\nvpunpcklbw\nvpunpckldq\013vpunpcklqdq\nvpunpcklwd\005vpxor\006vp" 7897 "xord\006vpxorq\010vrangepd\010vrangeps\010vrangesd\010vrangess\010vrcp1" 7898 "4pd\010vrcp14ps\010vrcp14sd\010vrcp14ss\010vrcp28pd\010vrcp28ps\010vrcp" 7899 "28sd\010vrcp28ss\006vrcpps\006vrcpss\tvreducepd\tvreduceps\tvreducesd\t" 7900 "vreducess\013vrndscalepd\013vrndscaleps\013vrndscalesd\013vrndscaless\010" 7901 "vroundpd\010vroundps\010vroundsd\010vroundss\nvrsqrt14pd\nvrsqrt14ps\nv" 7902 "rsqrt14sd\nvrsqrt14ss\nvrsqrt28pd\nvrsqrt28ps\nvrsqrt28sd\nvrsqrt28ss\010" 7903 "vrsqrtps\010vrsqrtss\tvscalefpd\tvscalefps\tvscalefsd\tvscalefss\013vsc" 7904 "atterdpd\013vscatterdps\016vscatterpf0dpd\016vscatterpf0dps\016vscatter" 7905 "pf0qpd\016vscatterpf0qps\016vscatterpf1dpd\016vscatterpf1dps\016vscatte" 7906 "rpf1qpd\016vscatterpf1qps\013vscatterqpd\013vscatterqps\nvshuff32x4\nvs" 7907 "huff64x2\nvshufi32x4\nvshufi64x2\007vshufpd\007vshufps\007vsqrtpd\007vs" 7908 "qrtps\007vsqrtsd\007vsqrtss\010vstmxcsr\006vsubpd\006vsubps\006vsubsd\006" 7909 "vsubss\007vtestpd\007vtestps\010vucomisd\010vucomiss\tvunpckhpd\tvunpck" 7910 "hps\tvunpcklpd\tvunpcklps\006vxorpd\006vxorps\010vzeroall\nvzeroupper\004" 7911 "wait\006wbinvd\010wbnoinvd\010wrfsbase\twrfsbasel\twrfsbaseq\010wrgsbas" 7912 "e\twrgsbasel\twrgsbaseq\005wrmsr\006wrpkru\005wrssd\005wrssq\006wrussd\006" 7913 "wrussq\006xabort\010xacquire\004xadd\005xaddb\005xaddl\005xaddq\005xadd" 7914 "w\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xchgw\txcryptcbc\txcr" 7915 "yptcfb\txcryptctr\txcryptecb\txcryptofb\004xend\006xgetbv\005xlatb\003x" 7916 "or\004xorb\004xorl\005xorpd\005xorps\004xorq\004xorw\010xrelease\006xrs" 7917 "tor\010xrstor64\007xrstors\txrstors64\005xsave\007xsave64\006xsavec\010" 7918 "xsavec64\010xsaveopt\nxsaveopt64\006xsaves\010xsaves64\006xsetbv\005xsh" 7919 "a1\007xsha256\006xstore\txstorerng\005xtest"; 7920 7921// Feature bitsets. 7922enum : uint8_t { 7923 AMFBS_None, 7924 AMFBS_In16BitMode, 7925 AMFBS_In32BitMode, 7926 AMFBS_In64BitMode, 7927 AMFBS_Not16BitMode, 7928 AMFBS_Not64BitMode, 7929}; 7930 7931static constexpr FeatureBitset FeatureBitsets[] = { 7932 {}, // AMFBS_None 7933 {Feature_In16BitModeBit, }, 7934 {Feature_In32BitModeBit, }, 7935 {Feature_In64BitModeBit, }, 7936 {Feature_Not16BitModeBit, }, 7937 {Feature_Not64BitModeBit, }, 7938}; 7939 7940namespace { 7941 struct MatchEntry { 7942 uint16_t Mnemonic; 7943 uint16_t Opcode; 7944 uint16_t ConvertFn; 7945 uint8_t RequiredFeaturesIdx; 7946 uint8_t Classes[9]; 7947 StringRef getMnemonic() const { 7948 return StringRef(MnemonicTable + Mnemonic + 1, 7949 MnemonicTable[Mnemonic]); 7950 } 7951 }; 7952 7953 // Predicate for searching for an opcode. 7954 struct LessOpcode { 7955 bool operator()(const MatchEntry &LHS, StringRef RHS) { 7956 return LHS.getMnemonic() < RHS; 7957 } 7958 bool operator()(StringRef LHS, const MatchEntry &RHS) { 7959 return LHS < RHS.getMnemonic(); 7960 } 7961 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { 7962 return LHS.getMnemonic() < RHS.getMnemonic(); 7963 } 7964 }; 7965} // end anonymous namespace 7966 7967static const MatchEntry MatchTable0[] = { 7968 { 0 /* aaa */, X86::AAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 7969 { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, }, 7970 { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 7971 { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, }, 7972 { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 7973 { 12 /* aas */, X86::AAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 7974 { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 7975 { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 7976 { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 7977 { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 7978 { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 7979 { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 7980 { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 7981 { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 7982 { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 7983 { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 7984 { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 7985 { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 7986 { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 7987 { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 7988 { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 7989 { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 7990 { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 7991 { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 7992 { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 7993 { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 7994 { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 7995 { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 7996 { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 7997 { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 7998 { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 7999 { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8000 { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 8001 { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 8002 { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 8003 { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 8004 { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 8005 { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 8006 { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8007 { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8008 { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8009 { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8010 { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8011 { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 8012 { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 8013 { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 8014 { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 8015 { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 8016 { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 8017 { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8018 { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8019 { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 8020 { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 8021 { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 8022 { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 8023 { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 8024 { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 8025 { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8026 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8027 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8028 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8029 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8030 { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8031 { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8032 { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 8033 { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 8034 { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 8035 { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 8036 { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 8037 { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 8038 { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8039 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8040 { 88 /* addsd */, X86::ADDSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8041 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8042 { 94 /* addss */, X86::ADDSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8043 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8044 { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8045 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8046 { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8047 { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8048 { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8049 { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 8050 { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 8051 { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 8052 { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 8053 { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 8054 { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 8055 { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8056 { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8057 { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8058 { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8059 { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8060 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8061 { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8062 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8063 { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8064 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8065 { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8066 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8067 { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8068 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8069 { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8070 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8071 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8072 { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 8073 { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 8074 { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 8075 { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 8076 { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 8077 { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 8078 { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8079 { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8080 { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 8081 { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 8082 { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 8083 { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 8084 { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 8085 { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 8086 { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8087 { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 8088 { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, }, 8089 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8090 { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8091 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8092 { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8093 { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 8094 { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, }, 8095 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8096 { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8097 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8098 { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8099 { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8100 { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8101 { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 8102 { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 8103 { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 8104 { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 8105 { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 8106 { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 8107 { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8108 { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8109 { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8110 { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 8111 { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 8112 { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 8113 { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 8114 { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 8115 { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 8116 { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8117 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, }, 8118 { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, }, 8119 { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 8120 { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 8121 { 277 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, }, 8122 { 277 /* bextrl */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, }, 8123 { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 8124 { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 8125 { 284 /* bextrq */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, }, 8126 { 284 /* bextrq */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, }, 8127 { 299 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8128 { 299 /* blcfilll */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8129 { 308 /* blcfillq */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8130 { 308 /* blcfillq */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8131 { 328 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8132 { 328 /* blcicl */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8133 { 335 /* blcicq */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8134 { 335 /* blcicq */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8135 { 342 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8136 { 342 /* blcil */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8137 { 348 /* blciq */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8138 { 348 /* blciq */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8139 { 361 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8140 { 361 /* blcmskl */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8141 { 369 /* blcmskq */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8142 { 369 /* blcmskq */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8143 { 382 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8144 { 382 /* blcsl */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8145 { 388 /* blcsq */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8146 { 388 /* blcsq */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8147 { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8148 { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8149 { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8150 { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8151 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8152 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8153 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, }, 8154 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, }, 8155 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8156 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8157 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, }, 8158 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, }, 8159 { 436 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8160 { 436 /* blsfilll */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8161 { 445 /* blsfillq */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8162 { 445 /* blsfillq */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8163 { 465 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8164 { 465 /* blsicl */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8165 { 472 /* blsicq */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8166 { 472 /* blsicq */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8167 { 479 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8168 { 479 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8169 { 485 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8170 { 485 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8171 { 498 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8172 { 498 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8173 { 506 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8174 { 506 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8175 { 519 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8176 { 519 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8177 { 525 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8178 { 525 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8179 { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, }, 8180 { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_BNDR }, }, 8181 { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, }, 8182 { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, }, 8183 { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, }, 8184 { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_BNDR }, }, 8185 { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, }, 8186 { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, }, 8187 { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, }, 8188 { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_BNDR }, }, 8189 { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, }, 8190 { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, }, 8191 { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_BNDR }, }, 8192 { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, }, 8193 { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, }, 8194 { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_BNDR, MCK_BNDR }, }, 8195 { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_1__Reg1_0, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem128 }, }, 8196 { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_1__Reg1_0, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, }, 8197 { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_BNDR }, }, 8198 { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_1__Mem645_0, AMFBS_Not64BitMode, { MCK_Mem64, MCK_BNDR }, }, 8199 { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_1__Reg1_0, AMFBS_None, { MCK_BNDR, MCK_Mem }, }, 8200 { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, }, 8201 { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, }, 8202 { 586 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8203 { 586 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8204 { 591 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8205 { 591 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8206 { 596 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8207 { 596 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8208 { 605 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8209 { 605 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8210 { 610 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8211 { 610 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8212 { 615 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8213 { 615 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8214 { 626 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 8215 { 633 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 8216 { 640 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8217 { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8218 { 647 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8219 { 647 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8220 { 647 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 8221 { 647 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8222 { 652 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8223 { 652 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8224 { 652 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 8225 { 652 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 8226 { 657 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8227 { 657 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8228 { 657 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 8229 { 657 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 8230 { 662 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8231 { 662 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8232 { 662 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 8233 { 662 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8234 { 666 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8235 { 666 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8236 { 666 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 8237 { 666 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 8238 { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8239 { 674 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8240 { 674 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8241 { 674 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 8242 { 674 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8243 { 679 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8244 { 679 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8245 { 679 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 8246 { 679 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 8247 { 684 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8248 { 684 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8249 { 684 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 8250 { 684 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 8251 { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8252 { 693 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8253 { 693 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8254 { 693 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 8255 { 693 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 8256 { 698 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8257 { 698 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8258 { 698 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 8259 { 698 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 8260 { 703 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8261 { 703 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8262 { 703 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 8263 { 703 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 8264 { 708 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8265 { 708 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8266 { 708 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 8267 { 708 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 8268 { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 8269 { 717 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 8270 { 723 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 8271 { 723 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 8272 { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 8273 { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 8274 { 734 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, }, 8275 { 734 /* calll */, X86::CALL32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, }, 8276 { 734 /* calll */, X86::CALL32m, Convert__Mem325_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, }, 8277 { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 8278 { 740 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, }, 8279 { 740 /* callq */, X86::CALL64r, Convert__Reg1_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_GR64 }, }, 8280 { 740 /* callq */, X86::CALL64m, Convert__Mem645_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem64 }, }, 8281 { 746 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 8282 { 746 /* callw */, X86::CALL16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, }, 8283 { 746 /* callw */, X86::CALL16m, Convert__Mem165_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, }, 8284 { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 8285 { 752 /* cbtw */, X86::CBW, Convert_NoOperands, AMFBS_None, { }, }, 8286 { 770 /* clac */, X86::CLAC, Convert_NoOperands, AMFBS_None, { }, }, 8287 { 775 /* clc */, X86::CLC, Convert_NoOperands, AMFBS_None, { }, }, 8288 { 779 /* cld */, X86::CLD, Convert_NoOperands, AMFBS_None, { }, }, 8289 { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8290 { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8291 { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8292 { 811 /* clgi */, X86::CLGI, Convert_NoOperands, AMFBS_None, { }, }, 8293 { 816 /* cli */, X86::CLI, Convert_NoOperands, AMFBS_None, { }, }, 8294 { 824 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 8295 { 829 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 8296 { 834 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 8297 { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8298 { 848 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 8299 { 853 /* cltd */, X86::CDQ, Convert_NoOperands, AMFBS_None, { }, }, 8300 { 858 /* cltq */, X86::CDQE, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 8301 { 863 /* clts */, X86::CLTS, Convert_NoOperands, AMFBS_None, { }, }, 8302 { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8303 { 873 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 8304 { 873 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 8305 { 873 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 8306 { 873 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 8307 { 880 /* cmc */, X86::CMC, Convert_NoOperands, AMFBS_None, { }, }, 8308 { 897 /* cmovael */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8309 { 897 /* cmovael */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_3, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8310 { 905 /* cmovaeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8311 { 905 /* cmovaeq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_3, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8312 { 913 /* cmovaew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8313 { 913 /* cmovaew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_3, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8314 { 921 /* cmoval */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8315 { 921 /* cmoval */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_7, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8316 { 928 /* cmovaq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8317 { 928 /* cmovaq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_7, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8318 { 935 /* cmovaw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8319 { 935 /* cmovaw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_7, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8320 { 955 /* cmovbel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8321 { 955 /* cmovbel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_6, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8322 { 963 /* cmovbeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8323 { 963 /* cmovbeq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_6, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8324 { 971 /* cmovbew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8325 { 971 /* cmovbew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_6, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8326 { 979 /* cmovbl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8327 { 979 /* cmovbl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_2, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8328 { 986 /* cmovbq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8329 { 986 /* cmovbq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_2, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8330 { 993 /* cmovbw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8331 { 993 /* cmovbw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_2, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8332 { 1006 /* cmovel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8333 { 1006 /* cmovel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_4, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8334 { 1013 /* cmoveq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8335 { 1013 /* cmoveq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_4, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8336 { 1020 /* cmovew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8337 { 1020 /* cmovew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_4, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8338 { 1040 /* cmovgel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8339 { 1040 /* cmovgel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_13, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8340 { 1048 /* cmovgeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8341 { 1048 /* cmovgeq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_13, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8342 { 1056 /* cmovgew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8343 { 1056 /* cmovgew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_13, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8344 { 1064 /* cmovgl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8345 { 1064 /* cmovgl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_15, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8346 { 1071 /* cmovgq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8347 { 1071 /* cmovgq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_15, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8348 { 1078 /* cmovgw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8349 { 1078 /* cmovgw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_15, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8350 { 1098 /* cmovlel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8351 { 1098 /* cmovlel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_14, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8352 { 1106 /* cmovleq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8353 { 1106 /* cmovleq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_14, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8354 { 1114 /* cmovlew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8355 { 1114 /* cmovlew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_14, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8356 { 1122 /* cmovll */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8357 { 1122 /* cmovll */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_12, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8358 { 1129 /* cmovlq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8359 { 1129 /* cmovlq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_12, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8360 { 1136 /* cmovlw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8361 { 1136 /* cmovlw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_12, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8362 { 1150 /* cmovnel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8363 { 1150 /* cmovnel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_5, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8364 { 1158 /* cmovneq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8365 { 1158 /* cmovneq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_5, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8366 { 1166 /* cmovnew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8367 { 1166 /* cmovnew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_5, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8368 { 1181 /* cmovnol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8369 { 1181 /* cmovnol */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8370 { 1189 /* cmovnoq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8371 { 1189 /* cmovnoq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8372 { 1197 /* cmovnow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8373 { 1197 /* cmovnow */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8374 { 1212 /* cmovnpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8375 { 1212 /* cmovnpl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_11, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8376 { 1220 /* cmovnpq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8377 { 1220 /* cmovnpq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_11, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8378 { 1228 /* cmovnpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8379 { 1228 /* cmovnpw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_11, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8380 { 1243 /* cmovnsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8381 { 1243 /* cmovnsl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_9, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8382 { 1251 /* cmovnsq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8383 { 1251 /* cmovnsq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_9, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8384 { 1259 /* cmovnsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8385 { 1259 /* cmovnsw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_9, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8386 { 1273 /* cmovol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8387 { 1273 /* cmovol */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8388 { 1280 /* cmovoq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8389 { 1280 /* cmovoq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8390 { 1287 /* cmovow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8391 { 1287 /* cmovow */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8392 { 1300 /* cmovpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8393 { 1300 /* cmovpl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_10, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8394 { 1307 /* cmovpq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8395 { 1307 /* cmovpq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_10, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8396 { 1314 /* cmovpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8397 { 1314 /* cmovpw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_10, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8398 { 1327 /* cmovsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8399 { 1327 /* cmovsl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_8, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8400 { 1334 /* cmovsq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8401 { 1334 /* cmovsq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_8, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8402 { 1341 /* cmovsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8403 { 1341 /* cmovsw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_8, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8404 { 1352 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 8405 { 1352 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 8406 { 1352 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 8407 { 1352 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 8408 { 1352 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 8409 { 1352 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 8410 { 1357 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8411 { 1357 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8412 { 1357 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 8413 { 1357 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 8414 { 1357 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 8415 { 1357 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 8416 { 1357 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 8417 { 1357 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 8418 { 1357 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8419 { 1362 /* cmppd */, X86::CMPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8420 { 1362 /* cmppd */, X86::CMPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8421 { 1368 /* cmpps */, X86::CMPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8422 { 1368 /* cmpps */, X86::CMPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8423 { 1374 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8424 { 1374 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8425 { 1374 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 8426 { 1374 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 8427 { 1374 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 8428 { 1374 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 8429 { 1374 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 8430 { 1374 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 8431 { 1374 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8432 { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, AMFBS_None, { MCK_DstIdx8, MCK_SrcIdx8 }, }, 8433 { 1390 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8434 { 1390 /* cmpsd */, X86::CMPSDrm_Int, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, }, 8435 { 1396 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, AMFBS_None, { MCK_DstIdx32, MCK_SrcIdx32 }, }, 8436 { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, }, 8437 { 1408 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8438 { 1408 /* cmpss */, X86::CMPSSrm_Int, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, }, 8439 { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, AMFBS_None, { MCK_DstIdx16, MCK_SrcIdx16 }, }, 8440 { 1420 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8441 { 1420 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8442 { 1420 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 8443 { 1420 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 8444 { 1420 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 8445 { 1420 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 8446 { 1420 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 8447 { 1420 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 8448 { 1420 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8449 { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128 }, }, 8450 { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8451 { 1454 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 8452 { 1454 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 8453 { 1463 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8454 { 1463 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 8455 { 1472 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8456 { 1472 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 8457 { 1481 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8458 { 1481 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 8459 { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8460 { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8461 { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8462 { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8463 { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, AMFBS_None, { }, }, 8464 { 1514 /* cqto */, X86::CQO, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 8465 { 1525 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, }, 8466 { 1525 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, }, 8467 { 1525 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, }, 8468 { 1525 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR64 }, }, 8469 { 1532 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8470 { 1532 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8471 { 1539 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8472 { 1539 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8473 { 1546 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, }, 8474 { 1546 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, }, 8475 { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 8476 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8477 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8478 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8479 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8480 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8481 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8482 { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 8483 { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR64 }, }, 8484 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8485 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8486 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 8487 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8488 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 8489 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8490 { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8491 { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8492 { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8493 { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8494 { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 8495 { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 8496 { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8497 { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8498 { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 8499 { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8500 { 1655 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8501 { 1655 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 8502 { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8503 { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8504 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8505 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8506 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 8507 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 8508 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm_Int, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8509 { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 8510 { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8511 { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 8512 { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8513 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 8514 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 8515 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm_Int, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8516 { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 8517 { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8518 { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 8519 { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8520 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8521 { 1742 /* cvtss2sd */, X86::CVTSS2SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8522 { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8523 { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8524 { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8525 { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 8526 { 1760 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8527 { 1760 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8528 { 1770 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8529 { 1770 /* cvtss2siq */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 8530 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8531 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8532 { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 8533 { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR64 }, }, 8534 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8535 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8536 { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 8537 { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 8538 { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8539 { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8540 { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 8541 { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8542 { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8543 { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 8544 { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8545 { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8546 { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8547 { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8548 { 1852 /* cvttss2si */, X86::CVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8549 { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 8550 { 1862 /* cvttss2sil */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 8551 { 1862 /* cvttss2sil */, X86::CVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8552 { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 8553 { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 8554 { 1893 /* cwtd */, X86::CWD, Convert_NoOperands, AMFBS_None, { }, }, 8555 { 1898 /* cwtl */, X86::CWDE, Convert_NoOperands, AMFBS_None, { }, }, 8556 { 1903 /* daa */, X86::DAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 8557 { 1907 /* das */, X86::DAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 8558 { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 8559 { 1922 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 8560 { 1922 /* decb */, X86::DEC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8561 { 1927 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, }, 8562 { 1927 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 8563 { 1927 /* decl */, X86::DEC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8564 { 1932 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 8565 { 1932 /* decq */, X86::DEC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 8566 { 1937 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, }, 8567 { 1937 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 8568 { 1937 /* decw */, X86::DEC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8569 { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 8570 { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8571 { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8, MCK_AL }, }, 8572 { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_AL }, }, 8573 { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 8574 { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8575 { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32, MCK_EAX }, }, 8576 { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_EAX }, }, 8577 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8578 { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8579 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8580 { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8581 { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 8582 { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 8583 { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64, MCK_RAX }, }, 8584 { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_RAX }, }, 8585 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8586 { 1973 /* divsd */, X86::DIVSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 8587 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8588 { 1979 /* divss */, X86::DIVSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 8589 { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 8590 { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8591 { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16, MCK_AX }, }, 8592 { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_AX }, }, 8593 { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8594 { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8595 { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8596 { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8597 { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 8598 { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, AMFBS_None, { }, }, 8599 { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, AMFBS_None, { }, }, 8600 { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, AMFBS_None, { }, }, 8601 { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, AMFBS_None, { }, }, 8602 { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, AMFBS_None, { }, }, 8603 { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, AMFBS_None, { }, }, 8604 { 2042 /* enqcmd */, X86::ENQCMD16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, }, 8605 { 2042 /* enqcmd */, X86::ENQCMD32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, }, 8606 { 2042 /* enqcmd */, X86::ENQCMD64, Convert__Reg1_1__Mem5125_0, AMFBS_In64BitMode, { MCK_Mem512, MCK_GR64 }, }, 8607 { 2049 /* enqcmds */, X86::ENQCMDS16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, }, 8608 { 2049 /* enqcmds */, X86::ENQCMDS32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, }, 8609 { 2049 /* enqcmds */, X86::ENQCMDS64, Convert__Reg1_1__Mem5125_0, AMFBS_In64BitMode, { MCK_Mem512, MCK_GR64 }, }, 8610 { 2057 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, AMFBS_None, { MCK_Imm, MCK_Imm }, }, 8611 { 2063 /* es */, X86::ES_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 8612 { 2066 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, }, 8613 { 2066 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, }, 8614 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8615 { 2076 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, }, 8616 { 2082 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, AMFBS_None, { }, }, 8617 { 2088 /* fabs */, X86::ABS_F, Convert_NoOperands, AMFBS_None, { }, }, 8618 { 2093 /* fadd */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8619 { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8620 { 2093 /* fadd */, X86::ADD_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8621 { 2093 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8622 { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8623 { 2098 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8624 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8625 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8626 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8627 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8628 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8629 { 2110 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8630 { 2116 /* fbld */, X86::FBLDm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 8631 { 2121 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 8632 { 2127 /* fchs */, X86::CHS_F, Convert_NoOperands, AMFBS_None, { }, }, 8633 { 2132 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8634 { 2139 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8635 { 2147 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8636 { 2154 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8637 { 2162 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8638 { 2171 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8639 { 2179 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8640 { 2187 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8641 { 2194 /* fcom */, X86::COM_FST0r, Convert__regST1, AMFBS_None, { }, }, 8642 { 2194 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8643 { 2199 /* fcomi */, X86::COM_FIr, Convert__regST1, AMFBS_None, { }, }, 8644 { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8645 { 2199 /* fcomi */, X86::COM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8646 { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8647 { 2205 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8648 { 2211 /* fcomp */, X86::COMP_FST0r, Convert__regST1, AMFBS_None, { }, }, 8649 { 2211 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8650 { 2217 /* fcompi */, X86::COM_FIPr, Convert__regST1, AMFBS_None, { }, }, 8651 { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8652 { 2217 /* fcompi */, X86::COM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8653 { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8654 { 2224 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8655 { 2231 /* fcompp */, X86::FCOMPP, Convert_NoOperands, AMFBS_None, { }, }, 8656 { 2238 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8657 { 2245 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8658 { 2251 /* fcos */, X86::FCOS, Convert_NoOperands, AMFBS_None, { }, }, 8659 { 2256 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, AMFBS_None, { }, }, 8660 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8661 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8662 { 2264 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8663 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8664 { 2269 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8665 { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8666 { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8667 { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8668 { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8669 { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8670 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8671 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8672 { 2281 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8673 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8674 { 2287 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8675 { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8676 { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8677 { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8678 { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8679 { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8680 { 2301 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8681 { 2308 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8682 { 2314 /* femms */, X86::FEMMS, Convert_NoOperands, AMFBS_None, { }, }, 8683 { 2320 /* ffree */, X86::FFREE, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8684 { 2326 /* ffreep */, X86::FFREEP, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8685 { 2339 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8686 { 2346 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8687 { 2359 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8688 { 2373 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8689 { 2381 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8690 { 2389 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8691 { 2402 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8692 { 2416 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8693 { 2424 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8694 { 2432 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8695 { 2444 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8696 { 2450 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8697 { 2457 /* filds */, X86::ILD_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8698 { 2469 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8699 { 2476 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8700 { 2483 /* fincstp */, X86::FINCSTP, Convert_NoOperands, AMFBS_None, { }, }, 8701 { 2496 /* fistl */, X86::IST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8702 { 2508 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8703 { 2515 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8704 { 2523 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8705 { 2530 /* fists */, X86::IST_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8706 { 2543 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8707 { 2551 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8708 { 2560 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8709 { 2574 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8710 { 2588 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8711 { 2596 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8712 { 2604 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8713 { 2611 /* fld */, X86::LD_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8714 { 2615 /* fld1 */, X86::LD_F1, Convert_NoOperands, AMFBS_None, { }, }, 8715 { 2620 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8716 { 2626 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8717 { 2633 /* fldl */, X86::LD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8718 { 2638 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, AMFBS_None, { }, }, 8719 { 2645 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, AMFBS_None, { }, }, 8720 { 2652 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, AMFBS_None, { }, }, 8721 { 2659 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, AMFBS_None, { }, }, 8722 { 2666 /* fldpi */, X86::FLDPI, Convert_NoOperands, AMFBS_None, { }, }, 8723 { 2672 /* flds */, X86::LD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8724 { 2677 /* fldt */, X86::LD_F80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 8725 { 2682 /* fldz */, X86::LD_F0, Convert_NoOperands, AMFBS_None, { }, }, 8726 { 2687 /* fmul */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8727 { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8728 { 2687 /* fmul */, X86::MUL_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8729 { 2687 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8730 { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8731 { 2692 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8732 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8733 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8734 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8735 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8736 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8737 { 2704 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8738 { 2710 /* fnclex */, X86::FNCLEX, Convert_NoOperands, AMFBS_None, { }, }, 8739 { 2717 /* fninit */, X86::FNINIT, Convert_NoOperands, AMFBS_None, { }, }, 8740 { 2724 /* fnop */, X86::FNOP, Convert_NoOperands, AMFBS_None, { }, }, 8741 { 2729 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8742 { 2736 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8743 { 2743 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8744 { 2751 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { }, }, 8745 { 2751 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { MCK_AX }, }, 8746 { 2751 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8747 { 2758 /* fpatan */, X86::FPATAN, Convert_NoOperands, AMFBS_None, { }, }, 8748 { 2765 /* fprem */, X86::FPREM, Convert_NoOperands, AMFBS_None, { }, }, 8749 { 2771 /* fprem1 */, X86::FPREM1, Convert_NoOperands, AMFBS_None, { }, }, 8750 { 2778 /* fptan */, X86::FPTAN, Convert_NoOperands, AMFBS_None, { }, }, 8751 { 2784 /* frndint */, X86::FRNDINT, Convert_NoOperands, AMFBS_None, { }, }, 8752 { 2792 /* frstor */, X86::FRSTORm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8753 { 2799 /* fs */, X86::FS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 8754 { 2802 /* fscale */, X86::FSCALE, Convert_NoOperands, AMFBS_None, { }, }, 8755 { 2809 /* fsin */, X86::FSIN, Convert_NoOperands, AMFBS_None, { }, }, 8756 { 2814 /* fsincos */, X86::FSINCOS, Convert_NoOperands, AMFBS_None, { }, }, 8757 { 2822 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, AMFBS_None, { }, }, 8758 { 2828 /* fst */, X86::ST_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8759 { 2832 /* fstl */, X86::ST_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8760 { 2837 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8761 { 2842 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8762 { 2848 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8763 { 2854 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 8764 { 2860 /* fsts */, X86::ST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8765 { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8766 { 2865 /* fsub */, X86::SUB_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8767 { 2865 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8768 { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8769 { 2870 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8770 { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8771 { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8772 { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8773 { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8774 { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8775 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8776 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8777 { 2882 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8778 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8779 { 2888 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 8780 { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, AMFBS_None, { }, }, 8781 { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8782 { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8783 { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 8784 { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8785 { 2902 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8786 { 2909 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8787 { 2915 /* ftst */, X86::TST_F, Convert_NoOperands, AMFBS_None, { }, }, 8788 { 2920 /* fucom */, X86::UCOM_Fr, Convert__regST1, AMFBS_None, { }, }, 8789 { 2920 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8790 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__regST1, AMFBS_None, { }, }, 8791 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8792 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8793 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8794 { 2933 /* fucomp */, X86::UCOM_FPr, Convert__regST1, AMFBS_None, { }, }, 8795 { 2933 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8796 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, AMFBS_None, { }, }, 8797 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8798 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 8799 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 8800 { 2948 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, AMFBS_None, { }, }, 8801 { 2956 /* fxam */, X86::FXAM, Convert_NoOperands, AMFBS_None, { }, }, 8802 { 2961 /* fxch */, X86::XCH_F, Convert__regST1, AMFBS_None, { }, }, 8803 { 2961 /* fxch */, X86::XCH_F, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 8804 { 2966 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 8805 { 2974 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 8806 { 2984 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 8807 { 2991 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 8808 { 3000 /* fxtract */, X86::FXTRACT, Convert_NoOperands, AMFBS_None, { }, }, 8809 { 3008 /* fyl2x */, X86::FYL2X, Convert_NoOperands, AMFBS_None, { }, }, 8810 { 3014 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, AMFBS_None, { }, }, 8811 { 3022 /* getsec */, X86::GETSEC, Convert_NoOperands, AMFBS_None, { }, }, 8812 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8813 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8814 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8815 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 8816 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8817 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8818 { 3070 /* gs */, X86::GS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 8819 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8820 { 3073 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8821 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8822 { 3080 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8823 { 3087 /* hlt */, X86::HLT, Convert_NoOperands, AMFBS_None, { }, }, 8824 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8825 { 3091 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8826 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8827 { 3098 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 8828 { 3110 /* idivb */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 8829 { 3110 /* idivb */, X86::IDIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8830 { 3110 /* idivb */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8, MCK_AL }, }, 8831 { 3110 /* idivb */, X86::IDIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_AL }, }, 8832 { 3116 /* idivl */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 8833 { 3116 /* idivl */, X86::IDIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8834 { 3116 /* idivl */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32, MCK_EAX }, }, 8835 { 3116 /* idivl */, X86::IDIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_EAX }, }, 8836 { 3122 /* idivq */, X86::IDIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 8837 { 3122 /* idivq */, X86::IDIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 8838 { 3122 /* idivq */, X86::IDIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64, MCK_RAX }, }, 8839 { 3122 /* idivq */, X86::IDIV64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_RAX }, }, 8840 { 3128 /* idivw */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 8841 { 3128 /* idivw */, X86::IDIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8842 { 3128 /* idivw */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16, MCK_AX }, }, 8843 { 3128 /* idivw */, X86::IDIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_AX }, }, 8844 { 3139 /* imulb */, X86::IMUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 8845 { 3139 /* imulb */, X86::IMUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8846 { 3145 /* imull */, X86::IMUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 8847 { 3145 /* imull */, X86::IMUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8848 { 3145 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 8849 { 3145 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 8850 { 3145 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 8851 { 3145 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 8852 { 3145 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, }, 8853 { 3145 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, }, 8854 { 3145 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, }, 8855 { 3145 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, }, 8856 { 3151 /* imulq */, X86::IMUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 8857 { 3151 /* imulq */, X86::IMUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 8858 { 3151 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 8859 { 3151 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 8860 { 3151 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 8861 { 3151 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 8862 { 3151 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, }, 8863 { 3151 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, }, 8864 { 3151 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, }, 8865 { 3151 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, }, 8866 { 3157 /* imulw */, X86::IMUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 8867 { 3157 /* imulw */, X86::IMUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8868 { 3157 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 8869 { 3157 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 8870 { 3157 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 8871 { 3157 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 8872 { 3157 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, }, 8873 { 3157 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, }, 8874 { 3157 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16, MCK_GR16 }, }, 8875 { 3157 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16, MCK_GR16 }, }, 8876 { 3166 /* inb */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 8877 { 3166 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 8878 { 3166 /* inb */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AL }, }, 8879 { 3166 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AL }, }, 8880 { 3174 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 8881 { 3174 /* incb */, X86::INC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8882 { 3179 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, }, 8883 { 3179 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 8884 { 3179 /* incl */, X86::INC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 8885 { 3184 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 8886 { 3184 /* incq */, X86::INC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 8887 { 3189 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 8888 { 3197 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 8889 { 3205 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, }, 8890 { 3205 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 8891 { 3205 /* incw */, X86::INC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 8892 { 3210 /* inl */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 8893 { 3210 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 8894 { 3210 /* inl */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_EAX }, }, 8895 { 3210 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_EAX }, }, 8896 { 3218 /* insb */, X86::INSB, Convert__DstIdx81_1, AMFBS_None, { MCK_DX, MCK_DstIdx8 }, }, 8897 { 3228 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8898 { 3228 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, }, 8899 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 8900 { 3237 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 8901 { 3245 /* insl */, X86::INSL, Convert__DstIdx321_1, AMFBS_None, { MCK_DX, MCK_DstIdx32 }, }, 8902 { 3250 /* insw */, X86::INSW, Convert__DstIdx161_1, AMFBS_None, { MCK_DX, MCK_DstIdx16 }, }, 8903 { 3255 /* int */, X86::INT, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 8904 { 3259 /* int3 */, X86::INT3, Convert_NoOperands, AMFBS_None, { }, }, 8905 { 3264 /* into */, X86::INTO, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 8906 { 3269 /* invd */, X86::INVD, Convert_NoOperands, AMFBS_None, { }, }, 8907 { 3274 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, }, 8908 { 3274 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_GR64 }, }, 8909 { 3281 /* invlpg */, X86::INVLPG, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 8910 { 3288 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX }, }, 8911 { 3288 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_ECX }, }, 8912 { 3296 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, }, 8913 { 3296 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_GR64 }, }, 8914 { 3304 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, }, 8915 { 3304 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_GR64 }, }, 8916 { 3312 /* inw */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 8917 { 3312 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 8918 { 3312 /* inw */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AX }, }, 8919 { 3312 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AX }, }, 8920 { 3327 /* iretl */, X86::IRET32, Convert_NoOperands, AMFBS_None, { }, }, 8921 { 3333 /* iretq */, X86::IRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 8922 { 3339 /* iretw */, X86::IRET16, Convert_NoOperands, AMFBS_None, { }, }, 8923 { 3345 /* ja */, X86::JCC_1, Convert__AbsMem1_0__imm_95_7, AMFBS_None, { MCK_AbsMem }, }, 8924 { 3348 /* jae */, X86::JCC_1, Convert__AbsMem1_0__imm_95_3, AMFBS_None, { MCK_AbsMem }, }, 8925 { 3352 /* jb */, X86::JCC_1, Convert__AbsMem1_0__imm_95_2, AMFBS_None, { MCK_AbsMem }, }, 8926 { 3355 /* jbe */, X86::JCC_1, Convert__AbsMem1_0__imm_95_6, AMFBS_None, { MCK_AbsMem }, }, 8927 { 3359 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, }, 8928 { 3364 /* je */, X86::JCC_1, Convert__AbsMem1_0__imm_95_4, AMFBS_None, { MCK_AbsMem }, }, 8929 { 3367 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 8930 { 3373 /* jg */, X86::JCC_1, Convert__AbsMem1_0__imm_95_15, AMFBS_None, { MCK_AbsMem }, }, 8931 { 3376 /* jge */, X86::JCC_1, Convert__AbsMem1_0__imm_95_13, AMFBS_None, { MCK_AbsMem }, }, 8932 { 3380 /* jl */, X86::JCC_1, Convert__AbsMem1_0__imm_95_12, AMFBS_None, { MCK_AbsMem }, }, 8933 { 3383 /* jle */, X86::JCC_1, Convert__AbsMem1_0__imm_95_14, AMFBS_None, { MCK_AbsMem }, }, 8934 { 3387 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 8935 { 3387 /* jmp */, X86::JMP16m, Convert__Mem165_1, AMFBS_In16BitMode, { MCK__STAR_, MCK_Mem16 }, }, 8936 { 3387 /* jmp */, X86::JMP32m, Convert__Mem325_1, AMFBS_In32BitMode, { MCK__STAR_, MCK_Mem32 }, }, 8937 { 3387 /* jmp */, X86::JMP64m, Convert__Mem645_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem64 }, }, 8938 { 3387 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 8939 { 3387 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 8940 { 3391 /* jmpl */, X86::JMP32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, }, 8941 { 3391 /* jmpl */, X86::JMP32m, Convert__Mem325_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, }, 8942 { 3391 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 8943 { 3396 /* jmpq */, X86::JMP64r, Convert__Reg1_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_GR64 }, }, 8944 { 3396 /* jmpq */, X86::JMP64m, Convert__Mem645_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem64 }, }, 8945 { 3401 /* jmpw */, X86::JMP16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, }, 8946 { 3401 /* jmpw */, X86::JMP16m, Convert__Mem165_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, }, 8947 { 3401 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 8948 { 3406 /* jne */, X86::JCC_1, Convert__AbsMem1_0__imm_95_5, AMFBS_None, { MCK_AbsMem }, }, 8949 { 3410 /* jno */, X86::JCC_1, Convert__AbsMem1_0__imm_95_1, AMFBS_None, { MCK_AbsMem }, }, 8950 { 3414 /* jnp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_11, AMFBS_None, { MCK_AbsMem }, }, 8951 { 3418 /* jns */, X86::JCC_1, Convert__AbsMem1_0__imm_95_9, AMFBS_None, { MCK_AbsMem }, }, 8952 { 3422 /* jo */, X86::JCC_1, Convert__AbsMem1_0__imm_95_0, AMFBS_None, { MCK_AbsMem }, }, 8953 { 3425 /* jp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_10, AMFBS_None, { MCK_AbsMem }, }, 8954 { 3428 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, }, 8955 { 3434 /* js */, X86::JCC_1, Convert__AbsMem1_0__imm_95_8, AMFBS_None, { MCK_AbsMem }, }, 8956 { 3437 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8957 { 3443 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8958 { 3449 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8959 { 3455 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8960 { 3461 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8961 { 3467 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8962 { 3473 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8963 { 3480 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8964 { 3487 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8965 { 3494 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8966 { 3501 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8967 { 3507 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8968 { 3513 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8969 { 3513 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, }, 8970 { 3513 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem8 }, }, 8971 { 3513 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, }, 8972 { 3513 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VK1 }, }, 8973 { 3519 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8974 { 3519 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, }, 8975 { 3519 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem32 }, }, 8976 { 3519 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, }, 8977 { 3519 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VK1 }, }, 8978 { 3525 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8979 { 3525 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR64 }, }, 8980 { 3525 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem64 }, }, 8981 { 3525 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VK1 }, }, 8982 { 3525 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VK1 }, }, 8983 { 3531 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8984 { 3531 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, }, 8985 { 3531 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem16 }, }, 8986 { 3531 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, }, 8987 { 3531 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VK1 }, }, 8988 { 3537 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8989 { 3543 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8990 { 3549 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8991 { 3555 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8992 { 3561 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8993 { 3566 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8994 { 3571 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 8995 { 3576 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8996 { 3585 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8997 { 3594 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8998 { 3603 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 8999 { 3612 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9000 { 3617 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9001 { 3626 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9002 { 3635 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9003 { 3644 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9004 { 3653 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9005 { 3662 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9006 { 3671 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9007 { 3680 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, }, 9008 { 3689 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 9009 { 3696 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 9010 { 3703 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 9011 { 3710 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 9012 { 3717 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9013 { 3726 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9014 { 3735 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9015 { 3744 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9016 { 3751 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9017 { 3758 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9018 { 3765 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9019 { 3772 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9020 { 3778 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9021 { 3784 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9022 { 3790 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 9023 { 3796 /* lahf */, X86::LAHF, Convert_NoOperands, AMFBS_None, { }, }, 9024 { 3805 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9025 { 3805 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, }, 9026 { 3810 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, }, 9027 { 3810 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, }, 9028 { 3815 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9029 { 3815 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9030 { 3820 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, AMFBS_Not16BitMode, { MCK__STAR_, MCK_Mem }, }, 9031 { 3820 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, AMFBS_In16BitMode, { MCK__STAR_, MCK_Mem }, }, 9032 { 3820 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 9033 { 3820 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 9034 { 3826 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, }, 9035 { 3826 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 9036 { 3833 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, }, 9037 { 3840 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, }, 9038 { 3840 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 9039 { 3847 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9040 { 3853 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 9041 { 3865 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, }, 9042 { 3870 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR16 }, }, 9043 { 3879 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, }, 9044 { 3879 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_GR32 }, }, 9045 { 3884 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, }, 9046 { 3889 /* leave */, X86::LEAVE, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9047 { 3889 /* leave */, X86::LEAVE64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 9048 { 3895 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, }, 9049 { 3904 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, }, 9050 { 3909 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR16 }, }, 9051 { 3914 /* lfence */, X86::LFENCE, Convert_NoOperands, AMFBS_None, { }, }, 9052 { 3925 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, }, 9053 { 3930 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, }, 9054 { 3935 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, }, 9055 { 3951 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 9056 { 3957 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 9057 { 3963 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 9058 { 3973 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, }, 9059 { 3978 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, }, 9060 { 3983 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, }, 9061 { 3999 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 9062 { 4005 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 9063 { 4011 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 9064 { 4017 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, AMFBS_Not16BitMode, { MCK__STAR_, MCK_Mem }, }, 9065 { 4017 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, AMFBS_In16BitMode, { MCK__STAR_, MCK_Mem }, }, 9066 { 4017 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 9067 { 4017 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 9068 { 4022 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, }, 9069 { 4022 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 9070 { 4028 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem }, }, 9071 { 4034 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, }, 9072 { 4034 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 9073 { 4045 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9074 { 4045 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9075 { 4051 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 9076 { 4051 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 9077 { 4063 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9078 { 4063 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9079 { 4069 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 9080 { 4074 /* lods */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_AX }, }, 9081 { 4074 /* lods */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_EAX }, }, 9082 { 4074 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, }, 9083 { 4074 /* lods */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_AL }, }, 9084 { 4079 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8 }, }, 9085 { 4079 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_AL }, }, 9086 { 4091 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32 }, }, 9087 { 4091 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_EAX }, }, 9088 { 4097 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64 }, }, 9089 { 4097 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, }, 9090 { 4103 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16 }, }, 9091 { 4103 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_AX }, }, 9092 { 4109 /* loop */, X86::LOOP, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 9093 { 4114 /* loope */, X86::LOOPE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 9094 { 4120 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 9095 { 4127 /* lretl */, X86::LRETL, Convert_NoOperands, AMFBS_None, { }, }, 9096 { 4127 /* lretl */, X86::LRETIL, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 9097 { 4133 /* lretq */, X86::LRETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 9098 { 4133 /* lretq */, X86::LRETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, }, 9099 { 4139 /* lretw */, X86::LRETW, Convert_NoOperands, AMFBS_None, { }, }, 9100 { 4139 /* lretw */, X86::LRETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 9101 { 4149 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9102 { 4149 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, }, 9103 { 4154 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, }, 9104 { 4154 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, }, 9105 { 4159 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9106 { 4159 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9107 { 4168 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, }, 9108 { 4173 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, }, 9109 { 4178 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, }, 9110 { 4187 /* ltrw */, X86::LTRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9111 { 4187 /* ltrw */, X86::LTRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9112 { 4192 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, }, 9113 { 4192 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR64 }, }, 9114 { 4192 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, }, 9115 { 4192 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR64 }, }, 9116 { 4199 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, }, 9117 { 4199 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR64 }, }, 9118 { 4199 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, }, 9119 { 4199 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR64 }, }, 9120 { 4212 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9121 { 4212 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 9122 { 4219 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 9123 { 4219 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 9124 { 4226 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9125 { 4226 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9126 { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, }, 9127 { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, }, 9128 { 4244 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_VR64, MCK_VR64 }, }, 9129 { 4244 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_VR64, MCK_VR64 }, }, 9130 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9131 { 4253 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9132 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9133 { 4259 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9134 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9135 { 4265 /* maxsd */, X86::MAXSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9136 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9137 { 4271 /* maxss */, X86::MAXSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9138 { 4277 /* mfence */, X86::MFENCE, Convert_NoOperands, AMFBS_None, { }, }, 9139 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9140 { 4284 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9141 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9142 { 4290 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9143 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9144 { 4296 /* minsd */, X86::MINSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9145 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9146 { 4302 /* minss */, X86::MINSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9147 { 4308 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9148 { 4308 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 9149 { 4308 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, }, 9150 { 4308 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, }, 9151 { 4316 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9152 { 4316 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 9153 { 4316 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, }, 9154 { 4316 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, }, 9155 { 4325 /* montmul */, X86::MONTMUL, Convert_NoOperands, AMFBS_None, { }, }, 9156 { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9157 { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9158 { 4337 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 9159 { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 9160 { 4350 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs64_8 }, }, 9161 { 4350 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, AMFBS_None, { MCK_MemOffs64_8, MCK_AL }, }, 9162 { 4358 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs64_32 }, }, 9163 { 4358 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, AMFBS_None, { MCK_MemOffs64_32, MCK_EAX }, }, 9164 { 4366 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs64_64 }, }, 9165 { 4366 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR64 }, }, 9166 { 4366 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, AMFBS_None, { MCK_MemOffs64_64, MCK_RAX }, }, 9167 { 4374 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs64_16 }, }, 9168 { 4374 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, AMFBS_None, { MCK_MemOffs64_16, MCK_AX }, }, 9169 { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9170 { 4382 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9171 { 4382 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9172 { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9173 { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9174 { 4398 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9175 { 4398 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9176 { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9177 { 4414 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs16_8 }, }, 9178 { 4414 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs32_8 }, }, 9179 { 4414 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 9180 { 4414 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 9181 { 4414 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 9182 { 4414 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 9183 { 4414 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, AMFBS_None, { MCK_MemOffs16_8, MCK_AL }, }, 9184 { 4414 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, AMFBS_None, { MCK_MemOffs32_8, MCK_AL }, }, 9185 { 4414 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 9186 { 4419 /* movb.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 9187 { 4432 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 9188 { 4432 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 9189 { 4439 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 9190 { 4439 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 9191 { 4446 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 9192 { 4446 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9193 { 4453 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR32 }, }, 9194 { 4453 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR64 }, }, 9195 { 4453 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_Mem32 }, }, 9196 { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 9197 { 4453 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 9198 { 4453 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 9199 { 4453 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR64 }, }, 9200 { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 9201 { 4453 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR64 }, }, 9202 { 4453 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 9203 { 4453 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, }, 9204 { 4453 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9205 { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9206 { 4458 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9207 { 4466 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, }, 9208 { 4466 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, }, 9209 { 4466 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_1__Mem5125_0, AMFBS_In64BitMode, { MCK_Mem512, MCK_GR64 }, }, 9210 { 4476 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 9211 { 4476 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem64 }, }, 9212 { 4484 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 9213 { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9214 { 4492 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9215 { 4492 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9216 { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9217 { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9218 { 4508 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9219 { 4508 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9220 { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9221 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9222 { 4532 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9223 { 4532 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9224 { 4539 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9225 { 4539 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9226 { 4546 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs16_32 }, }, 9227 { 4546 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs32_32 }, }, 9228 { 4546 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, }, 9229 { 4546 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, }, 9230 { 4546 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, }, 9231 { 4546 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, }, 9232 { 4546 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, }, 9233 { 4546 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, }, 9234 { 4546 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9235 { 4546 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 9236 { 4546 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 9237 { 4546 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 9238 { 4546 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, AMFBS_None, { MCK_MemOffs16_32, MCK_EAX }, }, 9239 { 4546 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, AMFBS_None, { MCK_MemOffs32_32, MCK_EAX }, }, 9240 { 4546 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 9241 { 4551 /* movl.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9242 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9243 { 4566 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9244 { 4566 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9245 { 4573 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9246 { 4573 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9247 { 4580 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, }, 9248 { 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, }, 9249 { 4598 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9250 { 4606 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9251 { 4622 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 9252 { 4630 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 9253 { 4638 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9254 { 4646 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9255 { 4654 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 9256 { 4661 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9257 { 4669 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 9258 { 4677 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs32_64 }, }, 9259 { 4677 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR64 }, }, 9260 { 4677 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9261 { 4677 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR64 }, }, 9262 { 4677 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 9263 { 4677 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, }, 9264 { 4677 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, }, 9265 { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9266 { 4677 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 9267 { 4677 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9268 { 4677 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_SEGMENT_REG }, }, 9269 { 4677 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR64 }, }, 9270 { 4677 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, }, 9271 { 4677 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, }, 9272 { 4677 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 9273 { 4677 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 9274 { 4677 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 9275 { 4677 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 9276 { 4677 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 9277 { 4677 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR64 }, }, 9278 { 4677 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, AMFBS_None, { MCK_MemOffs32_64, MCK_RAX }, }, 9279 { 4677 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9280 { 4677 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9281 { 4677 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 9282 { 4682 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9283 { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9284 { 4682 /* movq.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 9285 { 4689 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 9286 { 4702 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DstIdx8 }, }, 9287 { 4708 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, }, 9288 { 4708 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, }, 9289 { 4715 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, }, 9290 { 4715 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR64 }, }, 9291 { 4722 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, }, 9292 { 4722 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, }, 9293 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9294 { 4729 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 9295 { 4729 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9296 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9297 { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9298 { 4743 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9299 { 4752 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DstIdx32 }, }, 9300 { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9301 { 4758 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9302 { 4767 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR32, MCK_GR64 }, }, 9303 { 4767 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, AMFBS_In64BitMode, { MCK_Mem32, MCK_GR64 }, }, 9304 { 4774 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, }, 9305 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9306 { 4780 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 9307 { 4780 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9308 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9309 { 4794 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DstIdx16 }, }, 9310 { 4800 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, }, 9311 { 4800 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, }, 9312 { 4807 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, }, 9313 { 4807 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, }, 9314 { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, }, 9315 { 4814 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, }, 9316 { 4814 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, }, 9317 { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, }, 9318 { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, }, 9319 { 4814 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, }, 9320 { 4814 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, }, 9321 { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9322 { 4827 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9323 { 4827 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9324 { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9325 { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9326 { 4843 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 9327 { 4843 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9328 { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9329 { 4859 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs16_16 }, }, 9330 { 4859 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs32_16 }, }, 9331 { 4859 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, }, 9332 { 4859 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_Mem16 }, }, 9333 { 4859 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, }, 9334 { 4859 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9335 { 4859 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 9336 { 4859 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 9337 { 4859 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 9338 { 4859 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, AMFBS_None, { MCK_MemOffs16_16, MCK_AX }, }, 9339 { 4859 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, AMFBS_None, { MCK_MemOffs32_16, MCK_AX }, }, 9340 { 4859 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_SEGMENT_REG }, }, 9341 { 4859 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9342 { 4864 /* movw.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9343 { 4871 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, }, 9344 { 4871 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, }, 9345 { 4878 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, }, 9346 { 4878 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR64 }, }, 9347 { 4885 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, }, 9348 { 4885 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, }, 9349 { 4892 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, }, 9350 { 4892 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, }, 9351 { 4899 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, }, 9352 { 4899 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, }, 9353 { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, }, 9354 { 4906 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, }, 9355 { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, }, 9356 { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, }, 9357 { 4906 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, }, 9358 { 4906 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, }, 9359 { 4912 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9360 { 4912 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9361 { 4924 /* mulb */, X86::MUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 9362 { 4924 /* mulb */, X86::MUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9363 { 4929 /* mull */, X86::MUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 9364 { 4929 /* mull */, X86::MUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 9365 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9366 { 4934 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9367 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9368 { 4940 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9369 { 4946 /* mulq */, X86::MUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 9370 { 4946 /* mulq */, X86::MUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9371 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9372 { 4951 /* mulsd */, X86::MULSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9373 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9374 { 4957 /* mulss */, X86::MULSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9375 { 4963 /* mulw */, X86::MUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9376 { 4963 /* mulw */, X86::MUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9377 { 4973 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 9378 { 4973 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, }, 9379 { 4979 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 9380 { 4979 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, }, 9381 { 4985 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_None, { }, }, 9382 { 4985 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX }, }, 9383 { 4985 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX }, }, 9384 { 4991 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_None, { }, }, 9385 { 4991 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, }, 9386 { 4991 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, }, 9387 { 5002 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 9388 { 5002 /* negb */, X86::NEG8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9389 { 5007 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 9390 { 5007 /* negl */, X86::NEG32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 9391 { 5012 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 9392 { 5012 /* negq */, X86::NEG64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9393 { 5017 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 9394 { 5017 /* negw */, X86::NEG16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9395 { 5022 /* nop */, X86::NOOP, Convert_NoOperands, AMFBS_None, { }, }, 9396 { 5026 /* nopl */, X86::NOOPLr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 9397 { 5026 /* nopl */, X86::NOOPL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 9398 { 5031 /* nopq */, X86::NOOPQr, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 9399 { 5031 /* nopq */, X86::NOOPQ, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9400 { 5036 /* nopw */, X86::NOOPWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9401 { 5036 /* nopw */, X86::NOOPW, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9402 { 5045 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 9403 { 5045 /* notb */, X86::NOT8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9404 { 5050 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 9405 { 5050 /* notl */, X86::NOT32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 9406 { 5055 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 9407 { 5055 /* notq */, X86::NOT64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9408 { 5060 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 9409 { 5060 /* notw */, X86::NOT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9410 { 5068 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 9411 { 5068 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 9412 { 5068 /* orb */, X86::OR8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 9413 { 5068 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 9414 { 5068 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 9415 { 5068 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 9416 { 5072 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9417 { 5072 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 9418 { 5072 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 9419 { 5072 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 9420 { 5072 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 9421 { 5072 /* orl */, X86::OR32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 9422 { 5072 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 9423 { 5072 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 9424 { 5072 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 9425 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9426 { 5076 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9427 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9428 { 5081 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9429 { 5086 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 9430 { 5086 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 9431 { 5086 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 9432 { 5086 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 9433 { 5086 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 9434 { 5086 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 9435 { 5086 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 9436 { 5086 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 9437 { 5086 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 9438 { 5090 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9439 { 5090 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 9440 { 5090 /* orw */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 9441 { 5090 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 9442 { 5090 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 9443 { 5090 /* orw */, X86::OR16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 9444 { 5090 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 9445 { 5090 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 9446 { 5090 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9447 { 5098 /* outb */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 9448 { 5098 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 9449 { 5098 /* outb */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_AL, MCK_DX }, }, 9450 { 5098 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AL, MCK_ImmUnsignedi8 }, }, 9451 { 5103 /* outl */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 9452 { 5103 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 9453 { 5103 /* outl */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_EAX, MCK_DX }, }, 9454 { 5103 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_EAX, MCK_ImmUnsignedi8 }, }, 9455 { 5113 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DX }, }, 9456 { 5125 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DX }, }, 9457 { 5131 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DX }, }, 9458 { 5137 /* outw */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 9459 { 5137 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 9460 { 5137 /* outw */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_AX, MCK_DX }, }, 9461 { 5137 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AX, MCK_ImmUnsignedi8 }, }, 9462 { 5142 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9463 { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9464 { 5142 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9465 { 5142 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9466 { 5148 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9467 { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9468 { 5148 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9469 { 5148 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9470 { 5154 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9471 { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9472 { 5154 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9473 { 5154 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9474 { 5160 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9475 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9476 { 5160 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9477 { 5160 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9478 { 5169 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9479 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9480 { 5169 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9481 { 5169 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9482 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9483 { 5178 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9484 { 5187 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9485 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9486 { 5187 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9487 { 5187 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9488 { 5196 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9489 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9490 { 5196 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9491 { 5196 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9492 { 5202 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9493 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9494 { 5202 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9495 { 5202 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9496 { 5208 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9497 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9498 { 5208 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9499 { 5208 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9500 { 5214 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9501 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9502 { 5214 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9503 { 5214 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9504 { 5221 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9505 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9506 { 5221 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9507 { 5221 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9508 { 5228 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9509 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9510 { 5228 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9511 { 5228 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9512 { 5236 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9513 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9514 { 5236 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9515 { 5236 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9516 { 5244 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9517 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9518 { 5244 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9519 { 5244 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9520 { 5250 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, }, 9521 { 5250 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9522 { 5250 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9523 { 5250 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, }, 9524 { 5258 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9525 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9526 { 5258 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9527 { 5258 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9528 { 5263 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9529 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9530 { 5263 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9531 { 5263 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9532 { 5269 /* pause */, X86::PAUSE, Convert_NoOperands, AMFBS_None, { }, }, 9533 { 5275 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9534 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9535 { 5275 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9536 { 5275 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9537 { 5281 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9538 { 5281 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9539 { 5289 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9540 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9541 { 5289 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9542 { 5289 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9543 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9544 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9545 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, }, 9546 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, }, 9547 { 5304 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9548 { 5304 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9549 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9550 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9551 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9552 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9553 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9554 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9555 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9556 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9557 { 5364 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9558 { 5364 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9559 { 5374 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9560 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9561 { 5374 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9562 { 5374 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9563 { 5382 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9564 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9565 { 5382 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9566 { 5382 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9567 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9568 { 5390 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9569 { 5398 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9570 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9571 { 5398 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9572 { 5398 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9573 { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9574 { 5406 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9575 { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9576 { 5416 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9577 { 5426 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9578 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9579 { 5426 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9580 { 5426 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9581 { 5434 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9582 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9583 { 5434 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9584 { 5434 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9585 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9586 { 5442 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9587 { 5450 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9588 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9589 { 5450 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9590 { 5450 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9591 { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9592 { 5458 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9593 { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9594 { 5468 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9595 { 5478 /* pconfig */, X86::PCONFIG, Convert_NoOperands, AMFBS_None, { }, }, 9596 { 5491 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 9597 { 5491 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, }, 9598 { 5497 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 9599 { 5497 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, }, 9600 { 5508 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 9601 { 5508 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, }, 9602 { 5514 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 9603 { 5514 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, }, 9604 { 5520 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, }, 9605 { 5520 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, }, 9606 { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, }, 9607 { 5527 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, }, 9608 { 5534 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, }, 9609 { 5534 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, }, 9610 { 5541 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, }, 9611 { 5541 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, }, 9612 { 5541 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, }, 9613 { 5548 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9614 { 5548 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9615 { 5554 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9616 { 5554 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9617 { 5560 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9618 { 5560 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9619 { 5566 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9620 { 5566 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9621 { 5572 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9622 { 5572 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9623 { 5580 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9624 { 5580 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9625 { 5588 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9626 { 5588 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9627 { 5596 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9628 { 5596 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9629 { 5602 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9630 { 5602 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9631 { 5608 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9632 { 5608 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9633 { 5614 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9634 { 5614 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9635 { 5621 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9636 { 5621 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9637 { 5629 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9638 { 5629 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9639 { 5635 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9640 { 5635 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9641 { 5644 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9642 { 5644 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9643 { 5653 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9644 { 5653 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9645 { 5662 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9646 { 5662 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9647 { 5670 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9648 { 5670 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9649 { 5676 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9650 { 5676 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9651 { 5683 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9652 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9653 { 5683 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9654 { 5683 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9655 { 5690 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9656 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9657 { 5690 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9658 { 5690 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9659 { 5698 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9660 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9661 { 5698 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9662 { 5698 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9663 { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9664 { 5705 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9665 { 5716 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9666 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9667 { 5716 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9668 { 5716 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9669 { 5723 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9670 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9671 { 5723 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9672 { 5723 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9673 { 5731 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9674 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9675 { 5731 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9676 { 5731 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9677 { 5738 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9678 { 5738 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9679 { 5744 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9680 { 5744 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9681 { 5750 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, }, 9682 { 5750 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, }, 9683 { 5757 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, }, 9684 { 5757 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, }, 9685 { 5764 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, }, 9686 { 5764 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, }, 9687 { 5771 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, }, 9688 { 5771 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, }, 9689 { 5771 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, }, 9690 { 5771 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, }, 9691 { 5778 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9692 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9693 { 5778 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9694 { 5778 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9695 { 5788 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9696 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9697 { 5788 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9698 { 5788 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9699 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9700 { 5796 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9701 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9702 { 5803 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9703 { 5810 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9704 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9705 { 5810 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9706 { 5810 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9707 { 5817 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9708 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9709 { 5817 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9710 { 5817 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9711 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9712 { 5824 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9713 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9714 { 5831 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9715 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9716 { 5838 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9717 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9718 { 5845 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9719 { 5852 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9720 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9721 { 5852 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9722 { 5852 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9723 { 5859 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9724 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9725 { 5859 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9726 { 5859 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9727 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9728 { 5866 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9729 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9730 { 5873 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9731 { 5880 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR32orGR64 }, }, 9732 { 5880 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, }, 9733 { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9734 { 5889 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9735 { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9736 { 5898 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, }, 9737 { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9738 { 5907 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9739 { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9740 { 5916 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9741 { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9742 { 5925 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9743 { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9744 { 5934 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9745 { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9746 { 5943 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9747 { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9748 { 5952 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, }, 9749 { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9750 { 5961 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9751 { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9752 { 5970 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9753 { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9754 { 5979 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 9755 { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9756 { 5988 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 9757 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9758 { 5997 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9759 { 6004 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9760 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9761 { 6004 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9762 { 6004 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9763 { 6013 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9764 { 6013 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9765 { 6021 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9766 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9767 { 6021 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9768 { 6021 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9769 { 6029 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9770 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9771 { 6029 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9772 { 6029 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9773 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9774 { 6036 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9775 { 6043 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9776 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9777 { 6043 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9778 { 6043 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9779 { 6050 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9780 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9781 { 6050 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9782 { 6050 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9783 { 6062 /* popal */, X86::POPA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9784 { 6068 /* popaw */, X86::POPA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9785 { 6081 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 9786 { 6081 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 9787 { 6089 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 9788 { 6089 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 9789 { 6097 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 9790 { 6097 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 9791 { 6116 /* popfl */, X86::POPF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9792 { 6122 /* popfq */, X86::POPF64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 9793 { 6128 /* popfw */, X86::POPF16, Convert_NoOperands, AMFBS_None, { }, }, 9794 { 6134 /* popl */, X86::POPDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 9795 { 6134 /* popl */, X86::POPES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 9796 { 6134 /* popl */, X86::POPFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, }, 9797 { 6134 /* popl */, X86::POPGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, }, 9798 { 6134 /* popl */, X86::POPSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 9799 { 6134 /* popl */, X86::POP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 9800 { 6134 /* popl */, X86::POP32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, }, 9801 { 6139 /* popq */, X86::POPFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, }, 9802 { 6139 /* popq */, X86::POPGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, }, 9803 { 6139 /* popq */, X86::POP64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 9804 { 6139 /* popq */, X86::POP64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9805 { 6144 /* popw */, X86::POPDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 9806 { 6144 /* popw */, X86::POPES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 9807 { 6144 /* popw */, X86::POPFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, }, 9808 { 6144 /* popw */, X86::POPGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, }, 9809 { 6144 /* popw */, X86::POPSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 9810 { 6144 /* popw */, X86::POP16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9811 { 6144 /* popw */, X86::POP16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 9812 { 6149 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9813 { 6149 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9814 { 6149 /* por */, X86::PORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9815 { 6149 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9816 { 6153 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9817 { 6162 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9818 { 6174 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9819 { 6185 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9820 { 6196 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9821 { 6207 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9822 { 6217 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 9823 { 6229 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9824 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9825 { 6229 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9826 { 6229 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9827 { 6236 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9828 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9829 { 6236 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9830 { 6236 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9831 { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9832 { 6243 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9833 { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9834 { 6250 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9835 { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 9836 { 6258 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 9837 { 6266 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, }, 9838 { 6266 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, }, 9839 { 6273 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9840 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9841 { 6273 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9842 { 6273 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9843 { 6280 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9844 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9845 { 6280 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9846 { 6280 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9847 { 6287 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9848 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9849 { 6287 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9850 { 6287 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9851 { 6294 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9852 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9853 { 6294 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9854 { 6294 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9855 { 6294 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9856 { 6294 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9857 { 6300 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9858 { 6307 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9859 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9860 { 6307 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9861 { 6307 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9862 { 6307 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9863 { 6307 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9864 { 6313 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9865 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9866 { 6313 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9867 { 6313 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9868 { 6313 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9869 { 6313 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9870 { 6319 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9871 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9872 { 6319 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9873 { 6319 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9874 { 6319 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9875 { 6319 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9876 { 6325 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9877 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9878 { 6325 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9879 { 6325 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9880 { 6325 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9881 { 6325 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9882 { 6331 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9883 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9884 { 6331 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9885 { 6331 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9886 { 6331 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9887 { 6331 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9888 { 6337 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9889 { 6344 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9890 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9891 { 6344 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9892 { 6344 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9893 { 6344 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9894 { 6344 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9895 { 6350 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9896 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9897 { 6350 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, }, 9898 { 6350 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, }, 9899 { 6350 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9900 { 6350 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9901 { 6356 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9902 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9903 { 6356 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9904 { 6356 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9905 { 6362 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9906 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9907 { 6362 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9908 { 6362 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9909 { 6368 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9910 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9911 { 6368 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9912 { 6368 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9913 { 6374 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9914 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9915 { 6374 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9916 { 6374 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9917 { 6381 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9918 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9919 { 6381 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9920 { 6381 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9921 { 6388 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9922 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9923 { 6388 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9924 { 6388 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9925 { 6396 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9926 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9927 { 6396 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9928 { 6396 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9929 { 6404 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9930 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9931 { 6404 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9932 { 6404 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9933 { 6410 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9934 { 6410 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9935 { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9936 { 6417 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9937 { 6431 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 9938 { 6431 /* ptwritel */, X86::PTWRITEm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 9939 { 6440 /* ptwriteq */, X86::PTWRITE64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 9940 { 6440 /* ptwriteq */, X86::PTWRITE64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9941 { 6449 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9942 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9943 { 6449 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9944 { 6449 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9945 { 6459 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9946 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9947 { 6459 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9948 { 6459 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9949 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9950 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9951 { 6480 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9952 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9953 { 6480 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9954 { 6480 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 9955 { 6490 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9956 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9957 { 6490 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9958 { 6490 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, }, 9959 { 6500 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9960 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9961 { 6500 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9962 { 6500 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, }, 9963 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9964 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9965 { 6521 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 9966 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 9967 { 6521 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 9968 { 6521 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, }, 9969 { 6536 /* pushal */, X86::PUSHA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9970 { 6543 /* pushaw */, X86::PUSHA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9971 { 6563 /* pushfl */, X86::PUSHF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 9972 { 6570 /* pushfq */, X86::PUSHF64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 9973 { 6577 /* pushfw */, X86::PUSHF16, Convert_NoOperands, AMFBS_None, { }, }, 9974 { 6584 /* pushl */, X86::PUSHCS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, }, 9975 { 6584 /* pushl */, X86::PUSHDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 9976 { 6584 /* pushl */, X86::PUSHES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 9977 { 6584 /* pushl */, X86::PUSHFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, }, 9978 { 6584 /* pushl */, X86::PUSHGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, }, 9979 { 6584 /* pushl */, X86::PUSHSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 9980 { 6584 /* pushl */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 9981 { 6584 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, AMFBS_Not64BitMode, { MCK_ImmSExti32i8 }, }, 9982 { 6584 /* pushl */, X86::PUSHi32, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 9983 { 6584 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, }, 9984 { 6590 /* pushq */, X86::PUSHFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, }, 9985 { 6590 /* pushq */, X86::PUSHGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, }, 9986 { 6590 /* pushq */, X86::PUSH64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 9987 { 6590 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8 }, }, 9988 { 6590 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32 }, }, 9989 { 6590 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 9990 { 6596 /* pushw */, X86::PUSHCS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, }, 9991 { 6596 /* pushw */, X86::PUSHDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 9992 { 6596 /* pushw */, X86::PUSHES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 9993 { 6596 /* pushw */, X86::PUSHFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, }, 9994 { 6596 /* pushw */, X86::PUSHGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, }, 9995 { 6596 /* pushw */, X86::PUSHSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 9996 { 6596 /* pushw */, X86::PUSH16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 9997 { 6596 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8 }, }, 9998 { 6596 /* pushw */, X86::PUSHi16, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 9999 { 6596 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10000 { 6602 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 10001 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10002 { 6602 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10003 { 6602 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 10004 { 6611 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10005 { 6611 /* rclb */, X86::RCL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10006 { 6611 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10007 { 6611 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10008 { 6611 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10009 { 6611 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10010 { 6616 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10011 { 6616 /* rcll */, X86::RCL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10012 { 6616 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10013 { 6616 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10014 { 6616 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10015 { 6616 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10016 { 6621 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10017 { 6621 /* rclq */, X86::RCL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10018 { 6621 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10019 { 6621 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10020 { 6621 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10021 { 6621 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10022 { 6626 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10023 { 6626 /* rclw */, X86::RCL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10024 { 6626 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10025 { 6626 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10026 { 6626 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10027 { 6626 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10028 { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10029 { 6631 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10030 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10031 { 6637 /* rcpss */, X86::RCPSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 10032 { 6647 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10033 { 6647 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10034 { 6647 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10035 { 6647 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10036 { 6647 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10037 { 6647 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10038 { 6652 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10039 { 6652 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10040 { 6652 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10041 { 6652 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10042 { 6652 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10043 { 6652 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10044 { 6657 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10045 { 6657 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10046 { 6657 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10047 { 6657 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10048 { 6657 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10049 { 6657 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10050 { 6662 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10051 { 6662 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10052 { 6662 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10053 { 6662 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10054 { 6662 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10055 { 6662 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10056 { 6676 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 10057 { 6686 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 10058 { 6705 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 10059 { 6715 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 10060 { 6725 /* rdmsr */, X86::RDMSR, Convert_NoOperands, AMFBS_None, { }, }, 10061 { 6731 /* rdpid */, X86::RDPID32, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 10062 { 6731 /* rdpid */, X86::RDPID64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 10063 { 6737 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, AMFBS_None, { }, }, 10064 { 6744 /* rdpmc */, X86::RDPMC, Convert_NoOperands, AMFBS_None, { }, }, 10065 { 6757 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10066 { 6765 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 10067 { 6773 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 10068 { 6788 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10069 { 6796 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 10070 { 6804 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 10071 { 6812 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10072 { 6819 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10073 { 6826 /* rdtsc */, X86::RDTSC, Convert_NoOperands, AMFBS_None, { }, }, 10074 { 6832 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, AMFBS_None, { }, }, 10075 { 6839 /* rep */, X86::REP_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 10076 { 6843 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 10077 { 6864 /* retl */, X86::RETL, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 10078 { 6864 /* retl */, X86::RETIL, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 10079 { 6869 /* retq */, X86::RETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 10080 { 6869 /* retq */, X86::RETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, }, 10081 { 6874 /* retw */, X86::RETW, Convert_NoOperands, AMFBS_None, { }, }, 10082 { 6874 /* retw */, X86::RETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 10083 { 6879 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 10084 { 6889 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10085 { 6889 /* rolb */, X86::ROL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10086 { 6889 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10087 { 6889 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10088 { 6889 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10089 { 6889 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10090 { 6894 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10091 { 6894 /* roll */, X86::ROL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10092 { 6894 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10093 { 6894 /* roll */, X86::ROL32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10094 { 6894 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10095 { 6894 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10096 { 6899 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10097 { 6899 /* rolq */, X86::ROL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10098 { 6899 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10099 { 6899 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10100 { 6899 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10101 { 6899 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10102 { 6904 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10103 { 6904 /* rolw */, X86::ROL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10104 { 6904 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10105 { 6904 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10106 { 6904 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10107 { 6904 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10108 { 6913 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10109 { 6913 /* rorb */, X86::ROR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10110 { 6913 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10111 { 6913 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10112 { 6913 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10113 { 6913 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10114 { 6918 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10115 { 6918 /* rorl */, X86::ROR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10116 { 6918 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10117 { 6918 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10118 { 6918 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10119 { 6918 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10120 { 6923 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10121 { 6923 /* rorq */, X86::ROR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10122 { 6923 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10123 { 6923 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10124 { 6923 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10125 { 6923 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10126 { 6928 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10127 { 6928 /* rorw */, X86::ROR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10128 { 6928 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10129 { 6928 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10130 { 6928 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10131 { 6928 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10132 { 6938 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, }, 10133 { 6938 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, }, 10134 { 6944 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, }, 10135 { 6944 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, }, 10136 { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10137 { 6950 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 10138 { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10139 { 6958 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 10140 { 6966 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10141 { 6966 /* roundsd */, X86::ROUNDSDm_Int, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, }, 10142 { 6974 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10143 { 6974 /* roundss */, X86::ROUNDSSm_Int, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, }, 10144 { 6982 /* rsm */, X86::RSM, Convert_NoOperands, AMFBS_None, { }, }, 10145 { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10146 { 6986 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10147 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10148 { 6994 /* rsqrtss */, X86::RSQRTSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 10149 { 7002 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10150 { 7011 /* sahf */, X86::SAHF, Convert_NoOperands, AMFBS_None, { }, }, 10151 { 7016 /* salc */, X86::SALC, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 10152 { 7025 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10153 { 7025 /* sarb */, X86::SAR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10154 { 7025 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10155 { 7025 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10156 { 7025 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10157 { 7025 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10158 { 7030 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10159 { 7030 /* sarl */, X86::SAR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10160 { 7030 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10161 { 7030 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10162 { 7030 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10163 { 7030 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10164 { 7035 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10165 { 7035 /* sarq */, X86::SAR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10166 { 7035 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10167 { 7035 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10168 { 7035 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10169 { 7035 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10170 { 7040 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10171 { 7040 /* sarw */, X86::SAR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10172 { 7040 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10173 { 7040 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10174 { 7040 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10175 { 7040 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10176 { 7050 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 10177 { 7050 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 10178 { 7056 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 10179 { 7056 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 10180 { 7062 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, AMFBS_None, { }, }, 10181 { 7078 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 10182 { 7078 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 10183 { 7078 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 10184 { 7078 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 10185 { 7078 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 10186 { 7078 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 10187 { 7083 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10188 { 7083 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 10189 { 7083 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 10190 { 7083 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 10191 { 7083 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 10192 { 7083 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 10193 { 7083 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 10194 { 7083 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 10195 { 7083 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 10196 { 7088 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10197 { 7088 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 10198 { 7088 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 10199 { 7088 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 10200 { 7088 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 10201 { 7088 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 10202 { 7088 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 10203 { 7088 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 10204 { 7088 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 10205 { 7093 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 10206 { 7093 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 10207 { 7093 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 10208 { 7093 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 10209 { 7093 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 10210 { 7093 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 10211 { 7093 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 10212 { 7093 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 10213 { 7093 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 10214 { 7098 /* scas */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, }, 10215 { 7098 /* scas */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, }, 10216 { 7098 /* scas */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, }, 10217 { 7098 /* scas */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, }, 10218 { 7103 /* scasb */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, }, 10219 { 7103 /* scasb */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, }, 10220 { 7115 /* scasl */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, }, 10221 { 7115 /* scasl */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, }, 10222 { 7121 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, }, 10223 { 7121 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, }, 10224 { 7127 /* scasw */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, }, 10225 { 7127 /* scasw */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, }, 10226 { 7133 /* seta */, X86::SETCCr, Convert__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR8 }, }, 10227 { 7133 /* seta */, X86::SETCCm, Convert__Mem85_0__imm_95_7, AMFBS_None, { MCK_Mem8 }, }, 10228 { 7138 /* setae */, X86::SETCCr, Convert__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR8 }, }, 10229 { 7138 /* setae */, X86::SETCCm, Convert__Mem85_0__imm_95_3, AMFBS_None, { MCK_Mem8 }, }, 10230 { 7144 /* setb */, X86::SETCCr, Convert__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR8 }, }, 10231 { 7144 /* setb */, X86::SETCCm, Convert__Mem85_0__imm_95_2, AMFBS_None, { MCK_Mem8 }, }, 10232 { 7149 /* setbe */, X86::SETCCr, Convert__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR8 }, }, 10233 { 7149 /* setbe */, X86::SETCCm, Convert__Mem85_0__imm_95_6, AMFBS_None, { MCK_Mem8 }, }, 10234 { 7155 /* sete */, X86::SETCCr, Convert__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR8 }, }, 10235 { 7155 /* sete */, X86::SETCCm, Convert__Mem85_0__imm_95_4, AMFBS_None, { MCK_Mem8 }, }, 10236 { 7160 /* setg */, X86::SETCCr, Convert__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR8 }, }, 10237 { 7160 /* setg */, X86::SETCCm, Convert__Mem85_0__imm_95_15, AMFBS_None, { MCK_Mem8 }, }, 10238 { 7165 /* setge */, X86::SETCCr, Convert__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR8 }, }, 10239 { 7165 /* setge */, X86::SETCCm, Convert__Mem85_0__imm_95_13, AMFBS_None, { MCK_Mem8 }, }, 10240 { 7171 /* setl */, X86::SETCCr, Convert__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR8 }, }, 10241 { 7171 /* setl */, X86::SETCCm, Convert__Mem85_0__imm_95_12, AMFBS_None, { MCK_Mem8 }, }, 10242 { 7176 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, }, 10243 { 7176 /* setle */, X86::SETCCm, Convert__Mem85_0__imm_95_14, AMFBS_None, { MCK_Mem8 }, }, 10244 { 7182 /* setne */, X86::SETCCr, Convert__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR8 }, }, 10245 { 7182 /* setne */, X86::SETCCm, Convert__Mem85_0__imm_95_5, AMFBS_None, { MCK_Mem8 }, }, 10246 { 7188 /* setno */, X86::SETCCr, Convert__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR8 }, }, 10247 { 7188 /* setno */, X86::SETCCm, Convert__Mem85_0__imm_95_1, AMFBS_None, { MCK_Mem8 }, }, 10248 { 7194 /* setnp */, X86::SETCCr, Convert__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR8 }, }, 10249 { 7194 /* setnp */, X86::SETCCm, Convert__Mem85_0__imm_95_11, AMFBS_None, { MCK_Mem8 }, }, 10250 { 7200 /* setns */, X86::SETCCr, Convert__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR8 }, }, 10251 { 7200 /* setns */, X86::SETCCm, Convert__Mem85_0__imm_95_9, AMFBS_None, { MCK_Mem8 }, }, 10252 { 7206 /* seto */, X86::SETCCr, Convert__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR8 }, }, 10253 { 7206 /* seto */, X86::SETCCm, Convert__Mem85_0__imm_95_0, AMFBS_None, { MCK_Mem8 }, }, 10254 { 7211 /* setp */, X86::SETCCr, Convert__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR8 }, }, 10255 { 7211 /* setp */, X86::SETCCm, Convert__Mem85_0__imm_95_10, AMFBS_None, { MCK_Mem8 }, }, 10256 { 7216 /* sets */, X86::SETCCr, Convert__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR8 }, }, 10257 { 7216 /* sets */, X86::SETCCm, Convert__Mem85_0__imm_95_8, AMFBS_None, { MCK_Mem8 }, }, 10258 { 7221 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, AMFBS_None, { }, }, 10259 { 7230 /* sfence */, X86::SFENCE, Convert_NoOperands, AMFBS_None, { }, }, 10260 { 7248 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 10261 { 7254 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 10262 { 7260 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 10263 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10264 { 7266 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10265 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10266 { 7275 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10267 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10268 { 7284 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10269 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10270 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 10271 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10272 { 7304 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10273 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10274 { 7315 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10275 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10276 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10277 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, }, 10278 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, }, 10279 { 7342 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10280 { 7342 /* shlb */, X86::SHL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10281 { 7342 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10282 { 7342 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10283 { 7342 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10284 { 7342 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10285 { 7352 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10286 { 7352 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 10287 { 7352 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, }, 10288 { 7352 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_Mem32 }, }, 10289 { 7352 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, }, 10290 { 7352 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, }, 10291 { 7358 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10292 { 7358 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 10293 { 7358 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_GR64 }, }, 10294 { 7358 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_Mem64 }, }, 10295 { 7358 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, }, 10296 { 7358 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, }, 10297 { 7364 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 10298 { 7364 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 10299 { 7364 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, }, 10300 { 7364 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_Mem16 }, }, 10301 { 7364 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, }, 10302 { 7364 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, }, 10303 { 7370 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10304 { 7370 /* shll */, X86::SHL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10305 { 7370 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10306 { 7370 /* shll */, X86::SHL32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10307 { 7370 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10308 { 7370 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10309 { 7375 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10310 { 7375 /* shlq */, X86::SHL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10311 { 7375 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10312 { 7375 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10313 { 7375 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10314 { 7375 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10315 { 7380 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10316 { 7380 /* shlw */, X86::SHL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10317 { 7380 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10318 { 7380 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10319 { 7380 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10320 { 7380 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10321 { 7390 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 10322 { 7390 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 10323 { 7396 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 10324 { 7396 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 10325 { 7406 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 10326 { 7406 /* shrb */, X86::SHR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 10327 { 7406 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, }, 10328 { 7406 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, }, 10329 { 7406 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, }, 10330 { 7406 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, }, 10331 { 7416 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10332 { 7416 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 10333 { 7416 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, }, 10334 { 7416 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_Mem32 }, }, 10335 { 7416 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, }, 10336 { 7416 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, }, 10337 { 7422 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10338 { 7422 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 10339 { 7422 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_GR64 }, }, 10340 { 7422 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_Mem64 }, }, 10341 { 7422 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, }, 10342 { 7422 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, }, 10343 { 7428 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 10344 { 7428 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 10345 { 7428 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, }, 10346 { 7428 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_Mem16 }, }, 10347 { 7428 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, }, 10348 { 7428 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, }, 10349 { 7434 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 10350 { 7434 /* shrl */, X86::SHR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10351 { 7434 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, }, 10352 { 7434 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, }, 10353 { 7434 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, }, 10354 { 7434 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, }, 10355 { 7439 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 10356 { 7439 /* shrq */, X86::SHR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 10357 { 7439 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, }, 10358 { 7439 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, }, 10359 { 7439 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, }, 10360 { 7439 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, }, 10361 { 7444 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 10362 { 7444 /* shrw */, X86::SHR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10363 { 7444 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, }, 10364 { 7444 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, }, 10365 { 7444 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, }, 10366 { 7444 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, }, 10367 { 7454 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 10368 { 7454 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 10369 { 7460 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 10370 { 7460 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 10371 { 7466 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10372 { 7466 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 10373 { 7473 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10374 { 7473 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 10375 { 7491 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 10376 { 7497 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 10377 { 7503 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 10378 { 7509 /* skinit */, X86::SKINIT, Convert_NoOperands, AMFBS_None, { MCK_EAX }, }, 10379 { 7516 /* sldt */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10380 { 7521 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10381 { 7527 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 10382 { 7533 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 10383 { 7533 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10384 { 7539 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10385 { 7539 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 10386 { 7551 /* smswl */, X86::SMSW32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10387 { 7557 /* smswq */, X86::SMSW64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 10388 { 7563 /* smsww */, X86::SMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 10389 { 7563 /* smsww */, X86::SMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10390 { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10391 { 7569 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10392 { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10393 { 7576 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10394 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10395 { 7583 /* sqrtsd */, X86::SQRTSDm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 10396 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10397 { 7590 /* sqrtss */, X86::SQRTSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 10398 { 7597 /* ss */, X86::SS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 10399 { 7600 /* stac */, X86::STAC, Convert_NoOperands, AMFBS_None, { }, }, 10400 { 7605 /* stc */, X86::STC, Convert_NoOperands, AMFBS_None, { }, }, 10401 { 7609 /* std */, X86::STD, Convert_NoOperands, AMFBS_None, { }, }, 10402 { 7613 /* stgi */, X86::STGI, Convert_NoOperands, AMFBS_None, { }, }, 10403 { 7618 /* sti */, X86::STI, Convert_NoOperands, AMFBS_None, { }, }, 10404 { 7622 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 10405 { 7630 /* stos */, X86::STOSB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, }, 10406 { 7630 /* stos */, X86::STOSW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, }, 10407 { 7630 /* stos */, X86::STOSL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, }, 10408 { 7630 /* stos */, X86::STOSQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, }, 10409 { 7635 /* stosb */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, }, 10410 { 7635 /* stosb */, X86::STOSB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, }, 10411 { 7647 /* stosl */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, }, 10412 { 7647 /* stosl */, X86::STOSL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, }, 10413 { 7653 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, }, 10414 { 7653 /* stosq */, X86::STOSQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, }, 10415 { 7659 /* stosw */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, }, 10416 { 7659 /* stosw */, X86::STOSW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, }, 10417 { 7669 /* strl */, X86::STR32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10418 { 7674 /* strq */, X86::STR64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 10419 { 7679 /* strw */, X86::STR16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 10420 { 7679 /* strw */, X86::STRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 10421 { 7688 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 10422 { 7688 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 10423 { 7688 /* subb */, X86::SUB8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 10424 { 7688 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 10425 { 7688 /* subb */, X86::SUB8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 10426 { 7688 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 10427 { 7693 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10428 { 7693 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 10429 { 7693 /* subl */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 10430 { 7693 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 10431 { 7693 /* subl */, X86::SUB32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 10432 { 7693 /* subl */, X86::SUB32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 10433 { 7693 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 10434 { 7693 /* subl */, X86::SUB32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 10435 { 7693 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 10436 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10437 { 7698 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10438 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10439 { 7704 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10440 { 7710 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10441 { 7710 /* subq */, X86::SUB64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 10442 { 7710 /* subq */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 10443 { 7710 /* subq */, X86::SUB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 10444 { 7710 /* subq */, X86::SUB64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 10445 { 7710 /* subq */, X86::SUB64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 10446 { 7710 /* subq */, X86::SUB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 10447 { 7710 /* subq */, X86::SUB64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 10448 { 7710 /* subq */, X86::SUB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 10449 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10450 { 7715 /* subsd */, X86::SUBSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 10451 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10452 { 7721 /* subss */, X86::SUBSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 10453 { 7727 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 10454 { 7727 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 10455 { 7727 /* subw */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 10456 { 7727 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 10457 { 7727 /* subw */, X86::SUB16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 10458 { 7727 /* subw */, X86::SUB16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 10459 { 7727 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 10460 { 7727 /* subw */, X86::SUB16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 10461 { 7727 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 10462 { 7732 /* swapgs */, X86::SWAPGS, Convert_NoOperands, AMFBS_None, { }, }, 10463 { 7739 /* syscall */, X86::SYSCALL, Convert_NoOperands, AMFBS_None, { }, }, 10464 { 7747 /* sysenter */, X86::SYSENTER, Convert_NoOperands, AMFBS_None, { }, }, 10465 { 7764 /* sysexitl */, X86::SYSEXIT, Convert_NoOperands, AMFBS_None, { }, }, 10466 { 7773 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 10467 { 7789 /* sysretl */, X86::SYSRET, Convert_NoOperands, AMFBS_None, { }, }, 10468 { 7797 /* sysretq */, X86::SYSRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 10469 { 7812 /* t1mskcl */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10470 { 7812 /* t1mskcl */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 10471 { 7820 /* t1mskcq */, X86::T1MSKC64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10472 { 7820 /* t1mskcq */, X86::T1MSKC64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 10473 { 7833 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 10474 { 7833 /* testb */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 10475 { 7833 /* testb */, X86::TEST8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 10476 { 7833 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 10477 { 7833 /* testb */, X86::TEST8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 10478 { 7833 /* testb */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 10479 { 7839 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10480 { 7839 /* testl */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 10481 { 7839 /* testl */, X86::TEST32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 10482 { 7839 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 10483 { 7839 /* testl */, X86::TEST32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 10484 { 7839 /* testl */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 10485 { 7845 /* testq */, X86::TEST64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10486 { 7845 /* testq */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 10487 { 7845 /* testq */, X86::TEST64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 10488 { 7845 /* testq */, X86::TEST64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_GR64 }, }, 10489 { 7845 /* testq */, X86::TEST64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 10490 { 7845 /* testq */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 10491 { 7851 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 10492 { 7851 /* testw */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 10493 { 7851 /* testw */, X86::TEST16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 10494 { 7851 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 10495 { 7851 /* testw */, X86::TEST16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 10496 { 7851 /* testw */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 10497 { 7857 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, }, 10498 { 7870 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10499 { 7870 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 10500 { 7877 /* tzcntq */, X86::TZCNT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10501 { 7877 /* tzcntq */, X86::TZCNT64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 10502 { 7884 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 10503 { 7884 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 10504 { 7897 /* tzmskl */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 10505 { 7897 /* tzmskl */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 10506 { 7904 /* tzmskq */, X86::TZMSK64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 10507 { 7904 /* tzmskq */, X86::TZMSK64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 10508 { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10509 { 7911 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 10510 { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10511 { 7919 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 10512 { 7927 /* ud2 */, X86::TRAP, Convert_NoOperands, AMFBS_None, { }, }, 10513 { 7931 /* ud2b */, X86::UD2B, Convert_NoOperands, AMFBS_None, { }, }, 10514 { 7936 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, }, 10515 { 7936 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 10516 { 7936 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 10517 { 7945 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, }, 10518 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10519 { 7952 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10520 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10521 { 7961 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10522 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10523 { 7970 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10524 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10525 { 7979 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10526 { 7988 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 10527 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10528 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10529 { 7998 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10530 { 7998 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10531 { 7998 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10532 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 10533 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10534 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10535 { 8019 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10536 { 8019 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10537 { 8019 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10538 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10539 { 8030 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10540 { 8030 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10541 { 8030 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10542 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10543 { 8030 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10544 { 8030 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10545 { 8030 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10546 { 8030 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10547 { 8030 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10548 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10549 { 8030 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 10550 { 8030 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 10551 { 8030 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 10552 { 8030 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10553 { 8030 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10554 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10555 { 8030 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10556 { 8030 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10557 { 8030 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10558 { 8030 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10559 { 8030 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10560 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10561 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10562 { 8030 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10563 { 8030 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10564 { 8030 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10565 { 8030 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10566 { 8030 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10567 { 8030 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10568 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10569 { 8030 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10570 { 8030 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10571 { 8030 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10572 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10573 { 8037 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10574 { 8037 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10575 { 8037 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10576 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10577 { 8037 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10578 { 8037 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10579 { 8037 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10580 { 8037 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10581 { 8037 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10582 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10583 { 8037 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 10584 { 8037 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 10585 { 8037 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 10586 { 8037 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10587 { 8037 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10588 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10589 { 8037 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10590 { 8037 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10591 { 8037 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10592 { 8037 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10593 { 8037 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10594 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10595 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10596 { 8037 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10597 { 8037 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10598 { 8037 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10599 { 8037 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10600 { 8037 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10601 { 8037 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10602 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10603 { 8037 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10604 { 8037 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10605 { 8037 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10606 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10607 { 8044 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10608 { 8044 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 10609 { 8044 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 10610 { 8044 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10611 { 8044 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10612 { 8044 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10613 { 8044 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10614 { 8044 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10615 { 8044 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10616 { 8044 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10617 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10618 { 8051 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10619 { 8051 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 10620 { 8051 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 10621 { 8051 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10622 { 8051 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10623 { 8051 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10624 { 8051 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10625 { 8051 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10626 { 8051 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10627 { 8051 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10628 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10629 { 8058 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10630 { 8058 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10631 { 8058 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10632 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10633 { 8068 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10634 { 8068 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10635 { 8068 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10636 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10637 { 8078 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10638 { 8078 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10639 { 8078 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10640 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10641 { 8078 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10642 { 8078 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10643 { 8078 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10644 { 8078 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10645 { 8078 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10646 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10647 { 8086 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10648 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10649 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10650 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10651 { 8086 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10652 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10653 { 8086 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10654 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10655 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10656 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10657 { 8098 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10658 { 8098 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10659 { 8098 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10660 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10661 { 8098 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10662 { 8098 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10663 { 8098 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10664 { 8098 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10665 { 8098 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10666 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10667 { 8106 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10668 { 8106 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10669 { 8106 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10670 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10671 { 8106 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10672 { 8106 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10673 { 8106 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10674 { 8106 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10675 { 8106 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10676 { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 10677 { 8118 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 10678 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 10679 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 10680 { 8143 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10681 { 8143 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10682 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10683 { 8143 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10684 { 8143 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10685 { 8143 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10686 { 8143 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 10687 { 8143 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 10688 { 8143 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 10689 { 8143 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10690 { 8143 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10691 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10692 { 8143 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10693 { 8143 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10694 { 8143 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10695 { 8143 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10696 { 8143 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10697 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10698 { 8143 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10699 { 8143 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10700 { 8143 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10701 { 8143 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10702 { 8143 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10703 { 8143 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10704 { 8143 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10705 { 8143 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10706 { 8143 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10707 { 8151 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10708 { 8151 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10709 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10710 { 8151 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10711 { 8151 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10712 { 8151 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10713 { 8151 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 10714 { 8151 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 10715 { 8151 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 10716 { 8151 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10717 { 8151 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10718 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10719 { 8151 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10720 { 8151 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10721 { 8151 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10722 { 8151 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10723 { 8151 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10724 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10725 { 8151 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10726 { 8151 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10727 { 8151 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10728 { 8151 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10729 { 8151 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10730 { 8151 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10731 { 8151 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10732 { 8151 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10733 { 8151 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10734 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10735 { 8159 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10736 { 8159 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10737 { 8159 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10738 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10739 { 8159 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10740 { 8159 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10741 { 8159 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10742 { 8159 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10743 { 8159 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10744 { 8159 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 10745 { 8159 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 10746 { 8159 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 10747 { 8159 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10748 { 8159 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10749 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10750 { 8159 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10751 { 8159 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10752 { 8159 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10753 { 8159 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10754 { 8159 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10755 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10756 { 8159 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10757 { 8159 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10758 { 8159 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10759 { 8159 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10760 { 8159 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10761 { 8159 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10762 { 8159 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10763 { 8159 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10764 { 8159 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10765 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10766 { 8167 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10767 { 8167 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10768 { 8167 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10769 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10770 { 8167 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10771 { 8167 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10772 { 8167 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10773 { 8167 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10774 { 8167 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10775 { 8167 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 10776 { 8167 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 10777 { 8167 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 10778 { 8167 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10779 { 8167 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10780 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10781 { 8167 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10782 { 8167 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10783 { 8167 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10784 { 8167 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10785 { 8167 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10786 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10787 { 8167 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10788 { 8167 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10789 { 8167 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10790 { 8167 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10791 { 8167 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10792 { 8167 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10793 { 8167 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10794 { 8167 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10795 { 8167 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10796 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10797 { 8175 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10798 { 8175 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10799 { 8175 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10800 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10801 { 8175 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10802 { 8175 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10803 { 8175 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10804 { 8175 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10805 { 8175 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10806 { 8175 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 10807 { 8175 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 10808 { 8175 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 10809 { 8175 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10810 { 8175 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10811 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10812 { 8175 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10813 { 8175 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10814 { 8175 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10815 { 8175 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10816 { 8175 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10817 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10818 { 8175 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10819 { 8175 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10820 { 8175 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10821 { 8175 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10822 { 8175 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10823 { 8175 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10824 { 8175 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10825 { 8175 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10826 { 8175 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10827 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10828 { 8182 /* vandps */, X86::VANDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10829 { 8182 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10830 { 8182 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10831 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10832 { 8182 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10833 { 8182 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10834 { 8182 /* vandps */, X86::VANDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10835 { 8182 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10836 { 8182 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10837 { 8182 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 10838 { 8182 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 10839 { 8182 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 10840 { 8182 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10841 { 8182 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10842 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10843 { 8182 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10844 { 8182 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10845 { 8182 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10846 { 8182 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10847 { 8182 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10848 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10849 { 8182 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10850 { 8182 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10851 { 8182 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10852 { 8182 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10853 { 8182 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10854 { 8182 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10855 { 8182 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10856 { 8182 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10857 { 8182 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10858 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10859 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10860 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10861 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10862 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10863 { 8189 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10864 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 10865 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 10866 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 10867 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10868 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10869 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10870 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10871 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10872 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10873 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10874 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10875 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10876 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10877 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10878 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10879 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10880 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10881 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10882 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10883 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10884 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10885 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 10886 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 10887 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 10888 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 10889 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 10890 { 8199 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 10891 { 8199 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 10892 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 10893 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 10894 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10895 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10896 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10897 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10898 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10899 { 8199 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10900 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10901 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10902 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10903 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10904 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10905 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10906 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10907 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10908 { 8199 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10909 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10910 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10911 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10912 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10913 { 8209 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10914 { 8209 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10915 { 8209 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10916 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10917 { 8218 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10918 { 8218 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10919 { 8218 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10920 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10921 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10922 { 8227 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10923 { 8227 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10924 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 10925 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 10926 { 8237 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 10927 { 8237 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 10928 { 8247 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 10929 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 10930 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 10931 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 10932 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 10933 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10934 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10935 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10936 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10937 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10938 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10939 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10940 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10941 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 10942 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 10943 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10944 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10945 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10946 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10947 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 10948 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10949 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10950 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 10951 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 10952 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10953 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10954 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10955 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10956 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 10957 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10958 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10959 { 8342 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 10960 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 10961 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 10962 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 10963 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 10964 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 10965 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 10966 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10967 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10968 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10969 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10970 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10971 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10972 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10973 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10974 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10975 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10976 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10977 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10978 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 10979 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 10980 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10981 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10982 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10983 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10984 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 10985 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10986 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10987 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 10988 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 10989 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10990 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10991 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10992 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10993 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 10994 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 10995 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 10996 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 10997 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 10998 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 10999 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, }, 11000 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 11001 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 11002 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11003 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11004 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11005 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11006 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11007 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11008 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11009 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11010 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11011 { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 11012 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11013 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 11014 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 11015 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 11016 { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, }, 11017 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 11018 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 11019 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512 }, }, 11020 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11021 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11022 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11023 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11024 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11025 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11026 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11027 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11028 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11029 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11030 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11031 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11032 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 11033 { 8463 /* vcmppd */, X86::VCMPPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 11034 { 8463 /* vcmppd */, X86::VCMPPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 11035 { 8463 /* vcmppd */, X86::VCMPPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 11036 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 11037 { 8463 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 11038 { 8463 /* vcmppd */, X86::VCMPPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 11039 { 8463 /* vcmppd */, X86::VCMPPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 11040 { 8463 /* vcmppd */, X86::VCMPPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 11041 { 8463 /* vcmppd */, X86::VCMPPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 11042 { 8463 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 11043 { 8463 /* vcmppd */, X86::VCMPPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 11044 { 8463 /* vcmppd */, X86::VCMPPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 11045 { 8463 /* vcmppd */, X86::VCMPPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 11046 { 8463 /* vcmppd */, X86::VCMPPDZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11047 { 8463 /* vcmppd */, X86::VCMPPDZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11048 { 8463 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11049 { 8463 /* vcmppd */, X86::VCMPPDZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11050 { 8463 /* vcmppd */, X86::VCMPPDZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11051 { 8463 /* vcmppd */, X86::VCMPPDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11052 { 8463 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11053 { 8463 /* vcmppd */, X86::VCMPPDZ128rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11054 { 8463 /* vcmppd */, X86::VCMPPDZ256rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11055 { 8463 /* vcmppd */, X86::VCMPPDZrmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11056 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 11057 { 8470 /* vcmpps */, X86::VCMPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 11058 { 8470 /* vcmpps */, X86::VCMPPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 11059 { 8470 /* vcmpps */, X86::VCMPPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 11060 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 11061 { 8470 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 11062 { 8470 /* vcmpps */, X86::VCMPPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 11063 { 8470 /* vcmpps */, X86::VCMPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 11064 { 8470 /* vcmpps */, X86::VCMPPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 11065 { 8470 /* vcmpps */, X86::VCMPPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 11066 { 8470 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 11067 { 8470 /* vcmpps */, X86::VCMPPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 11068 { 8470 /* vcmpps */, X86::VCMPPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 11069 { 8470 /* vcmpps */, X86::VCMPPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 11070 { 8470 /* vcmpps */, X86::VCMPPSZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11071 { 8470 /* vcmpps */, X86::VCMPPSZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11072 { 8470 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11073 { 8470 /* vcmpps */, X86::VCMPPSZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11074 { 8470 /* vcmpps */, X86::VCMPPSZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11075 { 8470 /* vcmpps */, X86::VCMPPSZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11076 { 8470 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11077 { 8470 /* vcmpps */, X86::VCMPPSZrmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11078 { 8470 /* vcmpps */, X86::VCMPPSZ128rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11079 { 8470 /* vcmpps */, X86::VCMPPSZ256rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11080 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 11081 { 8477 /* vcmpsd */, X86::VCMPSDZrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 11082 { 8477 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 11083 { 8477 /* vcmpsd */, X86::VCMPSDZrm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1 }, }, 11084 { 8477 /* vcmpsd */, X86::VCMPSDZrrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 11085 { 8477 /* vcmpsd */, X86::VCMPSDZrr_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11086 { 8477 /* vcmpsd */, X86::VCMPSDZrm_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11087 { 8477 /* vcmpsd */, X86::VCMPSDZrrb_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11088 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 11089 { 8484 /* vcmpss */, X86::VCMPSSZrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 11090 { 8484 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 11091 { 8484 /* vcmpss */, X86::VCMPSSZrm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1 }, }, 11092 { 8484 /* vcmpss */, X86::VCMPSSZrrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 11093 { 8484 /* vcmpss */, X86::VCMPSSZrr_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11094 { 8484 /* vcmpss */, X86::VCMPSSZrm_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11095 { 8484 /* vcmpss */, X86::VCMPSSZrrb_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11096 { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11097 { 8491 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11098 { 8491 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 11099 { 8491 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 11100 { 8491 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, }, 11101 { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11102 { 8499 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11103 { 8499 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 11104 { 8499 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 11105 { 8499 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, }, 11106 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11107 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 11108 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11109 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 11110 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11111 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 11112 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11113 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11114 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11115 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11116 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11117 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11118 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11119 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11120 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11121 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11122 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 11123 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11124 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 11125 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11126 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 11127 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11128 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11129 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11130 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11131 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11132 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11133 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11134 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11135 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11136 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11137 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 11138 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11139 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 11140 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 11141 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 11142 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 11143 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 11144 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 11145 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 11146 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 11147 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 11148 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 11149 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11150 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11151 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11152 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11153 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11154 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11155 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11156 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11157 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11158 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11159 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11160 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11161 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11162 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11163 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11164 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11165 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11166 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11167 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11168 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 11169 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11170 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11171 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11172 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 11173 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11174 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 11175 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11176 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11177 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 11178 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 11179 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 11180 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 11181 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11182 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11183 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11184 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11185 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11186 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11187 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11188 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11189 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11190 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11191 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11192 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11193 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11194 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11195 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11196 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11197 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11198 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11199 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11200 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11201 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 11202 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 11203 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 11204 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 11205 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 11206 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 11207 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 11208 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 11209 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 11210 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11211 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11212 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11213 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11214 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11215 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11216 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11217 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11218 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11219 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11220 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11221 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11222 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11223 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11224 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11225 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11226 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11227 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11228 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11229 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11230 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11231 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11232 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR256X }, }, 11233 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 11234 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_FR32X }, }, 11235 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11236 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11237 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11238 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11239 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11240 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11241 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11242 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11243 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11244 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11245 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11246 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11247 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11248 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11249 { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11250 { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11251 { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11252 { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11253 { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11254 { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11255 { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11256 { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11257 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11258 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 11259 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11260 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11261 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11262 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11263 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, }, 11264 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11265 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11266 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 11267 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11268 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11269 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11270 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11271 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11272 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11273 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11274 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11275 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11276 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11277 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11278 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11279 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11280 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11281 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11282 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11283 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11284 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11285 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 11286 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11287 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11288 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11289 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11290 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11291 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11292 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11293 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11294 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 11295 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11296 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, }, 11297 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11298 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11299 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11300 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11301 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11302 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11303 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11304 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11305 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11306 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 11307 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11308 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11309 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11310 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11311 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, }, 11312 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11313 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11314 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 11315 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11316 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11317 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11318 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11319 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11320 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11321 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11322 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11323 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11324 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11325 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11326 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11327 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11328 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11329 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11330 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11331 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11332 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11333 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 11334 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11335 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11336 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11337 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11338 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11339 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11340 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11341 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11342 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 11343 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11344 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, }, 11345 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11346 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11347 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11348 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11349 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11350 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11351 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11352 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11353 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11354 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11355 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11356 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11357 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11358 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11359 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 11360 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11361 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 11362 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 11363 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11364 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11365 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11366 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11367 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11368 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11369 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11370 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11371 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11372 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11373 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11374 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11375 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11376 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11377 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11378 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11379 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11380 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11381 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11382 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11383 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11384 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11385 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11386 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11387 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, }, 11388 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11389 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11390 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 11391 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11392 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11393 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11394 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11395 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11396 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11397 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11398 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11399 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11400 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11401 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11402 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11403 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11404 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11405 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11406 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11407 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11408 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11409 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11410 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11411 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11412 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11413 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11414 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11415 { 8695 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11416 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11417 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11418 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11419 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11420 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11421 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11422 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11423 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11424 { 8707 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11425 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11426 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11427 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11428 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11429 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11430 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11431 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 11432 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11433 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 11434 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 11435 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11436 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11437 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11438 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11439 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11440 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11441 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11442 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11443 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11444 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11445 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11446 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11447 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11448 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11449 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11450 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11451 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11452 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11453 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11454 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11455 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11456 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 11457 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11458 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 11459 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 11460 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 11461 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 11462 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 11463 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 11464 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 11465 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, }, 11466 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11467 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11468 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11469 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11470 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11471 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11472 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11473 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11474 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11475 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11476 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11477 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11478 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11479 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11480 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11481 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 11482 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11483 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11484 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11485 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 11486 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11487 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 11488 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11489 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11490 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 11491 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 11492 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 11493 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 11494 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11495 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11496 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11497 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11498 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11499 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11500 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11501 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11502 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11503 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11504 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11505 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11506 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11507 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11508 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11509 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11510 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11511 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11512 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11513 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11514 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11515 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 11516 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11517 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 11518 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 11519 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 11520 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 11521 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 11522 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 11523 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 11524 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, }, 11525 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 11526 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 11527 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 11528 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11529 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11530 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11531 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11532 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11533 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11534 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11535 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11536 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11537 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11538 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11539 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11540 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11541 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11542 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11543 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11544 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11545 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11546 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11547 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11548 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 11549 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, }, 11550 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, }, 11551 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, }, 11552 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 11553 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, }, 11554 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, }, 11555 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, }, 11556 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, }, 11557 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, }, 11558 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, }, 11559 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11560 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11561 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11562 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11563 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11564 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11565 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11566 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11567 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11568 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11569 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11570 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11571 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 11572 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 11573 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 11574 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 11575 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 11576 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, }, 11577 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 11578 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 11579 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 11580 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11581 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11582 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11583 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11584 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11585 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11586 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11587 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11588 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11589 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11590 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11591 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11592 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11593 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11594 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11595 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11596 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11597 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11598 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11599 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11600 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11601 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11602 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11603 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11604 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11605 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11606 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 11607 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 11608 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 11609 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 11610 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11611 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11612 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11613 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11614 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11615 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11616 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11617 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11618 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11619 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11620 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11621 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11622 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11623 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11624 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11625 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11626 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11627 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11628 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11629 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11630 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11631 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 11632 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 11633 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 11634 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 11635 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 11636 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, }, 11637 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 11638 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 11639 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 11640 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11641 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11642 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11643 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11644 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11645 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11646 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11647 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11648 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11649 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11650 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11651 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11652 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11653 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11654 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11655 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11656 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11657 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11658 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11659 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11660 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11661 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11662 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11663 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11664 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11665 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11666 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 11667 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11668 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 11669 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 11670 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11671 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11672 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11673 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11674 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11675 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11676 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11677 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11678 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11679 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11680 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11681 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11682 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11683 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11684 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11685 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11686 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11687 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11688 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11689 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11690 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11691 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11692 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11693 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11694 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, }, 11695 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11696 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11697 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 11698 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11699 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11700 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11701 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11702 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11703 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11704 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11705 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11706 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11707 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11708 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11709 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11710 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11711 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11712 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11713 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11714 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11715 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11716 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11717 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11718 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11719 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11720 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11721 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11722 { 8822 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11723 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11724 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11725 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11726 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11727 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11728 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11729 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11730 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11731 { 8833 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11732 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 11733 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 11734 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11735 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11736 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 11737 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 11738 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 11739 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 11740 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11741 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11742 { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 11743 { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11744 { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 11745 { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 11746 { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11747 { 8865 /* vcvtsd2siq */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 11748 { 8865 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11749 { 8865 /* vcvtsd2siq */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 11750 { 8865 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 11751 { 8865 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11752 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 11753 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 11754 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 11755 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 11756 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 11757 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11758 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11759 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11760 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11761 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11762 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11763 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11764 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11765 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 11766 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 11767 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11768 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11769 { 8897 /* vcvtsd2usil */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11770 { 8897 /* vcvtsd2usil */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 11771 { 8897 /* vcvtsd2usil */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11772 { 8909 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11773 { 8909 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 11774 { 8909 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11775 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, }, 11776 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 11777 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, }, 11778 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 11779 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 11780 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 11781 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 11782 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, }, 11783 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 11784 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 11785 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 11786 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, }, 11787 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 11788 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 11789 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 11790 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 11791 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, }, 11792 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 11793 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, }, 11794 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 11795 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 11796 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 11797 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 11798 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 11799 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, }, 11800 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 11801 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 11802 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 11803 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 11804 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, }, 11805 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 11806 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 11807 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 11808 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 11809 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 11810 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 11811 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 11812 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 11813 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 11814 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11815 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11816 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11817 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11818 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11819 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11820 { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 11821 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 11822 { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11823 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11824 { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 11825 { 8995 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 11826 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 11827 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 11828 { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11829 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11830 { 9005 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 11831 { 9005 /* vcvtss2sil */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11832 { 9005 /* vcvtss2sil */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 11833 { 9005 /* vcvtss2sil */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 11834 { 9005 /* vcvtss2sil */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11835 { 9016 /* vcvtss2siq */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 11836 { 9016 /* vcvtss2siq */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11837 { 9016 /* vcvtss2siq */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 11838 { 9016 /* vcvtss2siq */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 11839 { 9016 /* vcvtss2siq */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11840 { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11841 { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11842 { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 11843 { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 11844 { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11845 { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11846 { 9038 /* vcvtss2usil */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 11847 { 9038 /* vcvtss2usil */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 11848 { 9038 /* vcvtss2usil */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, }, 11849 { 9050 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 11850 { 9050 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 11851 { 9050 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, }, 11852 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11853 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 11854 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11855 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11856 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11857 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11858 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, }, 11859 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11860 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11861 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 11862 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11863 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11864 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11865 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11866 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11867 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11868 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11869 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11870 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11871 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11872 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11873 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11874 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11875 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11876 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11877 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11878 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 11879 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11880 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 11881 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11882 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11883 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11884 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11885 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11886 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11887 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11888 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11889 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 11890 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11891 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, }, 11892 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11893 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11894 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11895 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11896 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11897 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11898 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11899 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11900 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11901 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11902 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11903 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11904 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11905 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11906 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 11907 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11908 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 11909 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 11910 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11911 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11912 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11913 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11914 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11915 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11916 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11917 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11918 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11919 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11920 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11921 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11922 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11923 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11924 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11925 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11926 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11927 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11928 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11929 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11930 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11931 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11932 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 11933 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 11934 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, }, 11935 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11936 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11937 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 11938 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11939 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11940 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11941 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11942 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11943 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11944 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11945 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11946 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11947 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11948 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11949 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11950 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11951 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11952 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11953 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11954 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11955 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11956 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11957 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11958 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11959 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11960 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11961 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11962 { 9120 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11963 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 11964 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 11965 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 11966 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11967 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11968 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11969 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11970 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11971 { 9133 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11972 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 11973 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 11974 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 11975 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 11976 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 11977 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 11978 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 11979 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 11980 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 11981 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 11982 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11983 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11984 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11985 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11986 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11987 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11988 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11989 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11990 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11991 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11992 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11993 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11994 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11995 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11996 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11997 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 11998 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 11999 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12000 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12001 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12002 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 12003 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 12004 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12005 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 12006 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12007 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 12008 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12009 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 12010 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 12011 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12012 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 12013 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 12014 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 12015 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 12016 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12017 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12018 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12019 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12020 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12021 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12022 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12023 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12024 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12025 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12026 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12027 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12028 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12029 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12030 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12031 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12032 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12033 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12034 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12035 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12036 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12037 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 12038 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 12039 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 12040 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 12041 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 12042 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, }, 12043 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 12044 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 12045 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 12046 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12047 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12048 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12049 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12050 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12051 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12052 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12053 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12054 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12055 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12056 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12057 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12058 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12059 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12060 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12061 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12062 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12063 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12064 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12065 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12066 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12067 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 12068 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12069 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12070 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 12071 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12072 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 12073 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 12074 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 12075 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 12076 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12077 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12078 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12079 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12080 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12081 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12082 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12083 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12084 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12085 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12086 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12087 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12088 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12089 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12090 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12091 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12092 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12093 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12094 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12095 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12096 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12097 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 12098 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 12099 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 12100 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 12101 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 12102 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, }, 12103 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 12104 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 12105 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 12106 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12107 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12108 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12109 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12110 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12111 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12112 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12113 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12114 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12115 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12116 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12117 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12118 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12119 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12120 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12121 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12122 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12123 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12124 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12125 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12126 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 12127 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 12128 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12129 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12130 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 12131 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 12132 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 12133 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 12134 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12135 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12136 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 12137 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12138 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 12139 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 12140 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12141 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 12142 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12143 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 12144 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 12145 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12146 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12147 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12148 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 12149 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 12150 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12151 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12152 { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12153 { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, }, 12154 { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12155 { 9264 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12156 { 9264 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 12157 { 9264 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12158 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 12159 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 12160 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12161 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12162 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 12163 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 12164 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 12165 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 12166 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12167 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12168 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 12169 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12170 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 12171 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 12172 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12173 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 12174 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12175 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 12176 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 12177 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12178 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12179 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12180 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 12181 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 12182 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12183 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12184 { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 12185 { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 12186 { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, }, 12187 { 9337 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 12188 { 9337 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, }, 12189 { 9337 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, }, 12190 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12191 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 12192 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 12193 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 12194 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 12195 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 12196 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, }, 12197 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, }, 12198 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, }, 12199 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12200 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12201 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12202 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12203 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12204 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12205 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12206 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12207 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12208 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12209 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12210 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12211 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12212 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12213 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12214 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12215 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12216 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12217 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12218 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 12219 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12220 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12221 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 12222 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12223 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 12224 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 12225 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 12226 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 12227 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12228 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12229 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12230 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12231 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12232 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12233 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12234 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12235 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12236 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12237 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12238 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12239 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12240 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12241 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12242 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12243 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12244 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12245 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12246 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12247 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12248 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 12249 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12250 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12251 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 12252 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12253 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 12254 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 12255 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 12256 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 12257 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12258 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12259 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12260 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12261 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12262 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12263 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12264 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12265 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12266 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12267 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12268 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12269 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12270 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12271 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12272 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12273 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12274 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12275 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12276 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12277 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12278 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 12279 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 12280 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, }, 12281 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, }, 12282 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 12283 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 12284 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, }, 12285 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12286 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12287 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12288 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12289 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12290 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12291 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12292 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12293 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12294 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12295 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12296 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12297 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12298 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12299 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12300 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12301 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12302 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12303 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 12304 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12305 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12306 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12307 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12308 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12309 { 9394 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12310 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 12311 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, }, 12312 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, }, 12313 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12314 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12315 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12316 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12317 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12318 { 9406 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12319 { 9418 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 12320 { 9418 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 12321 { 9418 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12322 { 9418 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 12323 { 9429 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 12324 { 9429 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12325 { 9441 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 12326 { 9441 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12327 { 9441 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 12328 { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 12329 { 9453 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 12330 { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12331 { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 12332 { 9453 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 12333 { 9464 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 12334 { 9464 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12335 { 9464 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 12336 { 9476 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 12337 { 9476 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12338 { 9476 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, }, 12339 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12340 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12341 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12342 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12343 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12344 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12345 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12346 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12347 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12348 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12349 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12350 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12351 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12352 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12353 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12354 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12355 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12356 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12357 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12358 { 9498 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12359 { 9498 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12360 { 9498 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12361 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12362 { 9498 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12363 { 9498 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12364 { 9498 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12365 { 9498 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12366 { 9498 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12367 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12368 { 9498 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 12369 { 9498 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 12370 { 9498 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 12371 { 9498 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12372 { 9498 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12373 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12374 { 9498 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12375 { 9498 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12376 { 9498 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12377 { 9498 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12378 { 9498 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12379 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12380 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12381 { 9498 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12382 { 9498 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12383 { 9498 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12384 { 9498 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12385 { 9498 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12386 { 9498 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12387 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12388 { 9498 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12389 { 9498 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12390 { 9498 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12391 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12392 { 9505 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12393 { 9505 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12394 { 9505 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12395 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12396 { 9505 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12397 { 9505 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12398 { 9505 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12399 { 9505 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12400 { 9505 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12401 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12402 { 9505 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 12403 { 9505 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 12404 { 9505 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 12405 { 9505 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12406 { 9505 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12407 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12408 { 9505 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12409 { 9505 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12410 { 9505 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12411 { 9505 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12412 { 9505 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12413 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12414 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12415 { 9505 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12416 { 9505 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12417 { 9505 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12418 { 9505 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12419 { 9505 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12420 { 9505 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12421 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12422 { 9505 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12423 { 9505 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12424 { 9505 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12425 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12426 { 9512 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12427 { 9512 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 12428 { 9512 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12429 { 9512 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12430 { 9512 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12431 { 9512 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12432 { 9512 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12433 { 9512 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12434 { 9512 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12435 { 9512 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12436 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12437 { 9519 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12438 { 9519 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 12439 { 9519 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12440 { 9519 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12441 { 9519 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12442 { 9519 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12443 { 9519 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12444 { 9519 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12445 { 9519 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12446 { 9519 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12447 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12448 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12449 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12450 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12451 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12452 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12453 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 12454 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 12455 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 12456 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12457 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12458 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12459 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12460 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12461 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12462 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12463 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12464 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12465 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12466 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12467 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12468 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12469 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12470 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12471 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12472 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12473 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12474 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12475 { 9536 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12476 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12477 { 9542 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12478 { 9542 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12479 { 9542 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12480 { 9548 /* verr */, X86::VERRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 12481 { 9548 /* verr */, X86::VERRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 12482 { 9553 /* verw */, X86::VERWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 12483 { 9553 /* verw */, X86::VERWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 12484 { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12485 { 9558 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12486 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 12487 { 9558 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 12488 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12489 { 9558 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12490 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12491 { 9558 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12492 { 9558 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12493 { 9558 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12494 { 9558 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12495 { 9558 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12496 { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12497 { 9566 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12498 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 12499 { 9566 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 12500 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12501 { 9566 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12502 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12503 { 9566 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12504 { 9566 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12505 { 9566 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12506 { 9566 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12507 { 9566 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12508 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12509 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 12510 { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12511 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12512 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 12513 { 9574 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12514 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12515 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12516 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12517 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12518 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12519 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12520 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12521 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12522 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12523 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12524 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12525 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12526 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 12527 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 12528 { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 12529 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 12530 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 12531 { 9584 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 12532 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12533 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12534 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12535 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12536 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12537 { 9584 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12538 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12539 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12540 { 9584 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12541 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12542 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12543 { 9584 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12544 { 9594 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, }, 12545 { 9594 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, }, 12546 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, }, 12547 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, }, 12548 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, }, 12549 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, }, 12550 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12551 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12552 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12553 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12554 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12555 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12556 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, }, 12557 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, }, 12558 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12559 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12560 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12561 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, }, 12562 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, }, 12563 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, }, 12564 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, }, 12565 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12566 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12567 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12568 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12569 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12570 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12571 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, }, 12572 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, }, 12573 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12574 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12575 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12576 { 9663 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, }, 12577 { 9663 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, }, 12578 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, }, 12579 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, }, 12580 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, }, 12581 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, }, 12582 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12583 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12584 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12585 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12586 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12587 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12588 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, }, 12589 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, }, 12590 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12591 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12592 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12593 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, }, 12594 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, }, 12595 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, }, 12596 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, }, 12597 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12598 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12599 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12600 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12601 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12602 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12603 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, }, 12604 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, }, 12605 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12606 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12607 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12608 { 9732 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, }, 12609 { 9732 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, }, 12610 { 9732 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, }, 12611 { 9732 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, }, 12612 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12613 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12614 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12615 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12616 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12617 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12618 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12619 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 12620 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 12621 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 12622 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12623 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12624 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12625 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12626 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12627 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12628 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12629 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12630 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12631 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12632 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12633 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12634 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12635 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12636 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12637 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12638 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12639 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12640 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12641 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12642 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12643 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12644 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12645 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12646 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12647 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12648 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12649 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 12650 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 12651 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 12652 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12653 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12654 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12655 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12656 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12657 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12658 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12659 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12660 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12661 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12662 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12663 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12664 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12665 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12666 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12667 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12668 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12669 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12670 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12671 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12672 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12673 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12674 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12675 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12676 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12677 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12678 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12679 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12680 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12681 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12682 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12683 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12684 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12685 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12686 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12687 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12688 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12689 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12690 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12691 { 9791 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12692 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12693 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12694 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12695 { 9791 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12696 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12697 { 9791 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12698 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12699 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12700 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12701 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 12702 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 12703 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 12704 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12705 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12706 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12707 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12708 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12709 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12710 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12711 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12712 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12713 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12714 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12715 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12716 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12717 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12718 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12719 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12720 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12721 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12722 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12723 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12724 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12725 { 9803 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12726 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12727 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12728 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12729 { 9803 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12730 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12731 { 9803 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12732 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12733 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12734 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12735 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 12736 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 12737 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 12738 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12739 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12740 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12741 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12742 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12743 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12744 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12745 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12746 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12747 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12748 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12749 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12750 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12751 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12752 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12753 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12754 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12755 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12756 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12757 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12758 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12759 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12760 { 9815 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 12761 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12762 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12763 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12764 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12765 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12766 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12767 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12768 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12769 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12770 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12771 { 9827 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 12772 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12773 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12774 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12775 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12776 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12777 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12778 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12779 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12780 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12781 { 9839 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12782 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12783 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12784 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12785 { 9839 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12786 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12787 { 9839 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12788 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12789 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12790 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12791 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 12792 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 12793 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 12794 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12795 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12796 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12797 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12798 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12799 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12800 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12801 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12802 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12803 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12804 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12805 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12806 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12807 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12808 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12809 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12810 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12811 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12812 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12813 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12814 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12815 { 9851 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12816 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12817 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12818 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12819 { 9851 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12820 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12821 { 9851 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12822 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12823 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12824 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12825 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 12826 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 12827 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 12828 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12829 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12830 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12831 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12832 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12833 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12834 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12835 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12836 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12837 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12838 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12839 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12840 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12841 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12842 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12843 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12844 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12845 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12846 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12847 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12848 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12849 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12850 { 9863 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 12851 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12852 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12853 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12854 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12855 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12856 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12857 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12858 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12859 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12860 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12861 { 9875 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 12862 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12863 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12864 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12865 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12866 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12867 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12868 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12869 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12870 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12871 { 9887 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12872 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12873 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12874 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12875 { 9887 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12876 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12877 { 9887 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12878 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12879 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12880 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12881 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 12882 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 12883 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 12884 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12885 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12886 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12887 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12888 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12889 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12890 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12891 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12892 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12893 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12894 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12895 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12896 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12897 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12898 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12899 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12900 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12901 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12902 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12903 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12904 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12905 { 9899 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12906 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12907 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12908 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12909 { 9899 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12910 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12911 { 9899 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12912 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12913 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12914 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12915 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 12916 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 12917 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 12918 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12919 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12920 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12921 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12922 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12923 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12924 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12925 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12926 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12927 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12928 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12929 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12930 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12931 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12932 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12933 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12934 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12935 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12936 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12937 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12938 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12939 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12940 { 9911 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 12941 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 12942 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12943 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12944 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12945 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12946 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12947 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12948 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12949 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12950 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12951 { 9923 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 12952 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 12953 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12954 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12955 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12956 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12957 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12958 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12959 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12960 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12961 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12962 { 9935 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12963 { 9935 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12964 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12965 { 9935 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12966 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12967 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12968 { 9944 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12969 { 9944 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12970 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12971 { 9944 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12972 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12973 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 12974 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12975 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12976 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 12977 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12978 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 12979 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 12980 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12981 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12982 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12983 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 12984 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 12985 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 12986 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 12987 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 12988 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12989 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 12990 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 12991 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 12992 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12993 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12994 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12995 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12996 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12997 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 12998 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 12999 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13000 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13001 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13002 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13003 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13004 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13005 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13006 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13007 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13008 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13009 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13010 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13011 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13012 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13013 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13014 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13015 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13016 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13017 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13018 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13019 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13020 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13021 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13022 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13023 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13024 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13025 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13026 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13027 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13028 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13029 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13030 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13031 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13032 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13033 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13034 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13035 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13036 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13037 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13038 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13039 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13040 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13041 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13042 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13043 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13044 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13045 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13046 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13047 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13048 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13049 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13050 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13051 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13052 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13053 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13054 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13055 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13056 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13057 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13058 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13059 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13060 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13061 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13062 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13063 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13064 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13065 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13066 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13067 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13068 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13069 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13070 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13071 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13072 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13073 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13074 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13075 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13076 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13077 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13078 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13079 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13080 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13081 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13082 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13083 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13084 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13085 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13086 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13087 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13088 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13089 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13090 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13091 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13092 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13093 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13094 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13095 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13096 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13097 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13098 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13099 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13100 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13101 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13102 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13103 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13104 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13105 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13106 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13107 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13108 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13109 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13110 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13111 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13112 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13113 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13114 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13115 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13116 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13117 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13118 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13119 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13120 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13121 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13122 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13123 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13124 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13125 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13126 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13127 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13128 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13129 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13130 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13131 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13132 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13133 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13134 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13135 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13136 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13137 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13138 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13139 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13140 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13141 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13142 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13143 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13144 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13145 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13146 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13147 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13148 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13149 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13150 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13151 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13152 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13153 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13154 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13155 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13156 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13157 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13158 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13159 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13160 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13161 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13162 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13163 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13164 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13165 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13166 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13167 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13168 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13169 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13170 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13171 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13172 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13173 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13174 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13175 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13176 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13177 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13178 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13179 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13180 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13181 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13182 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13183 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13184 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13185 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13186 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13187 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13188 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13189 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13190 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13191 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13192 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13193 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13194 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13195 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13196 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13197 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13198 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13199 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13200 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13201 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13202 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13203 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13204 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13205 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13206 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13207 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13208 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13209 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13210 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13211 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13212 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13213 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13214 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13215 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13216 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13217 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13218 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13219 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13220 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13221 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13222 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13223 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13224 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13225 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13226 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13227 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13228 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13229 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13230 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13231 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13232 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13233 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13234 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13235 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13236 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13237 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13238 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13239 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13240 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13241 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13242 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13243 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13244 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13245 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13246 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13247 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13248 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13249 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13250 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13251 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13252 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13253 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13254 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13255 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13256 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13257 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13258 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13259 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13260 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13261 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13262 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13263 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13264 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13265 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 13266 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13267 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13268 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13269 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13270 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13271 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13272 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13273 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13274 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13275 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13276 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 13277 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13278 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13279 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13280 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13281 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13282 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13283 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13284 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13285 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13286 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13287 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13288 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13289 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13290 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13291 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13292 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13293 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13294 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13295 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13296 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13297 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13298 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13299 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13300 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13301 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13302 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13303 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13304 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13305 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13306 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13307 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13308 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13309 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13310 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13311 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13312 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13313 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13314 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13315 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13316 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13317 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13318 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13319 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13320 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13321 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13322 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13323 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13324 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13325 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13326 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13327 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13328 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13329 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13330 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13331 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13332 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13333 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13334 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13335 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13336 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13337 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13338 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13339 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13340 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13341 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13342 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13343 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13344 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13345 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13346 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13347 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13348 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13349 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13350 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13351 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13352 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13353 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13354 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13355 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 13356 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13357 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13358 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13359 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13360 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13361 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13362 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13363 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13364 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13365 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13366 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 13367 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13368 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13369 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13370 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13371 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13372 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13373 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13374 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13375 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13376 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13377 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13378 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13379 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13380 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13381 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13382 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13383 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13384 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13385 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13386 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13387 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13388 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13389 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13390 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13391 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13392 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13393 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13394 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13395 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13396 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13397 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13398 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13399 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13400 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13401 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13402 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13403 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13404 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13405 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13406 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13407 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13408 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13409 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13410 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13411 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13412 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13413 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13414 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13415 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13416 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13417 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13418 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13419 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13420 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13421 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13422 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13423 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13424 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13425 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13426 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13427 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13428 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13429 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13430 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13431 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13432 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13433 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13434 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13435 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13436 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13437 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13438 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13439 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13440 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13441 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13442 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13443 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13444 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13445 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 13446 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13447 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13448 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13449 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13450 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13451 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13452 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13453 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13454 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13455 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13456 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 13457 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13458 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13459 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13460 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13461 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13462 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13463 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13464 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13465 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13466 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13467 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13468 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13469 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13470 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13471 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13472 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13473 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13474 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13475 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13476 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13477 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13478 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13479 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13480 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13481 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13482 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13483 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13484 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13485 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13486 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13487 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13488 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13489 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13490 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13491 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13492 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13493 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13494 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13495 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13496 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13497 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13498 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13499 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13500 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13501 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13502 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13503 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13504 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13505 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13506 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13507 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13508 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13509 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13510 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13511 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13512 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13513 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13514 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13515 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13516 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13517 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13518 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13519 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13520 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13521 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13522 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13523 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13524 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13525 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13526 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13527 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13528 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13529 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13530 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13531 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13532 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13533 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13534 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13535 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13536 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13537 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13538 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13539 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13540 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13541 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13542 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13543 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13544 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13545 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13546 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13547 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13548 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13549 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13550 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13551 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13552 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13553 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13554 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13555 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13556 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13557 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13558 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13559 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13560 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13561 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13562 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13563 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13564 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13565 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13566 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13567 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13568 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13569 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13570 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13571 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13572 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13573 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13574 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13575 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13576 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13577 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13578 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13579 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13580 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13581 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13582 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13583 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13584 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13585 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13586 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13587 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13588 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13589 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13590 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13591 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13592 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13593 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13594 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13595 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13596 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13597 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13598 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13599 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13600 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13601 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13602 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13603 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13604 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13605 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13606 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13607 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13608 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13609 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13610 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13611 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13612 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13613 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13614 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13615 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13616 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13617 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13618 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13619 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13620 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13621 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13622 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13623 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13624 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13625 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13626 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13627 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13628 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13629 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13630 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13631 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13632 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13633 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13634 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13635 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13636 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13637 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13638 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13639 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13640 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13641 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13642 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13643 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13644 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13645 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13646 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13647 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13648 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13649 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13650 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13651 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13652 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13653 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13654 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13655 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13656 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13657 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13658 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13659 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13660 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13661 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13662 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13663 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13664 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13665 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13666 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13667 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13668 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13669 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13670 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13671 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13672 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13673 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13674 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13675 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13676 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13677 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13678 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13679 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13680 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13681 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13682 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13683 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13684 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13685 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13686 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13687 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13688 { 10352 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13689 { 10352 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13690 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13691 { 10352 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13692 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13693 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13694 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13695 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13696 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13697 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13698 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13699 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13700 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13701 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13702 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13703 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13704 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13705 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13706 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13707 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13708 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13709 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13710 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13711 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13712 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13713 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13714 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13715 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13716 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13717 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13718 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13719 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13720 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13721 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13722 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13723 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13724 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13725 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13726 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13727 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13728 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13729 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13730 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13731 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13732 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13733 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13734 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13735 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13736 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13737 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13738 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13739 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13740 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13741 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13742 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13743 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13744 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13745 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13746 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13747 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13748 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13749 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13750 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13751 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13752 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13753 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13754 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13755 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13756 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13757 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13758 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13759 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13760 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13761 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13762 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13763 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13764 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13765 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13766 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13767 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13768 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13769 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 13770 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13771 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13772 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13773 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13774 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13775 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13776 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13777 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13778 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13779 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13780 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 13781 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13782 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13783 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13784 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13785 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13786 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13787 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13788 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13789 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13790 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13791 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13792 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13793 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13794 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13795 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13796 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13797 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13798 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13799 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13800 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13801 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13802 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13803 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13804 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13805 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13806 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13807 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13808 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13809 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13810 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13811 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13812 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13813 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13814 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13815 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13816 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13817 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13818 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13819 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13820 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13821 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13822 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13823 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13824 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13825 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13826 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13827 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13828 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13829 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13830 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13831 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13832 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13833 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13834 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13835 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13836 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13837 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13838 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13839 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13840 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13841 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13842 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13843 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13844 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13845 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13846 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13847 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13848 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13849 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13850 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13851 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13852 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13853 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13854 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13855 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13856 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13857 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13858 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13859 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 13860 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13861 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13862 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13863 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13864 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13865 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13866 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13867 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13868 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13869 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13870 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 13871 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13872 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13873 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13874 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13875 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13876 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13877 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13878 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13879 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13880 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13881 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13882 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13883 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13884 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13885 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13886 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13887 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13888 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13889 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13890 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13891 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 13892 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13893 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13894 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13895 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13896 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13897 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13898 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13899 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13900 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13901 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13902 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13903 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13904 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13905 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13906 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13907 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13908 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13909 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13910 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13911 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13912 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13913 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13914 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13915 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13916 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13917 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13918 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13919 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13920 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13921 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13922 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13923 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 13924 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 13925 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 13926 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13927 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13928 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13929 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13930 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13931 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13932 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13933 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13934 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13935 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13936 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13937 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13938 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13939 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13940 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13941 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13942 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13943 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13944 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13945 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13946 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13947 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13948 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13949 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 13950 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13951 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13952 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13953 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13954 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13955 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13956 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13957 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13958 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13959 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13960 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 13961 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13962 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13963 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13964 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13965 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 13966 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13967 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 13968 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13969 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13970 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13971 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13972 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13973 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13974 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13975 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13976 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13977 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13978 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13979 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13980 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13981 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 13982 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13983 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13984 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 13985 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13986 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 13987 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 13988 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 13989 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 13990 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13991 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 13992 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 13993 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 13994 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 13995 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 13996 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 13997 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 13998 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 13999 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14000 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14001 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14002 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14003 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14004 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14005 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14006 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14007 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14008 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14009 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14010 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14011 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14012 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14013 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14014 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14015 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14016 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14017 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14018 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14019 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14020 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14021 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14022 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14023 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14024 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14025 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14026 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14027 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14028 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14029 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14030 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14031 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 14032 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 14033 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 14034 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14035 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14036 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14037 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14038 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14039 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14040 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14041 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14042 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14043 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14044 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14045 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14046 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14047 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14048 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14049 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14050 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14051 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14052 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14053 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14054 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14055 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14056 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 14057 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14058 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14059 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14060 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14061 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14062 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14063 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14064 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14065 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14066 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14067 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14068 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14069 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14070 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14071 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14072 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14073 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14074 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14075 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14076 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14077 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14078 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14079 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14080 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14081 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14082 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14083 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14084 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14085 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14086 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14087 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 14088 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 14089 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14090 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14091 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14092 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14093 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14094 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14095 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14096 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14097 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14098 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14099 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14100 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14101 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14102 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14103 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14104 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14105 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14106 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14107 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14108 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14109 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14110 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14111 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14112 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14113 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14114 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14115 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14116 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14117 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14118 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14119 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14120 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14121 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 14122 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 14123 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 14124 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14125 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14126 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14127 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14128 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14129 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14130 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14131 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14132 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14133 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14134 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14135 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14136 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14137 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14138 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14139 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14140 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14141 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14142 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14143 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14144 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14145 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14146 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 14147 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14148 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14149 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14150 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14151 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14152 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14153 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14154 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14155 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14156 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14157 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14158 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14159 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14160 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14161 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14162 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14163 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14164 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14165 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14166 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14167 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14168 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14169 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14170 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14171 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14172 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14173 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14174 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14175 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14176 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14177 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 14178 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 14179 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14180 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14181 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14182 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14183 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14184 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14185 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14186 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14187 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14188 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14189 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14190 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14191 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14192 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14193 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14194 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14195 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14196 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14197 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14198 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14199 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14200 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14201 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14202 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14203 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14204 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14205 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14206 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14207 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14208 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14209 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14210 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14211 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 14212 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 14213 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 14214 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14215 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14216 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14217 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14218 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14219 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14220 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14221 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14222 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14223 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14224 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14225 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14226 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14227 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14228 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14229 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14230 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14231 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14232 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14233 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14234 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14235 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14236 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 14237 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14238 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14239 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14240 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14241 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14242 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14243 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14244 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14245 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14246 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14247 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14248 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14249 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14250 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14251 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14252 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14253 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14254 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14255 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14256 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14257 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14258 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14259 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14260 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14261 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14262 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14263 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14264 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14265 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14266 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14267 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14268 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14269 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 14270 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14271 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14272 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14273 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14274 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, }, 14275 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, }, 14276 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, }, 14277 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, }, 14278 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, }, 14279 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, }, 14280 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14281 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14282 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14283 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14284 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14285 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14286 { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, }, 14287 { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, }, 14288 { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, }, 14289 { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14290 { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14291 { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14292 { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, }, 14293 { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, }, 14294 { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, }, 14295 { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14296 { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14297 { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14298 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, }, 14299 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, }, 14300 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, }, 14301 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14302 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14303 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14304 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, }, 14305 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, }, 14306 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, }, 14307 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, }, 14308 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, }, 14309 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, }, 14310 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14311 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14312 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14313 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14314 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14315 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14316 { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, }, 14317 { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, }, 14318 { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, }, 14319 { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14320 { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14321 { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14322 { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, }, 14323 { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, }, 14324 { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, }, 14325 { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14326 { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14327 { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14328 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, }, 14329 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, }, 14330 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, }, 14331 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14332 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14333 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14334 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, }, 14335 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1 }, }, 14336 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14337 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14338 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, }, 14339 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1 }, }, 14340 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14341 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14342 { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14343 { 10887 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 14344 { 10887 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 14345 { 10887 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 14346 { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14347 { 10895 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 14348 { 10895 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 14349 { 10895 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 14350 { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14351 { 10903 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 14352 { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14353 { 10911 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 14354 { 10919 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 14355 { 10919 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, }, 14356 { 10919 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14357 { 10919 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, AMFBS_None, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14358 { 10919 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14359 { 10930 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 14360 { 10930 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 14361 { 10930 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14362 { 10930 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14363 { 10930 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14364 { 10941 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14365 { 10955 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14366 { 10969 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14367 { 10983 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14368 { 10997 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14369 { 11011 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14370 { 11025 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14371 { 11039 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14372 { 11053 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 14373 { 11053 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 14374 { 11053 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14375 { 11053 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14376 { 11053 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14377 { 11064 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, }, 14378 { 11064 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, }, 14379 { 11064 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, AMFBS_None, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14380 { 11064 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14381 { 11064 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, AMFBS_None, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14382 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 14383 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 14384 { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 14385 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 14386 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 14387 { 11075 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 14388 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 14389 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 14390 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 14391 { 11075 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 14392 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14393 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14394 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14395 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14396 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14397 { 11075 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14398 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14399 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14400 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14401 { 11075 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14402 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14403 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14404 { 11075 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14405 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14406 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14407 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14408 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14409 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14410 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14411 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14412 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 14413 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 14414 { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 14415 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 14416 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 14417 { 11085 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 14418 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 14419 { 11085 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 14420 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 14421 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 14422 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14423 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14424 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14425 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14426 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14427 { 11085 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14428 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14429 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14430 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14431 { 11085 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14432 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14433 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14434 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14435 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14436 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14437 { 11085 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14438 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14439 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14440 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14441 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14442 { 11095 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14443 { 11095 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14444 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14445 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14446 { 11095 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14447 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14448 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14449 { 11095 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14450 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14451 { 11105 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14452 { 11105 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14453 { 11105 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14454 { 11105 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14455 { 11105 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14456 { 11105 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14457 { 11105 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14458 { 11105 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14459 { 11105 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14460 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 14461 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 14462 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 14463 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 14464 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 14465 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 14466 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 14467 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 14468 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 14469 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 14470 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14471 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14472 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14473 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14474 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14475 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14476 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14477 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14478 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14479 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14480 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14481 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14482 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14483 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14484 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14485 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14486 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14487 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14488 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14489 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14490 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 14491 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 14492 { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 14493 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 14494 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 14495 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 14496 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 14497 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 14498 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 14499 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 14500 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14501 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14502 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14503 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14504 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14505 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14506 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14507 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14508 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14509 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14510 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14511 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14512 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14513 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14514 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14515 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14516 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14517 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14518 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14519 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14520 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14521 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14522 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14523 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14524 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14525 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14526 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14527 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14528 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14529 { 11148 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14530 { 11148 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14531 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14532 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14533 { 11148 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14534 { 11148 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14535 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14536 { 11148 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14537 { 11148 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14538 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14539 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14540 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14541 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14542 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14543 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14544 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14545 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14546 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14547 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14548 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 14549 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 14550 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14551 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14552 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14553 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14554 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14555 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14556 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14557 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14558 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14559 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14560 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14561 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14562 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14563 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14564 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14565 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14566 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14567 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14568 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14569 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14570 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14571 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14572 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14573 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14574 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14575 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14576 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14577 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14578 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14579 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 14580 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 14581 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14582 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14583 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14584 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14585 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14586 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14587 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14588 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14589 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14590 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14591 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14592 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14593 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14594 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14595 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14596 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14597 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14598 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14599 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14600 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14601 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14602 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14603 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14604 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14605 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14606 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14607 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14608 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14609 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14610 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14611 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14612 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14613 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14614 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14615 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14616 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14617 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14618 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14619 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14620 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14621 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14622 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14623 { 11203 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14624 { 11203 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14625 { 11203 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14626 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14627 { 11211 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14628 { 11211 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14629 { 11211 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14630 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14631 { 11219 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14632 { 11219 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14633 { 11219 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14634 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14635 { 11227 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14636 { 11227 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14637 { 11227 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14638 { 11235 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, }, 14639 { 11235 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 14640 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 14641 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 14642 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 14643 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 14644 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14645 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14646 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14647 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14648 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14649 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14650 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14651 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14652 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, }, 14653 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, }, 14654 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14655 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14656 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14657 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14658 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 14659 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 14660 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 14661 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 14662 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14663 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14664 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14665 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14666 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14667 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14668 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14669 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14670 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, }, 14671 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, }, 14672 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14673 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14674 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14675 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14676 { 11299 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, }, 14677 { 11299 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 14678 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 14679 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 14680 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 14681 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 14682 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14683 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14684 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14685 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14686 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14687 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14688 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14689 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14690 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, }, 14691 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, }, 14692 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14693 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14694 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14695 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14696 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 14697 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 14698 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 14699 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 14700 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14701 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14702 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14703 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14704 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14705 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14706 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14707 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14708 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, }, 14709 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, }, 14710 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14711 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14712 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14713 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14714 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14715 { 11363 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14716 { 11363 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14717 { 11363 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14718 { 11373 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 14719 { 11373 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 14720 { 11380 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 14721 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, }, 14722 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, }, 14723 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 14724 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 14725 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14726 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14727 { 11412 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 14728 { 11412 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 14729 { 11412 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14730 { 11412 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14731 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14732 { 11423 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14733 { 11423 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14734 { 11423 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14735 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14736 { 11423 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14737 { 11423 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14738 { 11423 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14739 { 11423 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14740 { 11423 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14741 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14742 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 14743 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 14744 { 11423 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14745 { 11423 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14746 { 11423 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14747 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14748 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14749 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14750 { 11423 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14751 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14752 { 11423 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14753 { 11423 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14754 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14755 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14756 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14757 { 11423 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14758 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14759 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14760 { 11423 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14761 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14762 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14763 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14764 { 11423 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14765 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14766 { 11430 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14767 { 11430 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14768 { 11430 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14769 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14770 { 11430 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14771 { 11430 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14772 { 11430 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14773 { 11430 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14774 { 11430 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14775 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14776 { 11430 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 14777 { 11430 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 14778 { 11430 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 14779 { 11430 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14780 { 11430 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14781 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14782 { 11430 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14783 { 11430 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14784 { 11430 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14785 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14786 { 11430 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14787 { 11430 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14788 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14789 { 11430 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14790 { 11430 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14791 { 11430 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14792 { 11430 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14793 { 11430 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14794 { 11430 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14795 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14796 { 11430 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14797 { 11430 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14798 { 11430 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14799 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14800 { 11437 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14801 { 11437 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 14802 { 11437 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14803 { 11437 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14804 { 11437 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14805 { 11437 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14806 { 11437 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14807 { 11437 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14808 { 11437 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14809 { 11437 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14810 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14811 { 11444 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14812 { 11444 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14813 { 11444 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14814 { 11444 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14815 { 11444 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14816 { 11444 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14817 { 11444 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14818 { 11444 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14819 { 11444 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14820 { 11444 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14821 { 11451 /* vmcall */, X86::VMCALL, Convert_NoOperands, AMFBS_None, { }, }, 14822 { 11458 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 14823 { 11466 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, AMFBS_None, { }, }, 14824 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14825 { 11473 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14826 { 11473 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14827 { 11473 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14828 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14829 { 11473 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14830 { 11473 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14831 { 11473 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14832 { 11473 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14833 { 11473 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14834 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14835 { 11473 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 14836 { 11473 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 14837 { 11473 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 14838 { 11473 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14839 { 11473 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14840 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14841 { 11473 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14842 { 11473 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14843 { 11473 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14844 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14845 { 11473 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14846 { 11473 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14847 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14848 { 11473 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14849 { 11473 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14850 { 11473 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14851 { 11473 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14852 { 11473 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14853 { 11473 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14854 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14855 { 11473 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14856 { 11473 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14857 { 11473 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14858 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14859 { 11480 /* vminps */, X86::VMINPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 14860 { 11480 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14861 { 11480 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 14862 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14863 { 11480 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 14864 { 11480 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 14865 { 11480 /* vminps */, X86::VMINPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 14866 { 11480 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 14867 { 11480 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 14868 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 14869 { 11480 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 14870 { 11480 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 14871 { 11480 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 14872 { 11480 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14873 { 11480 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14874 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14875 { 11480 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14876 { 11480 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14877 { 11480 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14878 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14879 { 11480 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14880 { 11480 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14881 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14882 { 11480 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14883 { 11480 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14884 { 11480 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14885 { 11480 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14886 { 11480 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14887 { 11480 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14888 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14889 { 11480 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14890 { 11480 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14891 { 11480 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14892 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14893 { 11487 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14894 { 11487 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 14895 { 11487 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 14896 { 11487 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14897 { 11487 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14898 { 11487 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14899 { 11487 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14900 { 11487 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14901 { 11487 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14902 { 11487 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14903 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 14904 { 11494 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14905 { 11494 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 14906 { 11494 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 14907 { 11494 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 14908 { 11494 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14909 { 11494 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14910 { 11494 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14911 { 11494 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14912 { 11494 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14913 { 11494 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14914 { 11501 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, AMFBS_None, { }, }, 14915 { 11510 /* vmload */, X86::VMLOAD32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 14916 { 11510 /* vmload */, X86::VMLOAD64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 14917 { 11517 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, AMFBS_None, { }, }, 14918 { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14919 { 11525 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 14920 { 11525 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 14921 { 11525 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 14922 { 11525 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 14923 { 11525 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 14924 { 11525 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 14925 { 11525 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 14926 { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 14927 { 11525 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 14928 { 11525 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 14929 { 11525 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 14930 { 11525 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 14931 { 11525 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 14932 { 11525 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 14933 { 11525 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14934 { 11525 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14935 { 11525 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14936 { 11525 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14937 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14938 { 11525 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14939 { 11525 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14940 { 11525 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14941 { 11525 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14942 { 11525 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14943 { 11525 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14944 { 11525 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14945 { 11525 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14946 { 11525 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14947 { 11525 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14948 { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14949 { 11533 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 14950 { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 14951 { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 14952 { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 14953 { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14954 { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14955 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14956 { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14957 { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14958 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14959 { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14960 { 11543 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 14961 { 11543 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 14962 { 11543 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 14963 { 11543 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 14964 { 11543 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 14965 { 11543 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 14966 { 11543 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 14967 { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 14968 { 11543 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 14969 { 11543 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 14970 { 11543 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 14971 { 11543 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 14972 { 11543 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 14973 { 11543 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 14974 { 11543 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14975 { 11543 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14976 { 11543 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14977 { 11543 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14978 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14979 { 11543 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14980 { 11543 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14981 { 11543 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14982 { 11543 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14983 { 11543 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14984 { 11543 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14985 { 11543 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14986 { 11543 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14987 { 11543 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14988 { 11543 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14989 { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 14990 { 11551 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 14991 { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 14992 { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 14993 { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 14994 { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14995 { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14996 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 14997 { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14998 { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 14999 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15000 { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 15001 { 11561 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 15002 { 11561 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 15003 { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 15004 { 11561 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 15005 { 11561 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 15006 { 11561 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 15007 { 11561 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 15008 { 11561 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 15009 { 11561 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 15010 { 11561 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 15011 { 11561 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 15012 { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15013 { 11567 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15014 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15015 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15016 { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15017 { 11567 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15018 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15019 { 11567 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15020 { 11567 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 15021 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 15022 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15023 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15024 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15025 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15026 { 11567 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15027 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15028 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15029 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15030 { 11567 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15031 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15032 { 11567 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15033 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15034 { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15035 { 11576 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15036 { 11576 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15037 { 11576 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15038 { 11576 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15039 { 11576 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15040 { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15041 { 11584 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15042 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15043 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15044 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15045 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15046 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15047 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15048 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15049 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15050 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15051 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15052 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15053 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15054 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15055 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15056 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15057 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15058 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15059 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15060 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15061 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15062 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15063 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15064 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15065 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15066 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15067 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15068 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15069 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15070 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15071 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15072 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15073 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15074 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15075 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15076 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15077 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15078 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15079 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15080 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15081 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15082 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15083 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15084 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15085 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15086 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15087 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15088 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15089 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15090 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15091 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15092 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15093 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15094 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15095 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15096 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15097 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15098 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15099 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15100 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15101 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15102 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15103 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15104 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15105 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15106 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15107 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15108 { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15109 { 11638 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15110 { 11638 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15111 { 11638 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15112 { 11638 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15113 { 11638 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15114 { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15115 { 11646 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15116 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15117 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15118 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15119 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15120 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15121 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15122 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15123 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15124 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15125 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15126 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15127 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15128 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15129 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15130 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15131 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15132 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15133 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15134 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15135 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15136 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15137 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15138 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15139 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15140 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15141 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15142 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15143 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15144 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15145 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15146 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15147 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15148 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15149 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15150 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15151 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15152 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15153 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15154 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15155 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15156 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15157 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15158 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15159 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15160 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15161 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15162 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15163 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15164 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15165 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15166 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15167 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15168 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15169 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15170 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15171 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15172 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15173 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15174 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15175 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15176 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15177 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15178 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15179 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15180 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15181 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15182 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15183 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15184 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15185 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15186 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15187 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15188 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15189 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15190 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15191 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15192 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15193 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15194 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15195 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15196 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15197 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15198 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15199 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15200 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15201 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15202 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15203 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15204 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15205 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15206 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15207 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15208 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15209 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15210 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15211 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15212 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15213 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15214 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15215 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15216 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15217 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15218 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15219 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15220 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15221 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15222 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15223 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15224 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15225 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15226 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15227 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15228 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15229 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15230 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15231 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15232 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15233 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15234 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15235 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15236 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15237 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15238 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15239 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15240 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15241 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15242 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15243 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15244 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15245 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15246 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15247 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15248 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15249 { 11742 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15250 { 11751 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 15251 { 11751 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 15252 { 11751 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 15253 { 11751 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 15254 { 11759 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 15255 { 11759 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 15256 { 11759 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 15257 { 11759 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 15258 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15259 { 11767 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15260 { 11776 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 15261 { 11776 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 15262 { 11776 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 15263 { 11776 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 15264 { 11784 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 15265 { 11784 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 15266 { 11784 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 15267 { 11784 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 15268 { 11792 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, }, 15269 { 11792 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, }, 15270 { 11802 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, }, 15271 { 11802 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, }, 15272 { 11812 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15273 { 11812 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15274 { 11812 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15275 { 11812 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15276 { 11812 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15277 { 11821 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15278 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15279 { 11821 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15280 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15281 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15282 { 11831 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15283 { 11831 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15284 { 11831 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15285 { 11831 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15286 { 11831 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15287 { 11840 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15288 { 11840 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15289 { 11840 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15290 { 11840 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15291 { 11840 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15292 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15293 { 11849 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 15294 { 11849 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 15295 { 11849 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 15296 { 11849 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 15297 { 11849 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 15298 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15299 { 11849 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 15300 { 11849 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 15301 { 11849 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 15302 { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15303 { 11855 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15304 { 11863 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 15305 { 11863 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 15306 { 11863 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 15307 { 11863 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 15308 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15309 { 11863 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15310 { 11863 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15311 { 11863 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15312 { 11863 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15313 { 11863 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15314 { 11863 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15315 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15316 { 11870 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15317 { 11870 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15318 { 11870 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15319 { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15320 { 11879 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15321 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15322 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15323 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15324 { 11879 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15325 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15326 { 11879 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15327 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15328 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15329 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15330 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15331 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15332 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15333 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15334 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15335 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15336 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15337 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15338 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15339 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15340 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15341 { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15342 { 11889 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15343 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15344 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15345 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15346 { 11889 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15347 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15348 { 11889 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15349 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15350 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15351 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15352 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15353 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15354 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15355 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15356 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15357 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15358 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15359 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15360 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15361 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15362 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15363 { 11899 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 15364 { 11899 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 15365 { 11899 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 15366 { 11899 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 15367 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15368 { 11899 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15369 { 11899 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15370 { 11899 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15371 { 11899 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15372 { 11899 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15373 { 11899 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15374 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15375 { 11906 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15376 { 11906 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15377 { 11906 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15378 { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15379 { 11915 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15380 { 11915 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15381 { 11915 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15382 { 11915 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15383 { 11915 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15384 { 11915 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15385 { 11915 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15386 { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15387 { 11915 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15388 { 11915 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15389 { 11915 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15390 { 11915 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15391 { 11915 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15392 { 11915 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15393 { 11915 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15394 { 11915 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15395 { 11915 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15396 { 11915 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15397 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15398 { 11915 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15399 { 11915 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15400 { 11915 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15401 { 11915 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15402 { 11915 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15403 { 11915 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15404 { 11915 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15405 { 11915 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15406 { 11915 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15407 { 11915 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15408 { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15409 { 11923 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15410 { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15411 { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15412 { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15413 { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15414 { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15415 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15416 { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15417 { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15418 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15419 { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15420 { 11933 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 15421 { 11933 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15422 { 11933 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 15423 { 11933 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15424 { 11933 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 15425 { 11933 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15426 { 11933 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 15427 { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15428 { 11933 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 15429 { 11933 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15430 { 11933 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15431 { 11933 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15432 { 11933 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15433 { 11933 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15434 { 11933 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15435 { 11933 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15436 { 11933 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15437 { 11933 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15438 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15439 { 11933 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15440 { 11933 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15441 { 11933 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15442 { 11933 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15443 { 11933 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15444 { 11933 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15445 { 11933 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15446 { 11933 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15447 { 11933 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15448 { 11933 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15449 { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15450 { 11941 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15451 { 11941 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15452 { 11941 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15453 { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15454 { 11941 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15455 { 11941 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15456 { 11941 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15457 { 11941 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15458 { 11941 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15459 { 11941 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15460 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15461 { 11951 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15462 { 11951 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15463 { 11951 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15464 { 11960 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 15465 { 11968 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 15466 { 11983 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, }, 15467 { 11983 /* vmreadl */, X86::VMREAD32mr, Convert__Mem325_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, }, 15468 { 11991 /* vmreadq */, X86::VMREAD64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, }, 15469 { 11991 /* vmreadq */, X86::VMREAD64mr, Convert__Mem645_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem64 }, }, 15470 { 11999 /* vmresume */, X86::VMRESUME, Convert_NoOperands, AMFBS_None, { }, }, 15471 { 12008 /* vmrun */, X86::VMRUN32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 15472 { 12008 /* vmrun */, X86::VMRUN64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 15473 { 12014 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 15474 { 12014 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 15475 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15476 { 12021 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15477 { 12021 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15478 { 12021 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15479 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15480 { 12021 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15481 { 12021 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15482 { 12021 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15483 { 12021 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15484 { 12021 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15485 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15486 { 12021 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 15487 { 12021 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 15488 { 12021 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 15489 { 12021 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15490 { 12021 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15491 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15492 { 12021 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15493 { 12021 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15494 { 12021 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15495 { 12021 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15496 { 12021 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15497 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15498 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15499 { 12021 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15500 { 12021 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15501 { 12021 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15502 { 12021 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15503 { 12021 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15504 { 12021 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15505 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15506 { 12021 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15507 { 12021 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15508 { 12021 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15509 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15510 { 12028 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15511 { 12028 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15512 { 12028 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15513 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15514 { 12028 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15515 { 12028 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15516 { 12028 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15517 { 12028 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15518 { 12028 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15519 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15520 { 12028 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 15521 { 12028 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 15522 { 12028 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 15523 { 12028 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15524 { 12028 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15525 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15526 { 12028 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15527 { 12028 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15528 { 12028 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15529 { 12028 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15530 { 12028 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15531 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15532 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15533 { 12028 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15534 { 12028 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15535 { 12028 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15536 { 12028 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15537 { 12028 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15538 { 12028 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15539 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15540 { 12028 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15541 { 12028 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15542 { 12028 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15543 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15544 { 12035 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15545 { 12035 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 15546 { 12035 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 15547 { 12035 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15548 { 12035 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15549 { 12035 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15550 { 12035 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15551 { 12035 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15552 { 12035 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15553 { 12035 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15554 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15555 { 12042 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15556 { 12042 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 15557 { 12042 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 15558 { 12042 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15559 { 12042 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15560 { 12042 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15561 { 12042 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15562 { 12042 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15563 { 12042 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15564 { 12042 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15565 { 12057 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, }, 15566 { 12057 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32, MCK_GR32 }, }, 15567 { 12066 /* vmwriteq */, X86::VMWRITE64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, }, 15568 { 12066 /* vmwriteq */, X86::VMWRITE64rm, Convert__Reg1_1__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_GR64 }, }, 15569 { 12075 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, AMFBS_None, { }, }, 15570 { 12082 /* vmxon */, X86::VMXON, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 15571 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15572 { 12088 /* vorpd */, X86::VORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15573 { 12088 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15574 { 12088 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15575 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15576 { 12088 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15577 { 12088 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15578 { 12088 /* vorpd */, X86::VORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15579 { 12088 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15580 { 12088 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15581 { 12088 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 15582 { 12088 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 15583 { 12088 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 15584 { 12088 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15585 { 12088 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15586 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15587 { 12088 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15588 { 12088 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15589 { 12088 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15590 { 12088 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15591 { 12088 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15592 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15593 { 12088 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15594 { 12088 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15595 { 12088 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15596 { 12088 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15597 { 12088 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15598 { 12088 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15599 { 12088 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15600 { 12088 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15601 { 12088 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15602 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15603 { 12094 /* vorps */, X86::VORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15604 { 12094 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15605 { 12094 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15606 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15607 { 12094 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15608 { 12094 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15609 { 12094 /* vorps */, X86::VORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15610 { 12094 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15611 { 12094 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15612 { 12094 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 15613 { 12094 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 15614 { 12094 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 15615 { 12094 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15616 { 12094 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15617 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15618 { 12094 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15619 { 12094 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15620 { 12094 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15621 { 12094 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15622 { 12094 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15623 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15624 { 12094 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15625 { 12094 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15626 { 12094 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15627 { 12094 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15628 { 12094 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15629 { 12094 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15630 { 12094 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15631 { 12094 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15632 { 12094 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15633 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ128rr, Convert__VK4Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK4Pair }, }, 15634 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ256rr, Convert__VK8Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK8Pair }, }, 15635 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK16Pair }, }, 15636 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ128rm, Convert__VK4Pair1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK4Pair }, }, 15637 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ256rm, Convert__VK8Pair1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK8Pair }, }, 15638 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrm, Convert__VK16Pair1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK16Pair }, }, 15639 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrmb, Convert__VK16Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK16Pair }, }, 15640 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ128rmb, Convert__VK4Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK4Pair }, }, 15641 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ256rmb, Convert__VK8Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK8Pair }, }, 15642 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ128rr, Convert__VK2Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK2Pair }, }, 15643 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ256rr, Convert__VK4Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK4Pair }, }, 15644 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK8Pair }, }, 15645 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ128rm, Convert__VK2Pair1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK2Pair }, }, 15646 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ256rm, Convert__VK4Pair1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK4Pair }, }, 15647 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrm, Convert__VK8Pair1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK8Pair }, }, 15648 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ128rmb, Convert__VK2Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK2Pair }, }, 15649 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ256rmb, Convert__VK4Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK4Pair }, }, 15650 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrmb, Convert__VK8Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK8Pair }, }, 15651 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 15652 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15653 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15654 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 15655 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15656 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15657 { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15658 { 12149 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15659 { 12149 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15660 { 12149 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15661 { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15662 { 12149 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15663 { 12149 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15664 { 12149 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15665 { 12149 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15666 { 12149 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15667 { 12149 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15668 { 12149 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15669 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15670 { 12149 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15671 { 12149 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15672 { 12149 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15673 { 12149 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15674 { 12149 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15675 { 12149 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15676 { 12149 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15677 { 12149 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15678 { 12149 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15679 { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15680 { 12156 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15681 { 12156 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15682 { 12156 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15683 { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15684 { 12156 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15685 { 12156 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15686 { 12156 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15687 { 12156 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15688 { 12156 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15689 { 12156 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 15690 { 12156 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 15691 { 12156 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 15692 { 12156 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15693 { 12156 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15694 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15695 { 12156 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15696 { 12156 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15697 { 12156 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15698 { 12156 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15699 { 12156 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15700 { 12156 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15701 { 12156 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15702 { 12156 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15703 { 12156 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15704 { 12156 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15705 { 12156 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15706 { 12156 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15707 { 12156 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15708 { 12156 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15709 { 12156 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15710 { 12163 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15711 { 12163 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15712 { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15713 { 12163 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15714 { 12163 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15715 { 12163 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15716 { 12163 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 15717 { 12163 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 15718 { 12163 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 15719 { 12163 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15720 { 12163 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15721 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15722 { 12163 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15723 { 12163 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15724 { 12163 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15725 { 12163 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15726 { 12163 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15727 { 12163 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15728 { 12163 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15729 { 12163 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15730 { 12163 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15731 { 12163 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15732 { 12163 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15733 { 12163 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15734 { 12163 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15735 { 12163 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15736 { 12163 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15737 { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 15738 { 12170 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 15739 { 12170 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 15740 { 12170 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 15741 { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 15742 { 12170 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 15743 { 12170 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 15744 { 12170 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 15745 { 12170 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 15746 { 12170 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 15747 { 12170 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15748 { 12170 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15749 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15750 { 12170 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15751 { 12170 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15752 { 12170 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15753 { 12170 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15754 { 12170 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15755 { 12170 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15756 { 12170 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15757 { 12170 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15758 { 12170 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15759 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15760 { 12177 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15761 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15762 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15763 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15764 { 12177 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15765 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15766 { 12177 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15767 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15768 { 12177 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15769 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 15770 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 15771 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 15772 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15773 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15774 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15775 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15776 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15777 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15778 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15779 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15780 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15781 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15782 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15783 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15784 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15785 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15786 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15787 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15788 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15789 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15790 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15791 { 12187 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15792 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15793 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15794 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15795 { 12187 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15796 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15797 { 12187 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15798 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15799 { 12187 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15800 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15801 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15802 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15803 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15804 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15805 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15806 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15807 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15808 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15809 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15810 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15811 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15812 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15813 { 12197 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15814 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15815 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15816 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15817 { 12197 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15818 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15819 { 12197 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15820 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15821 { 12197 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15822 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 15823 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 15824 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 15825 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15826 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15827 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15828 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15829 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15830 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15831 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15832 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15833 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15834 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15835 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15836 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15837 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15838 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15839 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15840 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15841 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15842 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15843 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15844 { 12207 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15845 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15846 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15847 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15848 { 12207 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15849 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15850 { 12207 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15851 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15852 { 12207 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15853 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15854 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15855 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15856 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15857 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15858 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15859 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15860 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15861 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15862 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15863 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15864 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15865 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15866 { 12217 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15867 { 12217 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15868 { 12217 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15869 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15870 { 12217 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15871 { 12217 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15872 { 12217 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15873 { 12217 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15874 { 12217 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15875 { 12217 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15876 { 12217 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15877 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15878 { 12217 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15879 { 12217 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15880 { 12217 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15881 { 12217 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15882 { 12217 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15883 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15884 { 12217 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15885 { 12217 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15886 { 12217 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15887 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15888 { 12224 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15889 { 12224 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15890 { 12224 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15891 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15892 { 12224 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15893 { 12224 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15894 { 12224 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15895 { 12224 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15896 { 12224 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15897 { 12224 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 15898 { 12224 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 15899 { 12224 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 15900 { 12224 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15901 { 12224 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15902 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15903 { 12224 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15904 { 12224 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15905 { 12224 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15906 { 12224 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15907 { 12224 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15908 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15909 { 12224 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15910 { 12224 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15911 { 12224 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15912 { 12224 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15913 { 12224 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15914 { 12224 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15915 { 12224 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15916 { 12224 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15917 { 12224 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15918 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15919 { 12231 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15920 { 12231 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15921 { 12231 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15922 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15923 { 12231 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15924 { 12231 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15925 { 12231 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15926 { 12231 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15927 { 12231 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15928 { 12231 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 15929 { 12231 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 15930 { 12231 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 15931 { 12231 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15932 { 12231 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15933 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15934 { 12231 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15935 { 12231 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15936 { 12231 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15937 { 12231 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15938 { 12231 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15939 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15940 { 12231 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15941 { 12231 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15942 { 12231 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15943 { 12231 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15944 { 12231 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15945 { 12231 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15946 { 12231 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15947 { 12231 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15948 { 12231 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15949 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15950 { 12238 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15951 { 12238 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15952 { 12238 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15953 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15954 { 12238 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15955 { 12238 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15956 { 12238 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15957 { 12238 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15958 { 12238 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15959 { 12238 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15960 { 12238 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15961 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15962 { 12238 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15963 { 12238 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15964 { 12238 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15965 { 12238 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15966 { 12238 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15967 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15968 { 12238 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15969 { 12238 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15970 { 12238 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15971 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15972 { 12246 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15973 { 12246 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15974 { 12246 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15975 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15976 { 12246 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15977 { 12246 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 15978 { 12246 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 15979 { 12246 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 15980 { 12246 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 15981 { 12246 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15982 { 12246 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15983 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15984 { 12246 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15985 { 12246 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15986 { 12246 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 15987 { 12246 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15988 { 12246 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15989 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15990 { 12246 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15991 { 12246 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15992 { 12246 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 15993 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 15994 { 12254 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 15995 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 15996 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 15997 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 15998 { 12254 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 15999 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16000 { 12254 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16001 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16002 { 12254 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16003 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16004 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16005 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16006 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16007 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16008 { 12254 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16009 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16010 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16011 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16012 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16013 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16014 { 12254 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16015 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16016 { 12263 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16017 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16018 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16019 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16020 { 12263 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16021 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16022 { 12263 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16023 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16024 { 12263 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16025 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16026 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16027 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16028 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16029 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16030 { 12263 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16031 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16032 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16033 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16034 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16035 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16036 { 12263 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16037 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16038 { 12272 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16039 { 12272 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16040 { 12272 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16041 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16042 { 12272 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16043 { 12272 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16044 { 12272 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16045 { 12272 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16046 { 12272 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16047 { 12272 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16048 { 12272 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16049 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16050 { 12272 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16051 { 12272 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16052 { 12272 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16053 { 12272 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16054 { 12272 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16055 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16056 { 12272 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16057 { 12272 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16058 { 12272 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16059 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16060 { 12279 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16061 { 12279 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16062 { 12279 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16063 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16064 { 12279 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16065 { 12279 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16066 { 12279 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16067 { 12279 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16068 { 12279 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16069 { 12279 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16070 { 12279 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16071 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16072 { 12279 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16073 { 12279 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16074 { 12279 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16075 { 12279 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16076 { 12279 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16077 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16078 { 12279 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16079 { 12279 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16080 { 12279 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16081 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16082 { 12288 /* vpand */, X86::VPANDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16083 { 12288 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16084 { 12288 /* vpand */, X86::VPANDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16085 { 12294 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16086 { 12294 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16087 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16088 { 12294 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16089 { 12294 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16090 { 12294 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16091 { 12294 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 16092 { 12294 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 16093 { 12294 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 16094 { 12294 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16095 { 12294 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16096 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16097 { 12294 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16098 { 12294 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16099 { 12294 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16100 { 12294 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16101 { 12294 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16102 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16103 { 12294 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16104 { 12294 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16105 { 12294 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16106 { 12294 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16107 { 12294 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16108 { 12294 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16109 { 12294 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16110 { 12294 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16111 { 12294 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16112 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16113 { 12301 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16114 { 12301 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16115 { 12301 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16116 { 12308 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16117 { 12308 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16118 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16119 { 12308 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16120 { 12308 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16121 { 12308 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16122 { 12308 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 16123 { 12308 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 16124 { 12308 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 16125 { 12308 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16126 { 12308 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16127 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16128 { 12308 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16129 { 12308 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16130 { 12308 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16131 { 12308 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16132 { 12308 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16133 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16134 { 12308 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16135 { 12308 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16136 { 12308 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16137 { 12308 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16138 { 12308 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16139 { 12308 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16140 { 12308 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16141 { 12308 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16142 { 12308 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16143 { 12316 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16144 { 12316 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16145 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16146 { 12316 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16147 { 12316 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16148 { 12316 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16149 { 12316 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 16150 { 12316 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 16151 { 12316 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 16152 { 12316 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16153 { 12316 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16154 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16155 { 12316 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16156 { 12316 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16157 { 12316 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16158 { 12316 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16159 { 12316 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16160 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16161 { 12316 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16162 { 12316 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16163 { 12316 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16164 { 12316 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16165 { 12316 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16166 { 12316 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16167 { 12316 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16168 { 12316 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16169 { 12316 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16170 { 12324 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16171 { 12324 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16172 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16173 { 12324 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16174 { 12324 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16175 { 12324 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16176 { 12324 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 16177 { 12324 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 16178 { 12324 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 16179 { 12324 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16180 { 12324 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16181 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16182 { 12324 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16183 { 12324 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16184 { 12324 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16185 { 12324 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16186 { 12324 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16187 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16188 { 12324 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16189 { 12324 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16190 { 12324 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16191 { 12324 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16192 { 12324 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16193 { 12324 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16194 { 12324 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16195 { 12324 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16196 { 12324 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16197 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16198 { 12331 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16199 { 12331 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16200 { 12331 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16201 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16202 { 12331 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16203 { 12331 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16204 { 12331 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16205 { 12331 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16206 { 12331 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16207 { 12331 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16208 { 12331 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16209 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16210 { 12331 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16211 { 12331 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16212 { 12331 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16213 { 12331 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16214 { 12331 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16215 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16216 { 12331 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16217 { 12331 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16218 { 12331 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16219 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16220 { 12338 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16221 { 12338 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16222 { 12338 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16223 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16224 { 12338 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16225 { 12338 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16226 { 12338 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16227 { 12338 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16228 { 12338 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16229 { 12338 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16230 { 12338 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16231 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16232 { 12338 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16233 { 12338 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16234 { 12338 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16235 { 12338 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16236 { 12338 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16237 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16238 { 12338 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16239 { 12338 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16240 { 12338 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16241 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16242 { 12345 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16243 { 12345 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16244 { 12345 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16245 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16246 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16247 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16248 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16249 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16250 { 12354 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16251 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16252 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16253 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16254 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16255 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16256 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16257 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16258 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16259 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16260 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16261 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16262 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16263 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16264 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16265 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16266 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16267 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16268 { 12364 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16269 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 16270 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 16271 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 16272 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16273 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16274 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16275 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16276 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16277 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16278 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16279 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16280 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16281 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16282 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16283 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16284 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16285 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16286 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16287 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16288 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16289 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16290 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16291 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16292 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16293 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16294 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16295 { 12374 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16296 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 16297 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 16298 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 16299 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16300 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16301 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16302 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16303 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16304 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16305 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16306 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16307 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16308 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16309 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16310 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16311 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16312 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16313 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16314 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16315 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16316 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16317 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16318 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16319 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16320 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16321 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16322 { 12384 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16323 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16324 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16325 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16326 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16327 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16328 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16329 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16330 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16331 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16332 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16333 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16334 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16335 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16336 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16337 { 12394 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16338 { 12394 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16339 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16340 { 12404 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16341 { 12404 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16342 { 12404 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16343 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 16344 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 16345 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 16346 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, }, 16347 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, }, 16348 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16349 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 16350 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 16351 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32 }, }, 16352 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256 }, }, 16353 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32X }, }, 16354 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256X }, }, 16355 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512 }, }, 16356 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16357 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16358 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16359 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16360 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16361 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16362 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16363 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16364 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16365 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16366 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16367 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16368 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16369 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16370 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16371 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16372 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16373 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16374 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 16375 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 16376 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 16377 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, }, 16378 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, }, 16379 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16380 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 16381 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 16382 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 16383 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, }, 16384 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 16385 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 16386 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512 }, }, 16387 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16388 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16389 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16390 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16391 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16392 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16393 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16394 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16395 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16396 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16397 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16398 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16399 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16400 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16401 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16402 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16403 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16404 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16405 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 16406 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 16407 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 16408 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 16409 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 16410 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 16411 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 16412 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 16413 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 16414 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X }, }, 16415 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512 }, }, 16416 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16417 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 16418 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 16419 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 16420 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, }, 16421 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 16422 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 16423 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 16424 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16425 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16426 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16427 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16428 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16429 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16430 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16431 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16432 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16433 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16434 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16435 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16436 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16437 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16438 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16439 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16440 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16441 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16442 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 16443 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 16444 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 16445 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, }, 16446 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, }, 16447 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16448 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 16449 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 16450 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, }, 16451 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256 }, }, 16452 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X }, }, 16453 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256X }, }, 16454 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512 }, }, 16455 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16456 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16457 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16458 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16459 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16460 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16461 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16462 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16463 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16464 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16465 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16466 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16467 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16468 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16469 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16470 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16471 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16472 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16473 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16474 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16475 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16476 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16477 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16478 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16479 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16480 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16481 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16482 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16483 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16484 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16485 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16486 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16487 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16488 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16489 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16490 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16491 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16492 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16493 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16494 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16495 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16496 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16497 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16498 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16499 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16500 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16501 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16502 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16503 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16504 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16505 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16506 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16507 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16508 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16509 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16510 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16511 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16512 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16513 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16514 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16515 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16516 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16517 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16518 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16519 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16520 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16521 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16522 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16523 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16524 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16525 { 12564 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16526 { 12564 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16527 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16528 { 12564 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16529 { 12571 /* vpcmpb */, X86::VPCMPBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16530 { 12571 /* vpcmpb */, X86::VPCMPBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16531 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16532 { 12571 /* vpcmpb */, X86::VPCMPBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16533 { 12571 /* vpcmpb */, X86::VPCMPBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16534 { 12571 /* vpcmpb */, X86::VPCMPBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16535 { 12571 /* vpcmpb */, X86::VPCMPBZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16536 { 12571 /* vpcmpb */, X86::VPCMPBZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16537 { 12571 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16538 { 12571 /* vpcmpb */, X86::VPCMPBZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16539 { 12571 /* vpcmpb */, X86::VPCMPBZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16540 { 12571 /* vpcmpb */, X86::VPCMPBZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16541 { 12578 /* vpcmpd */, X86::VPCMPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16542 { 12578 /* vpcmpd */, X86::VPCMPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16543 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16544 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16545 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16546 { 12578 /* vpcmpd */, X86::VPCMPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16547 { 12578 /* vpcmpd */, X86::VPCMPDZrmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 16548 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 16549 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 16550 { 12578 /* vpcmpd */, X86::VPCMPDZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16551 { 12578 /* vpcmpd */, X86::VPCMPDZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16552 { 12578 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16553 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16554 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16555 { 12578 /* vpcmpd */, X86::VPCMPDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16556 { 12578 /* vpcmpd */, X86::VPCMPDZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16557 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16558 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16559 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16560 { 12585 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16561 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16562 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16563 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16564 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16565 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16566 { 12585 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16567 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16568 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16569 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16570 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16571 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16572 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16573 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16574 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16575 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16576 { 12594 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16577 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16578 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16579 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16580 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16581 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16582 { 12594 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16583 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16584 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16585 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 16586 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 16587 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 16588 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16589 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16590 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16591 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16592 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16593 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16594 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16595 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16596 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16597 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16598 { 12603 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16599 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16600 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16601 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16602 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16603 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16604 { 12603 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16605 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16606 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16607 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 16608 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 16609 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 16610 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16611 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16612 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16613 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16614 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16615 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16616 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16617 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16618 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16619 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16620 { 12612 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16621 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16622 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16623 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16624 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16625 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16626 { 12612 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16627 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16628 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16629 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16630 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16631 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16632 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16633 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16634 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16635 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 16636 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 16637 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 16638 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 16639 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16640 { 12643 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16641 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16642 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16643 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16644 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16645 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16646 { 12643 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16647 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16648 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16649 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16650 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16651 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16652 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16653 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16654 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16655 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16656 { 12652 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16657 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16658 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16659 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16660 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16661 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16662 { 12652 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16663 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16664 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16665 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 16666 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 16667 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 16668 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16669 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16670 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16671 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16672 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16673 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16674 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16675 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16676 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16677 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16678 { 12661 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16679 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16680 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16681 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16682 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16683 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16684 { 12661 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16685 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16686 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16687 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 16688 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 16689 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 16690 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16691 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16692 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16693 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16694 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16695 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16696 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16697 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16698 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16699 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16700 { 12670 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 16701 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16702 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16703 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16704 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16705 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16706 { 12670 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 16707 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16708 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16709 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16710 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16711 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16712 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16713 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16714 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16715 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 16716 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 16717 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 16718 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 16719 { 12701 /* vpcmpq */, X86::VPCMPQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16720 { 12701 /* vpcmpq */, X86::VPCMPQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16721 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16722 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16723 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16724 { 12701 /* vpcmpq */, X86::VPCMPQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16725 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 16726 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 16727 { 12701 /* vpcmpq */, X86::VPCMPQZrmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 16728 { 12701 /* vpcmpq */, X86::VPCMPQZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16729 { 12701 /* vpcmpq */, X86::VPCMPQZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16730 { 12701 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16731 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16732 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16733 { 12701 /* vpcmpq */, X86::VPCMPQZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16734 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16735 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16736 { 12701 /* vpcmpq */, X86::VPCMPQZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16737 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16738 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16739 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16740 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16741 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16742 { 12708 /* vpcmpub */, X86::VPCMPUBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16743 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16744 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16745 { 12708 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16746 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16747 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16748 { 12708 /* vpcmpub */, X86::VPCMPUBZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16749 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16750 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16751 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16752 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16753 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16754 { 12716 /* vpcmpud */, X86::VPCMPUDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16755 { 12716 /* vpcmpud */, X86::VPCMPUDZrmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 16756 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 16757 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 16758 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16759 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16760 { 12716 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16761 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16762 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16763 { 12716 /* vpcmpud */, X86::VPCMPUDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16764 { 12716 /* vpcmpud */, X86::VPCMPUDZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16765 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16766 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16767 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16768 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16769 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16770 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16771 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16772 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16773 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 16774 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 16775 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 16776 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16777 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16778 { 12724 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16779 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16780 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16781 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16782 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16783 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16784 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16785 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16786 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16787 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16788 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16789 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16790 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16791 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16792 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16793 { 12732 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16794 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16795 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16796 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16797 { 12740 /* vpcmpw */, X86::VPCMPWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 16798 { 12740 /* vpcmpw */, X86::VPCMPWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 16799 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, }, 16800 { 12740 /* vpcmpw */, X86::VPCMPWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 16801 { 12740 /* vpcmpw */, X86::VPCMPWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 16802 { 12740 /* vpcmpw */, X86::VPCMPWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 16803 { 12740 /* vpcmpw */, X86::VPCMPWZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16804 { 12740 /* vpcmpw */, X86::VPCMPWZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16805 { 12740 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16806 { 12740 /* vpcmpw */, X86::VPCMPWZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16807 { 12740 /* vpcmpw */, X86::VPCMPWZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16808 { 12740 /* vpcmpw */, X86::VPCMPWZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16809 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16810 { 12747 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16811 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16812 { 12754 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16813 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16814 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 16815 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 16816 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 16817 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 16818 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 16819 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16820 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16821 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16822 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16823 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16824 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16825 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16826 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16827 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16828 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16829 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 16830 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 16831 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 16832 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 16833 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 16834 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16835 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16836 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16837 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16838 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16839 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16840 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16841 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16842 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16843 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16844 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 16845 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 16846 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 16847 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 16848 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 16849 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16850 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16851 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16852 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16853 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16854 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16855 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16856 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16857 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16858 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16859 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 16860 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 16861 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 16862 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 16863 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 16864 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16865 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16866 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16867 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16868 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16869 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16870 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16871 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16872 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16873 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16874 { 12809 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16875 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16876 { 12816 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16877 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16878 { 12824 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16879 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16880 { 12832 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16881 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16882 { 12840 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16883 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 16884 { 12848 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 16885 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16886 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 16887 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 16888 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 16889 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 16890 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 16891 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 16892 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 16893 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 16894 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16895 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16896 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16897 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16898 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16899 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16900 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16901 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16902 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16903 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16904 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16905 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16906 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16907 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16908 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16909 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16910 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16911 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16912 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 16913 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 16914 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 16915 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 16916 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 16917 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 16918 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 16919 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 16920 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 16921 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16922 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16923 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16924 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16925 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16926 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16927 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16928 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16929 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16930 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16931 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16932 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16933 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16934 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16935 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16936 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16937 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16938 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16939 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16940 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16941 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16942 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16943 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16944 { 12879 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16945 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 16946 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 16947 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 16948 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16949 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16950 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16951 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16952 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16953 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16954 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16955 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16956 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16957 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16958 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16959 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16960 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16961 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16962 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16963 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16964 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16965 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16966 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16967 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16968 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16969 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16970 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16971 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16972 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 16973 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 16974 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 16975 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16976 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16977 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16978 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16979 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16980 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16981 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16982 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16983 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16984 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16985 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16986 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16987 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16988 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 16989 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16990 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16991 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16992 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 16993 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 16994 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 16995 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 16996 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 16997 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 16998 { 12898 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 16999 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17000 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17001 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17002 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17003 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17004 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17005 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17006 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17007 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17008 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17009 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17010 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17011 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17012 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17013 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17014 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17015 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17016 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17017 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17018 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17019 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17020 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17021 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17022 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17023 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17024 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17025 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17026 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17027 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17028 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17029 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17030 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17031 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17032 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17033 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17034 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17035 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17036 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17037 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17038 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17039 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17040 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17041 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17042 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17043 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17044 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17045 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17046 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17047 { 12917 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17048 { 12917 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17049 { 12928 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17050 { 12928 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17051 { 12939 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17052 { 12939 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17053 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17054 { 12939 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17055 { 12939 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17056 { 12939 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17057 { 12939 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17058 { 12939 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17059 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17060 { 12939 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17061 { 12939 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17062 { 12939 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17063 { 12939 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17064 { 12939 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17065 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17066 { 12939 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17067 { 12939 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17068 { 12939 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17069 { 12946 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17070 { 12946 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17071 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17072 { 12946 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17073 { 12946 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17074 { 12946 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17075 { 12946 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17076 { 12946 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17077 { 12946 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17078 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17079 { 12946 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17080 { 12946 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17081 { 12946 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17082 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17083 { 12946 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17084 { 12946 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17085 { 12946 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17086 { 12946 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17087 { 12946 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17088 { 12946 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17089 { 12953 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17090 { 12953 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17091 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17092 { 12953 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17093 { 12953 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17094 { 12953 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17095 { 12953 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17096 { 12953 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17097 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17098 { 12953 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17099 { 12953 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17100 { 12953 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17101 { 12953 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17102 { 12953 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17103 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17104 { 12953 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17105 { 12953 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17106 { 12953 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17107 { 12962 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17108 { 12962 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17109 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17110 { 12962 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17111 { 12962 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17112 { 12962 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17113 { 12962 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17114 { 12962 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17115 { 12962 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17116 { 12962 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17117 { 12962 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17118 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17119 { 12962 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17120 { 12962 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17121 { 12962 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17122 { 12962 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17123 { 12962 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17124 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17125 { 12962 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17126 { 12962 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17127 { 12962 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17128 { 12962 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17129 { 12962 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17130 { 12962 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17131 { 12962 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17132 { 12962 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17133 { 12962 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17134 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17135 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17136 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17137 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17138 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17139 { 12971 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17140 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17141 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17142 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17143 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17144 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17145 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17146 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17147 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17148 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17149 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17150 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17151 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17152 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17153 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17154 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17155 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17156 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17157 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17158 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17159 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17160 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17161 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17162 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17163 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17164 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17165 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17166 { 12981 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17167 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17168 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17169 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17170 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17171 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17172 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17173 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17174 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17175 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17176 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17177 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17178 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17179 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17180 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17181 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17182 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17183 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17184 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17185 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17186 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17187 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17188 { 12991 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17189 { 12991 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17190 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17191 { 12991 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17192 { 12991 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17193 { 12991 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17194 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17195 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17196 { 12991 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17197 { 12991 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17198 { 12991 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17199 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17200 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17201 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17202 { 12991 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17203 { 12991 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17204 { 12991 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17205 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17206 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17207 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17208 { 12991 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17209 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17210 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17211 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17212 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17213 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17214 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17215 { 13000 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17216 { 13000 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17217 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17218 { 13000 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17219 { 13000 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17220 { 13000 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17221 { 13000 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17222 { 13000 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17223 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17224 { 13000 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17225 { 13000 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17226 { 13000 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17227 { 13000 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17228 { 13000 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17229 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17230 { 13000 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17231 { 13000 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17232 { 13000 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17233 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17234 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17235 { 13009 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17236 { 13009 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17237 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17238 { 13009 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17239 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17240 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17241 { 13020 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17242 { 13020 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17243 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17244 { 13020 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17245 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17246 { 13031 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17247 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17248 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17249 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17250 { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 17251 { 13031 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 17252 { 13031 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 17253 { 13031 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 17254 { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 17255 { 13031 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 17256 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 17257 { 13031 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 17258 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 17259 { 13031 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 17260 { 13031 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17261 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17262 { 13031 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17263 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17264 { 13031 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17265 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 17266 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 17267 { 13031 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 17268 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17269 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17270 { 13031 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17271 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17272 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17273 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17274 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17275 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17276 { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17277 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17278 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17279 { 13031 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17280 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17281 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17282 { 13031 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17283 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17284 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17285 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17286 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17287 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17288 { 13031 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17289 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17290 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17291 { 13031 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17292 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17293 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17294 { 13031 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17295 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17296 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17297 { 13031 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17298 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17299 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17300 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17301 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17302 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17303 { 13031 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17304 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17305 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17306 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17307 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17308 { 13041 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17309 { 13041 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17310 { 13041 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17311 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17312 { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 17313 { 13041 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 17314 { 13041 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 17315 { 13041 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 17316 { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 17317 { 13041 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 17318 { 13041 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 17319 { 13041 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 17320 { 13041 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 17321 { 13041 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 17322 { 13041 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17323 { 13041 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17324 { 13041 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17325 { 13041 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17326 { 13041 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17327 { 13041 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 17328 { 13041 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 17329 { 13041 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 17330 { 13041 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17331 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17332 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17333 { 13041 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17334 { 13041 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17335 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17336 { 13041 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17337 { 13041 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17338 { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17339 { 13041 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17340 { 13041 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17341 { 13041 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17342 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17343 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17344 { 13041 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17345 { 13041 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17346 { 13041 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17347 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17348 { 13041 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17349 { 13041 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17350 { 13041 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17351 { 13041 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17352 { 13041 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17353 { 13041 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17354 { 13041 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17355 { 13041 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17356 { 13041 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17357 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17358 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17359 { 13041 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17360 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17361 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17362 { 13041 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17363 { 13041 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17364 { 13041 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17365 { 13041 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17366 { 13041 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17367 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17368 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17369 { 13051 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17370 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17371 { 13051 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 17372 { 13051 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 17373 { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 17374 { 13051 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 17375 { 13051 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 17376 { 13051 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 17377 { 13051 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17378 { 13051 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17379 { 13051 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 17380 { 13051 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 17381 { 13051 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17382 { 13051 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17383 { 13051 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17384 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17385 { 13051 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17386 { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17387 { 13051 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17388 { 13051 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17389 { 13051 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17390 { 13051 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17391 { 13051 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17392 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17393 { 13051 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17394 { 13051 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17395 { 13051 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17396 { 13051 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17397 { 13051 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17398 { 13051 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17399 { 13051 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17400 { 13051 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17401 { 13051 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17402 { 13051 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17403 { 13051 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17404 { 13051 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17405 { 13051 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17406 { 13051 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17407 { 13059 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17408 { 13059 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17409 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17410 { 13059 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17411 { 13059 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17412 { 13059 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17413 { 13059 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17414 { 13059 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17415 { 13059 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17416 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17417 { 13059 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17418 { 13059 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17419 { 13059 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17420 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17421 { 13059 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17422 { 13059 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17423 { 13059 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17424 { 13059 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17425 { 13059 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17426 { 13059 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17427 { 13067 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17428 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17429 { 13067 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 17430 { 13067 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 17431 { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 17432 { 13067 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 17433 { 13067 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 17434 { 13067 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 17435 { 13067 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17436 { 13067 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17437 { 13067 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 17438 { 13067 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 17439 { 13067 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17440 { 13067 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17441 { 13067 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17442 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17443 { 13067 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17444 { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17445 { 13067 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17446 { 13067 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17447 { 13067 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17448 { 13067 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17449 { 13067 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17450 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17451 { 13067 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17452 { 13067 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17453 { 13067 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17454 { 13067 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17455 { 13067 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17456 { 13067 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17457 { 13067 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17458 { 13067 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17459 { 13067 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17460 { 13067 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17461 { 13067 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17462 { 13067 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17463 { 13067 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17464 { 13067 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17465 { 13074 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17466 { 13074 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17467 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17468 { 13074 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17469 { 13074 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17470 { 13074 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17471 { 13074 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17472 { 13074 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17473 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17474 { 13074 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17475 { 13074 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17476 { 13074 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17477 { 13074 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17478 { 13074 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17479 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17480 { 13074 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17481 { 13074 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17482 { 13074 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17483 { 13083 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17484 { 13083 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17485 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17486 { 13083 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17487 { 13083 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17488 { 13083 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17489 { 13083 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17490 { 13083 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17491 { 13083 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17492 { 13083 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17493 { 13083 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17494 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17495 { 13083 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17496 { 13083 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17497 { 13083 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17498 { 13083 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17499 { 13083 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17500 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17501 { 13083 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17502 { 13083 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17503 { 13083 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17504 { 13083 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17505 { 13083 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17506 { 13083 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17507 { 13083 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17508 { 13083 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17509 { 13083 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17510 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17511 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17512 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17513 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17514 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17515 { 13092 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17516 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17517 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17518 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17519 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17520 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17521 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17522 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17523 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17524 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17525 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17526 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17527 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17528 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17529 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17530 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17531 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17532 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17533 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17534 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17535 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17536 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17537 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17538 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17539 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17540 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17541 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17542 { 13102 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17543 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 17544 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 17545 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 17546 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17547 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17548 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17549 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17550 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17551 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17552 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17553 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17554 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17555 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17556 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17557 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17558 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17559 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17560 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17561 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17562 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17563 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17564 { 13112 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17565 { 13112 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17566 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17567 { 13112 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17568 { 13112 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17569 { 13112 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17570 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17571 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17572 { 13112 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17573 { 13112 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17574 { 13112 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17575 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17576 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17577 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17578 { 13112 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17579 { 13112 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17580 { 13112 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17581 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17582 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17583 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17584 { 13112 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17585 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17586 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17587 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17588 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17589 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17590 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17591 { 13121 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17592 { 13121 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17593 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17594 { 13121 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17595 { 13121 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17596 { 13121 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17597 { 13121 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17598 { 13121 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17599 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17600 { 13121 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17601 { 13121 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17602 { 13121 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17603 { 13121 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17604 { 13121 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17605 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17606 { 13121 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17607 { 13121 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17608 { 13121 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17609 { 13130 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17610 { 13130 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17611 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17612 { 13130 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17613 { 13130 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17614 { 13130 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17615 { 13130 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17616 { 13130 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17617 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17618 { 13130 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17619 { 13130 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17620 { 13130 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17621 { 13130 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17622 { 13130 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17623 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17624 { 13130 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17625 { 13130 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17626 { 13130 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17627 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 17628 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 17629 { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 17630 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 17631 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 17632 { 13137 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 17633 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17634 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17635 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17636 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17637 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17638 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17639 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17640 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17641 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17642 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17643 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17644 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17645 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 17646 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 17647 { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 17648 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 17649 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 17650 { 13147 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 17651 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17652 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17653 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17654 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17655 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17656 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17657 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17658 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17659 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17660 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17661 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17662 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17663 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 17664 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 17665 { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 17666 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 17667 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 17668 { 13157 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 17669 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17670 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17671 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17672 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17673 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17674 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17675 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17676 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17677 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17678 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17679 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17680 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17681 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 17682 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 17683 { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 17684 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 17685 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 17686 { 13167 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 17687 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17688 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17689 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17690 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17691 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17692 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17693 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17694 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17695 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17696 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17697 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17698 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17699 { 13177 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, }, 17700 { 13177 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, }, 17701 { 13177 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, }, 17702 { 13177 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem8 }, }, 17703 { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, }, 17704 { 13185 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, }, 17705 { 13185 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, }, 17706 { 13185 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, }, 17707 { 13193 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, }, 17708 { 13193 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, }, 17709 { 13193 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, }, 17710 { 13193 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, }, 17711 { 13201 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, }, 17712 { 13201 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, }, 17713 { 13201 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, }, 17714 { 13201 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem16 }, }, 17715 { 13209 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 17716 { 13209 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 17717 { 13209 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17718 { 13209 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17719 { 13209 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17720 { 13220 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 17721 { 13220 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, }, 17722 { 13220 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17723 { 13220 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, AMFBS_None, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17724 { 13220 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17725 { 13231 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, }, 17726 { 13231 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, }, 17727 { 13231 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, AMFBS_None, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17728 { 13231 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17729 { 13231 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, AMFBS_None, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17730 { 13242 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 17731 { 13242 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 17732 { 13242 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17733 { 13242 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17734 { 13242 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17735 { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17736 { 13253 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17737 { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17738 { 13262 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17739 { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17740 { 13271 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17741 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17742 { 13280 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17743 { 13280 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17744 { 13280 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17745 { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17746 { 13288 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17747 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17748 { 13297 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17749 { 13297 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17750 { 13297 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17751 { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17752 { 13306 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17753 { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17754 { 13316 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17755 { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17756 { 13326 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17757 { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17758 { 13336 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17759 { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17760 { 13346 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17761 { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17762 { 13356 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17763 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17764 { 13366 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17765 { 13366 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17766 { 13366 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17767 { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17768 { 13374 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17769 { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17770 { 13383 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17771 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17772 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17773 { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17774 { 13404 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17775 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17776 { 13413 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17777 { 13413 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17778 { 13413 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17779 { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17780 { 13421 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17781 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17782 { 13430 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17783 { 13430 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17784 { 13430 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17785 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17786 { 13439 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17787 { 13439 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17788 { 13439 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17789 { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 17790 { 13447 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 17791 { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, }, 17792 { 13456 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, }, 17793 { 13456 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, }, 17794 { 13456 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32X, MCK_FR32X }, }, 17795 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, }, 17796 { 13464 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, }, 17797 { 13464 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 17798 { 13464 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 17799 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, }, 17800 { 13472 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32X, MCK_FR32X }, }, 17801 { 13472 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 17802 { 13472 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 17803 { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, }, 17804 { 13480 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, }, 17805 { 13480 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, }, 17806 { 13480 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32X, MCK_FR32X }, }, 17807 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 17808 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 17809 { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 17810 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 17811 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 17812 { 13488 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 17813 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 17814 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 17815 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 17816 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17817 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17818 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17819 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17820 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17821 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17822 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17823 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17824 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17825 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17826 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17827 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17828 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17829 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17830 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17831 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17832 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17833 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17834 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 17835 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 17836 { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 17837 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 17838 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 17839 { 13497 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 17840 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 17841 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 17842 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 17843 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17844 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17845 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17846 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17847 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17848 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17849 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17850 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17851 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17852 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17853 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17854 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17855 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17856 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17857 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17858 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17859 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17860 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17861 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17862 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17863 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17864 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17865 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17866 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17867 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17868 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17869 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17870 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17871 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17872 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17873 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17874 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17875 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17876 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17877 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17878 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17879 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17880 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17881 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17882 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17883 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17884 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17885 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17886 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17887 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17888 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17889 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17890 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17891 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17892 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17893 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17894 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17895 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17896 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17897 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17898 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17899 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17900 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17901 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17902 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17903 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17904 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17905 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17906 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17907 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17908 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17909 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17910 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17911 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17912 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17913 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17914 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17915 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17916 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17917 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17918 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 17919 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 17920 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 17921 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17922 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17923 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17924 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17925 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17926 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17927 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17928 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17929 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17930 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17931 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17932 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17933 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17934 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17935 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17936 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17937 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17938 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17939 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17940 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17941 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17942 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17943 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17944 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17945 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17946 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17947 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17948 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17949 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17950 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17951 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17952 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17953 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17954 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17955 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17956 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17957 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17958 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17959 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17960 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17961 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17962 { 13661 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17963 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17964 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17965 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17966 { 13661 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17967 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17968 { 13661 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17969 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 17970 { 13661 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 17971 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17972 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17973 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17974 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17975 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17976 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 17977 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17978 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17979 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17980 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17981 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17982 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 17983 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 17984 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 17985 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17986 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17987 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 17988 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 17989 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17990 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17991 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 17992 { 13692 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 17993 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 17994 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 17995 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 17996 { 13692 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 17997 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 17998 { 13692 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 17999 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18000 { 13692 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18001 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18002 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18003 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18004 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18005 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18006 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18007 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18008 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18009 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18010 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18011 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18012 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18013 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18014 { 13700 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18015 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18016 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18017 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18018 { 13700 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18019 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18020 { 13700 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18021 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18022 { 13700 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18023 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 18024 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 18025 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 18026 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18027 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18028 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18029 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18030 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18031 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18032 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18033 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18034 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18035 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18036 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18037 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18038 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18039 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18040 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18041 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18042 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18043 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18044 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18045 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18046 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18047 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18048 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18049 { 13708 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18050 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 18051 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 18052 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 18053 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18054 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18055 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18056 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18057 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18058 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18059 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18060 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18061 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18062 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18063 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18064 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18065 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18066 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18067 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18068 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18069 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18070 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18071 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18072 { 13716 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18073 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18074 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18075 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18076 { 13716 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18077 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18078 { 13716 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18079 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18080 { 13716 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18081 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18082 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18083 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18084 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18085 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18086 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18087 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18088 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18089 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18090 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18091 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18092 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18093 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18094 { 13724 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18095 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18096 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18097 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18098 { 13724 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18099 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18100 { 13724 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18101 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18102 { 13724 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18103 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18104 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18105 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18106 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18107 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18108 { 13724 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18109 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18110 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18111 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18112 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18113 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18114 { 13724 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18115 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18116 { 13732 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18117 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18118 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18119 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18120 { 13732 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18121 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18122 { 13732 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18123 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18124 { 13732 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18125 { 13732 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 18126 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 18127 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 18128 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18129 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18130 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18131 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18132 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18133 { 13732 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18134 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18135 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18136 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18137 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18138 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18139 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18140 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18141 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18142 { 13732 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18143 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18144 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18145 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18146 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18147 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18148 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18149 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18150 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18151 { 13740 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18152 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 18153 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 18154 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 18155 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18156 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18157 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18158 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18159 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18160 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18161 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18162 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18163 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18164 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18165 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18166 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18167 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18168 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18169 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18170 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18171 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18172 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18173 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18174 { 13748 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18175 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18176 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18177 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18178 { 13748 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18179 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18180 { 13748 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18181 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18182 { 13748 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18183 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18184 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18185 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18186 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18187 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18188 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18189 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18190 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18191 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18192 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18193 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18194 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18195 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18196 { 13756 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18197 { 13756 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18198 { 13756 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18199 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18200 { 13756 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18201 { 13756 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18202 { 13756 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18203 { 13756 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18204 { 13756 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18205 { 13756 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18206 { 13756 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18207 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18208 { 13756 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18209 { 13756 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18210 { 13756 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18211 { 13756 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18212 { 13756 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18213 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18214 { 13756 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18215 { 13756 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18216 { 13756 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18217 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18218 { 13764 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18219 { 13764 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18220 { 13764 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18221 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18222 { 13764 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18223 { 13764 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18224 { 13764 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18225 { 13764 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18226 { 13764 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18227 { 13764 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 18228 { 13764 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 18229 { 13764 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 18230 { 13764 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18231 { 13764 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18232 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18233 { 13764 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18234 { 13764 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18235 { 13764 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18236 { 13764 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18237 { 13764 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18238 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18239 { 13764 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18240 { 13764 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18241 { 13764 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18242 { 13764 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18243 { 13764 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18244 { 13764 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18245 { 13764 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18246 { 13764 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18247 { 13764 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18248 { 13772 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18249 { 13772 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18250 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18251 { 13772 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18252 { 13772 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18253 { 13772 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18254 { 13772 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 18255 { 13772 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 18256 { 13772 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 18257 { 13772 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18258 { 13772 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18259 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18260 { 13772 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18261 { 13772 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18262 { 13772 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18263 { 13772 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18264 { 13772 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18265 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18266 { 13772 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18267 { 13772 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18268 { 13772 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18269 { 13772 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18270 { 13772 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18271 { 13772 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18272 { 13772 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18273 { 13772 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18274 { 13772 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18275 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18276 { 13780 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18277 { 13780 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18278 { 13780 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18279 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18280 { 13780 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18281 { 13780 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18282 { 13780 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18283 { 13780 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18284 { 13780 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18285 { 13780 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18286 { 13780 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18287 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18288 { 13780 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18289 { 13780 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18290 { 13780 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18291 { 13780 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18292 { 13780 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18293 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18294 { 13780 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18295 { 13780 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18296 { 13780 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18297 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18298 { 13788 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18299 { 13788 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18300 { 13788 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18301 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18302 { 13788 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18303 { 13788 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18304 { 13788 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18305 { 13788 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18306 { 13788 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18307 { 13788 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18308 { 13788 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18309 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18310 { 13788 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18311 { 13788 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18312 { 13788 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18313 { 13788 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18314 { 13788 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18315 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18316 { 13788 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18317 { 13788 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18318 { 13788 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18319 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18320 { 13796 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18321 { 13796 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18322 { 13796 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18323 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18324 { 13796 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18325 { 13796 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18326 { 13796 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18327 { 13796 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18328 { 13796 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18329 { 13796 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 18330 { 13796 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 18331 { 13796 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 18332 { 13796 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18333 { 13796 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18334 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18335 { 13796 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18336 { 13796 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18337 { 13796 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18338 { 13796 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18339 { 13796 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18340 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18341 { 13796 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18342 { 13796 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18343 { 13796 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18344 { 13796 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18345 { 13796 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18346 { 13796 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18347 { 13796 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18348 { 13796 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18349 { 13796 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18350 { 13804 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18351 { 13804 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18352 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18353 { 13804 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18354 { 13804 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18355 { 13804 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18356 { 13804 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 18357 { 13804 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 18358 { 13804 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 18359 { 13804 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18360 { 13804 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18361 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18362 { 13804 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18363 { 13804 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18364 { 13804 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18365 { 13804 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18366 { 13804 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18367 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18368 { 13804 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18369 { 13804 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18370 { 13804 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18371 { 13804 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18372 { 13804 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18373 { 13804 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18374 { 13804 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18375 { 13804 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18376 { 13804 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18377 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18378 { 13812 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18379 { 13812 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18380 { 13812 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18381 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18382 { 13812 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18383 { 13812 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18384 { 13812 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18385 { 13812 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18386 { 13812 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18387 { 13812 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18388 { 13812 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18389 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18390 { 13812 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18391 { 13812 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18392 { 13812 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18393 { 13812 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18394 { 13812 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18395 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18396 { 13812 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18397 { 13812 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18398 { 13812 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18399 { 13820 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 18400 { 13820 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 18401 { 13820 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 18402 { 13829 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 18403 { 13829 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 18404 { 13829 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 18405 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18406 { 13838 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 18407 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18408 { 13838 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 18409 { 13838 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18410 { 13838 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 18411 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18412 { 13838 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18413 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18414 { 13838 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18415 { 13838 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18416 { 13838 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18417 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18418 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18419 { 13838 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18420 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18421 { 13846 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18422 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18423 { 13846 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18424 { 13846 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18425 { 13846 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18426 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18427 { 13846 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18428 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18429 { 13846 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18430 { 13846 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18431 { 13846 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18432 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18433 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18434 { 13846 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18435 { 13854 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 18436 { 13854 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 18437 { 13854 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 18438 { 13863 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 18439 { 13863 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 18440 { 13863 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 18441 { 13872 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 18442 { 13872 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 18443 { 13872 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 18444 { 13881 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 18445 { 13881 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 18446 { 13881 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 18447 { 13890 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, }, 18448 { 13890 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, }, 18449 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 18450 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 18451 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 18452 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18453 { 13909 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, }, 18454 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18455 { 13909 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 18456 { 13909 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18457 { 13909 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 18458 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18459 { 13909 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18460 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18461 { 13909 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18462 { 13909 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18463 { 13909 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18464 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18465 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18466 { 13909 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18467 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18468 { 13917 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18469 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18470 { 13917 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18471 { 13917 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18472 { 13917 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18473 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18474 { 13917 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18475 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18476 { 13917 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18477 { 13917 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18478 { 13917 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18479 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18480 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18481 { 13917 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18482 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18483 { 13925 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 18484 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18485 { 13925 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 18486 { 13925 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18487 { 13925 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 18488 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18489 { 13925 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18490 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18491 { 13925 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18492 { 13925 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18493 { 13925 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18494 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18495 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18496 { 13925 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18497 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18498 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 18499 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18500 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 18501 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18502 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 18503 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18504 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18505 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18506 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18507 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18508 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18509 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18510 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18511 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18512 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18513 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18514 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18515 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18516 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18517 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18518 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18519 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18520 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18521 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18522 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18523 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18524 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18525 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18526 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18527 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18528 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, }, 18529 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18530 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 18531 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18532 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 18533 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18534 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18535 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18536 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18537 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18538 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18539 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18540 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18541 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18542 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18543 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18544 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18545 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18546 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18547 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18548 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18549 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18550 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18551 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18552 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18553 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18554 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18555 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18556 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18557 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18558 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 18559 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18560 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 18561 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18562 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 18563 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18564 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18565 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18566 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18567 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18568 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18569 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18570 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18571 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18572 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18573 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18574 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18575 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18576 { 13978 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18577 { 13978 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18578 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18579 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18580 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18581 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18582 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18583 { 13978 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18584 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18585 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18586 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18587 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18588 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18589 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18590 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18591 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 18592 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 18593 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 18594 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 18595 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, }, 18596 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 18597 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18598 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18599 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18600 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18601 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18602 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18603 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18604 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18605 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18606 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18607 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18608 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18609 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18610 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18611 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18612 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18613 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 18614 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, }, 18615 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X }, }, 18616 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, }, 18617 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 18618 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 18619 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18620 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18621 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18622 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18623 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18624 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18625 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18626 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18627 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18628 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18629 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18630 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18631 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18632 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18633 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18634 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18635 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 18636 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 18637 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 18638 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 18639 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 18640 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 18641 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18642 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18643 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18644 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18645 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18646 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18647 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18648 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18649 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18650 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18651 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18652 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18653 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18654 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18655 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18656 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18657 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 18658 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 18659 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 18660 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 18661 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 18662 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 18663 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18664 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18665 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18666 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18667 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18668 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18669 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18670 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18671 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18672 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18673 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18674 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18675 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18676 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18677 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18678 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18679 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 18680 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 18681 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 18682 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 18683 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 18684 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 18685 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18686 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18687 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18688 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18689 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18690 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18691 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18692 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18693 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18694 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18695 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18696 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18697 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18698 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18699 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18700 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18701 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 18702 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 18703 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 18704 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 18705 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, }, 18706 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 18707 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18708 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18709 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18710 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18711 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18712 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18713 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18714 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18715 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18716 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18717 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18718 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18719 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18720 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 18721 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18722 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 18723 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18724 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 18725 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18726 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18727 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18728 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18729 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18730 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18731 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18732 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18733 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18734 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18735 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18736 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18737 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18738 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18739 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18740 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18741 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18742 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18743 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18744 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18745 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18746 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18747 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18748 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18749 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18750 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, }, 18751 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18752 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 18753 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18754 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 18755 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18756 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18757 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18758 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18759 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18760 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18761 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18762 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18763 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18764 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18765 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18766 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18767 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18768 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18769 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18770 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18771 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18772 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18773 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18774 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18775 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18776 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18777 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18778 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18779 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18780 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 18781 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18782 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 18783 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 18784 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 18785 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18786 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18787 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18788 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18789 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18790 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18791 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18792 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18793 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18794 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18795 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18796 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18797 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18798 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18799 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18800 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18801 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18802 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18803 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18804 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18805 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18806 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18807 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18808 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18809 { 14107 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 18810 { 14107 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 18811 { 14107 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 18812 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18813 { 14116 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 18814 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 18815 { 14116 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 18816 { 14116 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 18817 { 14116 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 18818 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18819 { 14116 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18820 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18821 { 14116 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18822 { 14116 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18823 { 14116 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18824 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18825 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18826 { 14116 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18827 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18828 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18829 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18830 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18831 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 18832 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 18833 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 18834 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 18835 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, }, 18836 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 18837 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18838 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18839 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18840 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18841 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18842 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18843 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18844 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18845 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18846 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18847 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18848 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18849 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18850 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18851 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18852 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18853 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 18854 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, }, 18855 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X }, }, 18856 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, }, 18857 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 18858 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 18859 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18860 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18861 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18862 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18863 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18864 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18865 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18866 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18867 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18868 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18869 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18870 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18871 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18872 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18873 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18874 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18875 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 18876 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 18877 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 18878 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 18879 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 18880 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 18881 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18882 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18883 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18884 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18885 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18886 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18887 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18888 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18889 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18890 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18891 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18892 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18893 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18894 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18895 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18896 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18897 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 18898 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 18899 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 18900 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 18901 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 18902 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 18903 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18904 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18905 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18906 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18907 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18908 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18909 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18910 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18911 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18912 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18913 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18914 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18915 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18916 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18917 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18918 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18919 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 18920 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, }, 18921 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 18922 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 18923 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 18924 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 18925 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18926 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18927 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18928 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18929 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18930 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18931 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18932 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18933 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18934 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18935 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18936 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18937 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 18938 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 18939 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 18940 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 18941 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 18942 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 18943 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 18944 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 18945 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, }, 18946 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 18947 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18948 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18949 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18950 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18951 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18952 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18953 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18954 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18955 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18956 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18957 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18958 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18959 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18960 { 14184 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18961 { 14184 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18962 { 14184 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18963 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18964 { 14184 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18965 { 14184 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18966 { 14184 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18967 { 14184 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18968 { 14184 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 18969 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 18970 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 18971 { 14184 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 18972 { 14184 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18973 { 14184 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18974 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18975 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18976 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18977 { 14184 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18978 { 14184 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18979 { 14184 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18980 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18981 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18982 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18983 { 14184 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18984 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18985 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18986 { 14184 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 18987 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18988 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18989 { 14184 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 18990 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 18991 { 14192 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 18992 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 18993 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 18994 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 18995 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 18996 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 18997 { 14192 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 18998 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 18999 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19000 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19001 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19002 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19003 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19004 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19005 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19006 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19007 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19008 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19009 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19010 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19011 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19012 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19013 { 14202 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19014 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19015 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19016 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19017 { 14202 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19018 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19019 { 14202 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19020 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19021 { 14202 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19022 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19023 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19024 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19025 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19026 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19027 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19028 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19029 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19030 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19031 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19032 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19033 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19034 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19035 { 14211 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19036 { 14211 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19037 { 14211 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19038 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19039 { 14211 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19040 { 14211 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19041 { 14211 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19042 { 14211 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19043 { 14211 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19044 { 14211 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19045 { 14211 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19046 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19047 { 14211 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19048 { 14211 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19049 { 14211 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19050 { 14211 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19051 { 14211 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19052 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19053 { 14211 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19054 { 14211 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19055 { 14211 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19056 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19057 { 14219 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19058 { 14219 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19059 { 14219 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19060 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19061 { 14219 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19062 { 14219 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19063 { 14219 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19064 { 14219 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19065 { 14219 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19066 { 14219 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19067 { 14219 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19068 { 14219 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19069 { 14219 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19070 { 14219 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19071 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19072 { 14219 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19073 { 14219 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19074 { 14219 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19075 { 14219 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19076 { 14219 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19077 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19078 { 14219 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19079 { 14219 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19080 { 14219 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19081 { 14219 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19082 { 14219 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19083 { 14219 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19084 { 14219 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19085 { 14219 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19086 { 14219 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19087 { 14227 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19088 { 14227 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19089 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19090 { 14227 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19091 { 14227 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19092 { 14227 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19093 { 14227 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19094 { 14227 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19095 { 14227 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19096 { 14227 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19097 { 14227 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19098 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19099 { 14227 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19100 { 14227 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19101 { 14227 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19102 { 14227 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19103 { 14227 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19104 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19105 { 14227 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19106 { 14227 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19107 { 14227 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19108 { 14227 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19109 { 14227 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19110 { 14227 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19111 { 14227 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19112 { 14227 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19113 { 14227 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19114 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19115 { 14235 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19116 { 14235 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19117 { 14235 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19118 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19119 { 14235 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19120 { 14235 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19121 { 14235 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19122 { 14235 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19123 { 14235 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19124 { 14235 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19125 { 14235 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19126 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19127 { 14235 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19128 { 14235 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19129 { 14235 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19130 { 14235 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19131 { 14235 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19132 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19133 { 14235 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19134 { 14235 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19135 { 14235 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19136 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19137 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19138 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19139 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19140 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19141 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19142 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19143 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19144 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19145 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19146 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19147 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19148 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19149 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19150 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19151 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19152 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19153 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19154 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19155 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19156 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19157 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19158 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19159 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19160 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19161 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19162 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19163 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19164 { 14258 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19165 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19166 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19167 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19168 { 14258 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19169 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19170 { 14258 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19171 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19172 { 14258 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19173 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19174 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19175 { 14258 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19176 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19177 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19178 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19179 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19180 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19181 { 14258 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19182 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19183 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19184 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19185 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19186 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19187 { 14258 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19188 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19189 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19190 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19191 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19192 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19193 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19194 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 19195 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 19196 { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 19197 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 19198 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 19199 { 14267 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 19200 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19201 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19202 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19203 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19204 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19205 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19206 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19207 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19208 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19209 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19210 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19211 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19212 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 19213 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 19214 { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 19215 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 19216 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 19217 { 14276 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 19218 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 19219 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 19220 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 19221 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19222 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19223 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19224 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19225 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19226 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19227 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19228 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19229 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19230 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19231 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19232 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19233 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19234 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19235 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19236 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19237 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19238 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19239 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 19240 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 19241 { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 19242 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 19243 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 19244 { 14285 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 19245 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 19246 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 19247 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 19248 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19249 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19250 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19251 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19252 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19253 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19254 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19255 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19256 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19257 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19258 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19259 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19260 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19261 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19262 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19263 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19264 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19265 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19266 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 19267 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 19268 { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 19269 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 19270 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 19271 { 14294 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 19272 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19273 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19274 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19275 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19276 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19277 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19278 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19279 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19280 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19281 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19282 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19283 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19284 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19285 { 14303 /* vpor */, X86::VPORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19286 { 14303 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19287 { 14303 /* vpor */, X86::VPORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19288 { 14308 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19289 { 14308 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19290 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19291 { 14308 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19292 { 14308 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19293 { 14308 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19294 { 14308 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19295 { 14308 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19296 { 14308 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19297 { 14308 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19298 { 14308 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19299 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19300 { 14308 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19301 { 14308 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19302 { 14308 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19303 { 14308 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19304 { 14308 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19305 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19306 { 14308 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19307 { 14308 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19308 { 14308 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19309 { 14308 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19310 { 14308 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19311 { 14308 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19312 { 14308 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19313 { 14308 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19314 { 14308 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19315 { 14314 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19316 { 14314 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19317 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19318 { 14314 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19319 { 14314 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19320 { 14314 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19321 { 14314 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19322 { 14314 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19323 { 14314 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19324 { 14314 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19325 { 14314 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19326 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19327 { 14314 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19328 { 14314 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19329 { 14314 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19330 { 14314 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19331 { 14314 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19332 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19333 { 14314 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19334 { 14314 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19335 { 14314 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19336 { 14314 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19337 { 14314 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19338 { 14314 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19339 { 14314 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19340 { 14314 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19341 { 14314 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19342 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19343 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19344 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19345 { 14327 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 19346 { 14327 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 19347 { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 19348 { 14327 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 19349 { 14327 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 19350 { 14327 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 19351 { 14327 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 19352 { 14327 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 19353 { 14327 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 19354 { 14327 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19355 { 14327 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19356 { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19357 { 14327 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19358 { 14327 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19359 { 14327 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19360 { 14327 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19361 { 14327 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19362 { 14327 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19363 { 14327 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19364 { 14327 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19365 { 14327 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19366 { 14327 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19367 { 14327 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19368 { 14327 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19369 { 14327 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19370 { 14327 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19371 { 14327 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19372 { 14334 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 19373 { 14334 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 19374 { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 19375 { 14334 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 19376 { 14334 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 19377 { 14334 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 19378 { 14334 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 19379 { 14334 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 19380 { 14334 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 19381 { 14334 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19382 { 14334 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19383 { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19384 { 14334 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19385 { 14334 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19386 { 14334 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19387 { 14334 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19388 { 14334 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19389 { 14334 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19390 { 14334 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19391 { 14334 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19392 { 14334 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19393 { 14334 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19394 { 14334 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19395 { 14334 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19396 { 14334 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19397 { 14334 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19398 { 14334 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19399 { 14341 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19400 { 14341 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19401 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19402 { 14341 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19403 { 14341 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19404 { 14341 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19405 { 14341 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19406 { 14341 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19407 { 14341 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19408 { 14341 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19409 { 14341 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19410 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19411 { 14341 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19412 { 14341 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19413 { 14341 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19414 { 14341 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19415 { 14341 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19416 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19417 { 14341 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19418 { 14341 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19419 { 14341 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19420 { 14341 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19421 { 14341 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19422 { 14341 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19423 { 14341 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19424 { 14341 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19425 { 14341 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19426 { 14349 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19427 { 14349 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19428 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19429 { 14349 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19430 { 14349 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19431 { 14349 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19432 { 14349 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19433 { 14349 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19434 { 14349 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19435 { 14349 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19436 { 14349 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19437 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19438 { 14349 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19439 { 14349 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19440 { 14349 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19441 { 14349 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19442 { 14349 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19443 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19444 { 14349 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19445 { 14349 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19446 { 14349 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19447 { 14349 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19448 { 14349 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19449 { 14349 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19450 { 14349 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19451 { 14349 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19452 { 14349 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19453 { 14357 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 19454 { 14357 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 19455 { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 19456 { 14357 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 19457 { 14357 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 19458 { 14357 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 19459 { 14357 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 19460 { 14357 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 19461 { 14357 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 19462 { 14357 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19463 { 14357 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19464 { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19465 { 14357 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19466 { 14357 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19467 { 14357 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19468 { 14357 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19469 { 14357 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19470 { 14357 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19471 { 14357 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19472 { 14357 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19473 { 14357 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19474 { 14357 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19475 { 14357 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19476 { 14357 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19477 { 14357 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19478 { 14357 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19479 { 14357 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19480 { 14364 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 19481 { 14364 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 19482 { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 19483 { 14364 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 19484 { 14364 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 19485 { 14364 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 19486 { 14364 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 19487 { 14364 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 19488 { 14364 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 19489 { 14364 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19490 { 14364 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19491 { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19492 { 14364 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19493 { 14364 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19494 { 14364 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19495 { 14364 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19496 { 14364 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19497 { 14364 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19498 { 14364 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19499 { 14364 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19500 { 14364 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19501 { 14364 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19502 { 14364 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19503 { 14364 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19504 { 14364 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19505 { 14364 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19506 { 14364 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19507 { 14371 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19508 { 14371 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19509 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19510 { 14371 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19511 { 14371 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19512 { 14371 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19513 { 14371 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19514 { 14371 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19515 { 14371 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19516 { 14371 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19517 { 14371 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19518 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19519 { 14371 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19520 { 14371 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19521 { 14371 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19522 { 14371 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19523 { 14371 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19524 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19525 { 14371 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19526 { 14371 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19527 { 14371 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19528 { 14371 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19529 { 14371 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19530 { 14371 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19531 { 14371 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19532 { 14371 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19533 { 14371 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19534 { 14379 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19535 { 14379 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19536 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19537 { 14379 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19538 { 14379 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19539 { 14379 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19540 { 14379 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19541 { 14379 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19542 { 14379 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19543 { 14379 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19544 { 14379 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19545 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19546 { 14379 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19547 { 14379 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19548 { 14379 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19549 { 14379 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19550 { 14379 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19551 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19552 { 14379 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19553 { 14379 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19554 { 14379 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19555 { 14379 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19556 { 14379 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19557 { 14379 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19558 { 14379 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19559 { 14379 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19560 { 14379 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19561 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19562 { 14387 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19563 { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 19564 { 14387 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 19565 { 14387 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19566 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19567 { 14394 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19568 { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 19569 { 14394 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 19570 { 14394 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19571 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19572 { 14401 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19573 { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 19574 { 14401 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 19575 { 14401 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19576 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19577 { 14408 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19578 { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 19579 { 14408 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 19580 { 14408 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19581 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19582 { 14415 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19583 { 14415 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19584 { 14415 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19585 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19586 { 14415 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19587 { 14415 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19588 { 14415 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19589 { 14415 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19590 { 14415 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19591 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19592 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19593 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19594 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19595 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19596 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19597 { 14447 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19598 { 14447 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19599 { 14447 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19600 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19601 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19602 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19603 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19604 { 14471 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19605 { 14471 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19606 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19607 { 14478 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19608 { 14478 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19609 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19610 { 14485 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19611 { 14485 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19612 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19613 { 14492 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19614 { 14492 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19615 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19616 { 14499 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19617 { 14499 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19618 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19619 { 14506 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19620 { 14506 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19621 { 14513 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19622 { 14513 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19623 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19624 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19625 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19626 { 14513 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19627 { 14513 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19628 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19629 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19630 { 14513 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19631 { 14513 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19632 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19633 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19634 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19635 { 14513 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19636 { 14513 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19637 { 14513 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19638 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19639 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19640 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19641 { 14513 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19642 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19643 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19644 { 14513 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19645 { 14513 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19646 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19647 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19648 { 14521 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19649 { 14521 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19650 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19651 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19652 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19653 { 14521 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19654 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19655 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19656 { 14521 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19657 { 14521 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19658 { 14521 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19659 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19660 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19661 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19662 { 14521 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19663 { 14521 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19664 { 14521 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19665 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19666 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19667 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19668 { 14521 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19669 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19670 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19671 { 14521 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19672 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19673 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19674 { 14521 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19675 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19676 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19677 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19678 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19679 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19680 { 14529 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19681 { 14529 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19682 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19683 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19684 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19685 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19686 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19687 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19688 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19689 { 14529 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19690 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19691 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19692 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19693 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19694 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19695 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19696 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19697 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19698 { 14529 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19699 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19700 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19701 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19702 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19703 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19704 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19705 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19706 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19707 { 14538 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19708 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19709 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19710 { 14538 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19711 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19712 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19713 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19714 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19715 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19716 { 14538 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19717 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19718 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19719 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19720 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19721 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19722 { 14538 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19723 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19724 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19725 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19726 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19727 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19728 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19729 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19730 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19731 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19732 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19733 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19734 { 14547 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19735 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19736 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19737 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19738 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19739 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19740 { 14547 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19741 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19742 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19743 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19744 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19745 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19746 { 14547 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19747 { 14556 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19748 { 14556 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19749 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19750 { 14556 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19751 { 14556 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19752 { 14556 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19753 { 14556 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19754 { 14556 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19755 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19756 { 14556 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19757 { 14556 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19758 { 14556 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19759 { 14556 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19760 { 14556 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19761 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19762 { 14556 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19763 { 14556 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19764 { 14556 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19765 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19766 { 14564 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19767 { 14564 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19768 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19769 { 14571 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 19770 { 14571 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19771 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19772 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19773 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19774 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19775 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19776 { 14578 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19777 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19778 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19779 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19780 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19781 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19782 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19783 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19784 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19785 { 14578 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19786 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19787 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19788 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19789 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19790 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19791 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19792 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19793 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19794 { 14578 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19795 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19796 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19797 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19798 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19799 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19800 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19801 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19802 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19803 { 14586 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19804 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19805 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19806 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19807 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19808 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19809 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19810 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19811 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19812 { 14586 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19813 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19814 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19815 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19816 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19817 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19818 { 14586 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19819 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19820 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19821 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19822 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19823 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19824 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19825 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19826 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19827 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19828 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19829 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19830 { 14594 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19831 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 19832 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 19833 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 19834 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19835 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19836 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19837 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19838 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19839 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19840 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19841 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19842 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19843 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19844 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19845 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19846 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19847 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19848 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19849 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19850 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19851 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19852 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19853 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19854 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19855 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19856 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19857 { 14603 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19858 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 19859 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 19860 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 19861 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19862 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19863 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19864 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19865 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19866 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19867 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19868 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19869 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19870 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19871 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19872 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19873 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19874 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19875 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19876 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19877 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19878 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19879 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19880 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19881 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19882 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19883 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19884 { 14612 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19885 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19886 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19887 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19888 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19889 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19890 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19891 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19892 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19893 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19894 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19895 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19896 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19897 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19898 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19899 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19900 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19901 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19902 { 14621 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19903 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19904 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19905 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19906 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19907 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19908 { 14621 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19909 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19910 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19911 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19912 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19913 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19914 { 14621 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19915 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 19916 { 14629 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 19917 { 14629 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 19918 { 14629 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 19919 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 19920 { 14629 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 19921 { 14629 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 19922 { 14629 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 19923 { 14629 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 19924 { 14629 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 19925 { 14629 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19926 { 14629 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19927 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19928 { 14629 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19929 { 14629 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19930 { 14629 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19931 { 14629 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19932 { 14629 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19933 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19934 { 14629 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19935 { 14629 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19936 { 14629 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19937 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 19938 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 19939 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 19940 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 19941 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 19942 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 19943 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19944 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19945 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19946 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19947 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19948 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19949 { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 19950 { 14650 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 19951 { 14650 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 19952 { 14650 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 19953 { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 19954 { 14650 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 19955 { 14650 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 19956 { 14650 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 19957 { 14650 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 19958 { 14650 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 19959 { 14650 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 19960 { 14650 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 19961 { 14650 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 19962 { 14650 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19963 { 14650 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19964 { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19965 { 14650 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19966 { 14650 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19967 { 14650 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19968 { 14650 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19969 { 14650 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19970 { 14650 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19971 { 14650 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19972 { 14650 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19973 { 14650 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19974 { 14650 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19975 { 14650 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19976 { 14650 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19977 { 14650 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19978 { 14650 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19979 { 14650 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19980 { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 19981 { 14658 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 19982 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 19983 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 19984 { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 19985 { 14658 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 19986 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 19987 { 14658 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 19988 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 19989 { 14658 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 19990 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19991 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19992 { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19993 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19994 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19995 { 14658 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 19996 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19997 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19998 { 14658 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 19999 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20000 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20001 { 14658 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20002 { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20003 { 14667 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20004 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20005 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20006 { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20007 { 14667 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 20008 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20009 { 14667 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 20010 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20011 { 14667 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20012 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20013 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20014 { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20015 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20016 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20017 { 14667 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20018 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20019 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20020 { 14667 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20021 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20022 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20023 { 14667 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20024 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20025 { 14676 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20026 { 14676 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20027 { 14676 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20028 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20029 { 14684 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20030 { 14684 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20031 { 14684 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20032 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20033 { 14692 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20034 { 14692 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20035 { 14692 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20036 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20037 { 14700 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20038 { 14700 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20039 { 14700 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20040 { 14700 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20041 { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20042 { 14700 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20043 { 14700 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20044 { 14700 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20045 { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20046 { 14700 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20047 { 14700 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20048 { 14700 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20049 { 14700 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20050 { 14700 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20051 { 14700 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20052 { 14700 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20053 { 14700 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20054 { 14700 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 20055 { 14700 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 20056 { 14700 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 20057 { 14700 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20058 { 14700 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20059 { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20060 { 14700 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20061 { 14700 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20062 { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20063 { 14700 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20064 { 14700 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20065 { 14700 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20066 { 14700 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20067 { 14700 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20068 { 14700 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20069 { 14700 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20070 { 14700 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20071 { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20072 { 14700 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20073 { 14700 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20074 { 14700 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20075 { 14700 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20076 { 14700 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20077 { 14700 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20078 { 14700 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20079 { 14700 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20080 { 14700 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20081 { 14700 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20082 { 14700 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20083 { 14700 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20084 { 14700 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20085 { 14700 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20086 { 14700 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20087 { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20088 { 14707 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20089 { 14707 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20090 { 14707 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20091 { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20092 { 14707 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20093 { 14707 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20094 { 14707 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20095 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20096 { 14715 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20097 { 14715 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20098 { 14715 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20099 { 14715 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20100 { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20101 { 14715 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20102 { 14715 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20103 { 14715 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20104 { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20105 { 14715 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20106 { 14715 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20107 { 14715 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20108 { 14715 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20109 { 14715 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20110 { 14715 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20111 { 14715 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20112 { 14715 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20113 { 14715 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 20114 { 14715 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 20115 { 14715 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 20116 { 14715 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20117 { 14715 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20118 { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20119 { 14715 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20120 { 14715 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20121 { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20122 { 14715 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20123 { 14715 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20124 { 14715 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20125 { 14715 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20126 { 14715 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20127 { 14715 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20128 { 14715 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20129 { 14715 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20130 { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20131 { 14715 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20132 { 14715 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20133 { 14715 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20134 { 14715 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20135 { 14715 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20136 { 14715 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20137 { 14715 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20138 { 14715 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20139 { 14715 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20140 { 14715 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20141 { 14715 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20142 { 14715 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20143 { 14715 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20144 { 14715 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20145 { 14715 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20146 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20147 { 14722 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20148 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20149 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20150 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20151 { 14722 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20152 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20153 { 14722 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20154 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20155 { 14722 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20156 { 14722 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 20157 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 20158 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 20159 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20160 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20161 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20162 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20163 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20164 { 14722 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20165 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20166 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20167 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20168 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20169 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20170 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20171 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20172 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20173 { 14722 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20174 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20175 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20176 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20177 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20178 { 14730 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20179 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20180 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20181 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20182 { 14730 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20183 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20184 { 14730 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20185 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20186 { 14730 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20187 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 20188 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 20189 { 14730 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 20190 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20191 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20192 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20193 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20194 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20195 { 14730 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20196 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20197 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20198 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20199 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20200 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20201 { 14730 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20202 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20203 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20204 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20205 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20206 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20207 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20208 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20209 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20210 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20211 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20212 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20213 { 14738 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20214 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20215 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20216 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20217 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20218 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20219 { 14738 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20220 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20221 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20222 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20223 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20224 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20225 { 14738 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20226 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20227 { 14746 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20228 { 14746 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20229 { 14746 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20230 { 14746 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20231 { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20232 { 14746 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20233 { 14746 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20234 { 14746 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20235 { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20236 { 14746 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20237 { 14746 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20238 { 14746 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20239 { 14746 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20240 { 14746 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20241 { 14746 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20242 { 14746 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20243 { 14746 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20244 { 14746 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20245 { 14746 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20246 { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20247 { 14746 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20248 { 14746 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20249 { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20250 { 14746 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20251 { 14746 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20252 { 14746 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20253 { 14746 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20254 { 14746 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20255 { 14746 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20256 { 14746 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20257 { 14746 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20258 { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20259 { 14746 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20260 { 14746 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20261 { 14746 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20262 { 14746 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20263 { 14746 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20264 { 14746 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20265 { 14746 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20266 { 14746 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20267 { 14746 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20268 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20269 { 14753 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20270 { 14753 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20271 { 14753 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20272 { 14753 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20273 { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20274 { 14753 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20275 { 14753 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20276 { 14753 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20277 { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20278 { 14753 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20279 { 14753 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20280 { 14753 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20281 { 14753 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20282 { 14753 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20283 { 14753 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20284 { 14753 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20285 { 14753 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20286 { 14753 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 20287 { 14753 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 20288 { 14753 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 20289 { 14753 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20290 { 14753 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20291 { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20292 { 14753 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20293 { 14753 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20294 { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20295 { 14753 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20296 { 14753 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20297 { 14753 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20298 { 14753 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20299 { 14753 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20300 { 14753 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20301 { 14753 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20302 { 14753 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20303 { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20304 { 14753 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20305 { 14753 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20306 { 14753 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20307 { 14753 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20308 { 14753 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20309 { 14753 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20310 { 14753 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20311 { 14753 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20312 { 14753 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20313 { 14753 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20314 { 14753 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20315 { 14753 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20316 { 14753 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20317 { 14753 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20318 { 14753 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20319 { 14760 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20320 { 14760 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20321 { 14760 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20322 { 14760 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20323 { 14760 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20324 { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20325 { 14760 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20326 { 14760 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20327 { 14760 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20328 { 14760 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20329 { 14760 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20330 { 14760 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20331 { 14760 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 20332 { 14760 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 20333 { 14760 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 20334 { 14760 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20335 { 14760 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20336 { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20337 { 14760 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20338 { 14760 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20339 { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20340 { 14760 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20341 { 14760 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20342 { 14760 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20343 { 14760 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20344 { 14760 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20345 { 14760 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20346 { 14760 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20347 { 14760 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20348 { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20349 { 14760 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20350 { 14760 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20351 { 14760 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20352 { 14760 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20353 { 14760 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20354 { 14760 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20355 { 14760 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20356 { 14760 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20357 { 14760 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20358 { 14760 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20359 { 14760 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20360 { 14760 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20361 { 14760 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20362 { 14760 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20363 { 14760 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20364 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20365 { 14767 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20366 { 14767 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20367 { 14767 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20368 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20369 { 14767 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20370 { 14767 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20371 { 14767 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20372 { 14767 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20373 { 14767 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20374 { 14767 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 20375 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 20376 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 20377 { 14767 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20378 { 14767 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20379 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20380 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20381 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20382 { 14767 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20383 { 14767 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20384 { 14767 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20385 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20386 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20387 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20388 { 14767 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20389 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20390 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20391 { 14767 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20392 { 14767 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20393 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20394 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20395 { 14775 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20396 { 14775 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20397 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20398 { 14775 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20399 { 14775 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20400 { 14775 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20401 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 20402 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 20403 { 14775 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 20404 { 14775 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20405 { 14775 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20406 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20407 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20408 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20409 { 14775 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20410 { 14775 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20411 { 14775 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20412 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20413 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20414 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20415 { 14775 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20416 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20417 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20418 { 14775 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20419 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20420 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20421 { 14775 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20422 { 14783 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20423 { 14783 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20424 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20425 { 14783 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20426 { 14783 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20427 { 14783 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20428 { 14783 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20429 { 14783 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20430 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20431 { 14783 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20432 { 14783 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20433 { 14783 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20434 { 14783 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20435 { 14783 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20436 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20437 { 14783 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20438 { 14783 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20439 { 14783 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20440 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20441 { 14791 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20442 { 14791 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20443 { 14791 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20444 { 14791 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20445 { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20446 { 14791 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20447 { 14791 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20448 { 14791 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20449 { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20450 { 14791 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20451 { 14791 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20452 { 14791 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20453 { 14791 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20454 { 14791 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20455 { 14791 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20456 { 14791 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20457 { 14791 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20458 { 14791 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20459 { 14791 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20460 { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20461 { 14791 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20462 { 14791 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20463 { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20464 { 14791 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20465 { 14791 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20466 { 14791 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20467 { 14791 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20468 { 14791 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20469 { 14791 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20470 { 14791 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20471 { 14791 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20472 { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20473 { 14791 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20474 { 14791 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20475 { 14791 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20476 { 14791 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20477 { 14791 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20478 { 14791 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20479 { 14791 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20480 { 14791 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20481 { 14791 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20482 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20483 { 14798 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20484 { 14798 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20485 { 14798 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20486 { 14798 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20487 { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20488 { 14798 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20489 { 14798 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20490 { 14798 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20491 { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20492 { 14798 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20493 { 14798 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20494 { 14798 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20495 { 14798 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20496 { 14798 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20497 { 14798 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20498 { 14798 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20499 { 14798 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20500 { 14798 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 20501 { 14798 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 20502 { 14798 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 20503 { 14798 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20504 { 14798 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20505 { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20506 { 14798 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20507 { 14798 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20508 { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20509 { 14798 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20510 { 14798 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20511 { 14798 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20512 { 14798 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20513 { 14798 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20514 { 14798 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20515 { 14798 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20516 { 14798 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20517 { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20518 { 14798 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20519 { 14798 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20520 { 14798 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20521 { 14798 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20522 { 14798 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20523 { 14798 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20524 { 14798 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20525 { 14798 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20526 { 14798 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20527 { 14798 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20528 { 14798 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20529 { 14798 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20530 { 14798 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20531 { 14798 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20532 { 14798 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20533 { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20534 { 14805 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20535 { 14805 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20536 { 14805 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20537 { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20538 { 14805 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20539 { 14805 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20540 { 14805 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20541 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20542 { 14813 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20543 { 14813 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20544 { 14813 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20545 { 14813 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20546 { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20547 { 14813 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20548 { 14813 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20549 { 14813 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20550 { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20551 { 14813 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20552 { 14813 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20553 { 14813 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20554 { 14813 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20555 { 14813 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20556 { 14813 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20557 { 14813 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20558 { 14813 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20559 { 14813 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 20560 { 14813 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 20561 { 14813 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 20562 { 14813 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20563 { 14813 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20564 { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20565 { 14813 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20566 { 14813 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20567 { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20568 { 14813 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20569 { 14813 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20570 { 14813 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20571 { 14813 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20572 { 14813 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20573 { 14813 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20574 { 14813 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20575 { 14813 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20576 { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20577 { 14813 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20578 { 14813 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20579 { 14813 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20580 { 14813 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20581 { 14813 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20582 { 14813 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20583 { 14813 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20584 { 14813 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20585 { 14813 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20586 { 14813 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20587 { 14813 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20588 { 14813 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20589 { 14813 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20590 { 14813 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20591 { 14813 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20592 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20593 { 14820 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20594 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20595 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20596 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20597 { 14820 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20598 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20599 { 14820 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20600 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20601 { 14820 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20602 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 20603 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 20604 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 20605 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20606 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20607 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20608 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20609 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20610 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20611 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20612 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20613 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20614 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20615 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20616 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20617 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20618 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20619 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20620 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20621 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20622 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20623 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20624 { 14828 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20625 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20626 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20627 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20628 { 14828 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20629 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20630 { 14828 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20631 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20632 { 14828 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20633 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 20634 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 20635 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 20636 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20637 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20638 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20639 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20640 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20641 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20642 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20643 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20644 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20645 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20646 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20647 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20648 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20649 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20650 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20651 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20652 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20653 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20654 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20655 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20656 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20657 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20658 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20659 { 14836 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20660 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20661 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20662 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20663 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20664 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20665 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20666 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20667 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20668 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20669 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20670 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20671 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20672 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20673 { 14844 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, }, 20674 { 14844 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20675 { 14844 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, }, 20676 { 14844 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, }, 20677 { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 20678 { 14844 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 20679 { 14844 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 20680 { 14844 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 20681 { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 20682 { 14844 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 20683 { 14844 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 20684 { 14844 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 20685 { 14844 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20686 { 14844 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, }, 20687 { 14844 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20688 { 14844 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, }, 20689 { 14844 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, }, 20690 { 14844 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20691 { 14844 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20692 { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20693 { 14844 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20694 { 14844 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20695 { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20696 { 14844 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20697 { 14844 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20698 { 14844 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20699 { 14844 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20700 { 14844 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20701 { 14844 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20702 { 14844 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20703 { 14844 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20704 { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20705 { 14844 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20706 { 14844 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20707 { 14844 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20708 { 14844 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20709 { 14844 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20710 { 14844 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20711 { 14844 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20712 { 14844 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20713 { 14844 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20714 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20715 { 14851 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20716 { 14851 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20717 { 14851 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20718 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20719 { 14851 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20720 { 14851 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20721 { 14851 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20722 { 14851 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20723 { 14851 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20724 { 14851 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20725 { 14851 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20726 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20727 { 14851 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20728 { 14851 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20729 { 14851 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20730 { 14851 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20731 { 14851 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20732 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20733 { 14851 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20734 { 14851 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20735 { 14851 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20736 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20737 { 14858 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20738 { 14858 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20739 { 14858 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20740 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20741 { 14858 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20742 { 14858 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20743 { 14858 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20744 { 14858 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20745 { 14858 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20746 { 14858 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 20747 { 14858 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 20748 { 14858 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 20749 { 14858 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20750 { 14858 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20751 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20752 { 14858 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20753 { 14858 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20754 { 14858 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20755 { 14858 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20756 { 14858 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20757 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20758 { 14858 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20759 { 14858 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20760 { 14858 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20761 { 14858 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20762 { 14858 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20763 { 14858 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20764 { 14858 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20765 { 14858 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20766 { 14858 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20767 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20768 { 14865 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20769 { 14865 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20770 { 14865 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20771 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20772 { 14865 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20773 { 14865 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20774 { 14865 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20775 { 14865 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20776 { 14865 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20777 { 14865 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 20778 { 14865 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 20779 { 14865 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 20780 { 14865 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20781 { 14865 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20782 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20783 { 14865 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20784 { 14865 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20785 { 14865 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20786 { 14865 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20787 { 14865 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20788 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20789 { 14865 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20790 { 14865 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20791 { 14865 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20792 { 14865 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20793 { 14865 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20794 { 14865 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20795 { 14865 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20796 { 14865 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20797 { 14865 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20798 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20799 { 14872 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20800 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20801 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20802 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20803 { 14872 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20804 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20805 { 14872 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20806 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20807 { 14872 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20808 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20809 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20810 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20811 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20812 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20813 { 14872 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20814 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20815 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20816 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20817 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20818 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20819 { 14872 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20820 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20821 { 14880 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20822 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20823 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20824 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20825 { 14880 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20826 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20827 { 14880 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20828 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20829 { 14880 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20830 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20831 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20832 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20833 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20834 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20835 { 14880 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20836 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20837 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20838 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20839 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20840 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20841 { 14880 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20842 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20843 { 14888 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20844 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20845 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20846 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20847 { 14888 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20848 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20849 { 14888 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20850 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20851 { 14888 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20852 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20853 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20854 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20855 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20856 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20857 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20858 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20859 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20860 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20861 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20862 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20863 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20864 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20865 { 14897 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20866 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20867 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20868 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20869 { 14897 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20870 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20871 { 14897 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20872 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20873 { 14897 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20874 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20875 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20876 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20877 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20878 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20879 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20880 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20881 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20882 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20883 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20884 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20885 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20886 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 20887 { 14906 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 20888 { 14906 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20889 { 14906 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20890 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20891 { 14906 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 20892 { 14906 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20893 { 14906 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 20894 { 14906 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20895 { 14906 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20896 { 14906 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20897 { 14906 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20898 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20899 { 14906 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20900 { 14906 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20901 { 14906 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20902 { 14906 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20903 { 14906 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20904 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20905 { 14906 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20906 { 14906 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20907 { 14906 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20908 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20909 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20910 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20911 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20912 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20913 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20914 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 20915 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 20916 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 20917 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20918 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20919 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20920 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20921 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20922 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20923 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20924 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20925 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20926 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20927 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20928 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20929 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20930 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20931 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20932 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20933 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20934 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20935 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20936 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20937 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20938 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 20939 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 20940 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 20941 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 20942 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 20943 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 20944 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20945 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20946 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20947 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20948 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20949 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20950 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20951 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20952 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20953 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20954 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20955 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20956 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20957 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20958 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20959 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20960 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20961 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 20962 { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 20963 { 14935 /* vptest */, X86::VPTESTYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 20964 { 14935 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 20965 { 14935 /* vptest */, X86::VPTESTYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 20966 { 14942 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 20967 { 14942 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 20968 { 14942 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 20969 { 14942 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 20970 { 14942 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 20971 { 14942 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 20972 { 14942 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20973 { 14942 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20974 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20975 { 14942 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20976 { 14942 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20977 { 14942 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20978 { 14951 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 20979 { 14951 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 20980 { 14951 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 20981 { 14951 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 20982 { 14951 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 20983 { 14951 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 20984 { 14951 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 20985 { 14951 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 20986 { 14951 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 20987 { 14951 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20988 { 14951 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20989 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20990 { 14951 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20991 { 14951 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20992 { 14951 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20993 { 14951 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20994 { 14951 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20995 { 14951 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 20996 { 14960 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 20997 { 14960 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 20998 { 14960 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 20999 { 14960 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 21000 { 14960 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 21001 { 14960 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 21002 { 14960 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 21003 { 14960 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 21004 { 14960 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 21005 { 14960 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21006 { 14960 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21007 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21008 { 14960 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21009 { 14960 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21010 { 14960 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21011 { 14960 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21012 { 14960 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21013 { 14960 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21014 { 14969 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 21015 { 14969 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 21016 { 14969 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 21017 { 14969 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 21018 { 14969 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 21019 { 14969 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 21020 { 14969 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21021 { 14969 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21022 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21023 { 14969 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21024 { 14969 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21025 { 14969 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21026 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 21027 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 21028 { 14978 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 21029 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 21030 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 21031 { 14978 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 21032 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21033 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21034 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21035 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21036 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21037 { 14978 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21038 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 21039 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 21040 { 14988 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 21041 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 21042 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 21043 { 14988 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 21044 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, }, 21045 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, }, 21046 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, }, 21047 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21048 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21049 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21050 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21051 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21052 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21053 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21054 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21055 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21056 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 21057 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 21058 { 14998 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 21059 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 21060 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 21061 { 14998 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 21062 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, }, 21063 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, }, 21064 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, }, 21065 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21066 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21067 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21068 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21069 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21070 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21071 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21072 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21073 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21074 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, }, 21075 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, }, 21076 { 15008 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, }, 21077 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, }, 21078 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, }, 21079 { 15008 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, }, 21080 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21081 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21082 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21083 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21084 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21085 { 15008 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21086 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21087 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21088 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21089 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21090 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21091 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21092 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21093 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21094 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21095 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21096 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21097 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21098 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21099 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21100 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21101 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21102 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21103 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21104 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21105 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21106 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21107 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21108 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21109 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21110 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21111 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21112 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21113 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21114 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21115 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21116 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21117 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21118 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21119 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 21120 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21121 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21122 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21123 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21124 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21125 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21126 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21127 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21128 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21129 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21130 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21131 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21132 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21133 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21134 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21135 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21136 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21137 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21138 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21139 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21140 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21141 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21142 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21143 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21144 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21145 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21146 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21147 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21148 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21149 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 21150 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21151 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21152 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21153 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21154 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21155 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21156 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21157 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21158 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21159 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21160 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21161 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21162 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21163 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21164 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21165 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21166 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21167 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21168 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21169 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21170 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21171 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21172 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21173 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21174 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21175 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21176 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21177 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21178 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21179 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21180 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21181 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21182 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21183 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21184 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21185 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21186 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21187 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21188 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21189 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21190 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21191 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21192 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21193 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21194 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21195 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21196 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21197 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21198 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21199 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21200 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21201 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21202 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21203 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21204 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21205 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21206 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21207 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21208 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21209 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21210 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21211 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21212 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21213 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21214 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21215 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21216 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21217 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21218 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21219 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21220 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21221 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21222 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21223 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21224 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21225 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 21226 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21227 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21228 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21229 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21230 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21231 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21232 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21233 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21234 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21235 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21236 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21237 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21238 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21239 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21240 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21241 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21242 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21243 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21244 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21245 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21246 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21247 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21248 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21249 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21250 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21251 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21252 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21253 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21254 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21255 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 21256 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21257 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21258 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21259 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21260 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21261 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21262 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21263 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21264 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21265 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21266 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21267 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21268 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21269 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21270 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21271 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21272 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21273 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21274 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21275 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21276 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21277 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21278 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21279 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21280 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21281 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21282 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21283 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21284 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21285 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21286 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21287 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21288 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21289 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21290 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21291 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21292 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21293 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21294 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21295 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21296 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21297 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21298 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21299 { 15108 /* vpxor */, X86::VPXORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 21300 { 15108 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 21301 { 15108 /* vpxor */, X86::VPXORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 21302 { 15114 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21303 { 15114 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21304 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21305 { 15114 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21306 { 15114 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21307 { 15114 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21308 { 15114 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21309 { 15114 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 21310 { 15114 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21311 { 15114 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21312 { 15114 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21313 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21314 { 15114 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21315 { 15114 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21316 { 15114 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21317 { 15114 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21318 { 15114 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21319 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21320 { 15114 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21321 { 15114 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21322 { 15114 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21323 { 15114 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21324 { 15114 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21325 { 15114 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21326 { 15114 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21327 { 15114 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21328 { 15114 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21329 { 15121 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21330 { 15121 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21331 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21332 { 15121 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21333 { 15121 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21334 { 15121 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21335 { 15121 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 21336 { 15121 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21337 { 15121 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21338 { 15121 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21339 { 15121 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21340 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21341 { 15121 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21342 { 15121 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21343 { 15121 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21344 { 15121 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21345 { 15121 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21346 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21347 { 15121 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21348 { 15121 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21349 { 15121 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21350 { 15121 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21351 { 15121 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21352 { 15121 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21353 { 15121 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21354 { 15121 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21355 { 15121 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21356 { 15128 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21357 { 15128 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21358 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21359 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21360 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21361 { 15128 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21362 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21363 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 21364 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21365 { 15128 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21366 { 15128 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21367 { 15128 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21368 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21369 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21370 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21371 { 15128 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21372 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21373 { 15128 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21374 { 15128 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21375 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21376 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21377 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21378 { 15128 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21379 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21380 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21381 { 15128 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21382 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21383 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21384 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21385 { 15128 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21386 { 15137 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21387 { 15137 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21388 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21389 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21390 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21391 { 15137 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21392 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21393 { 15137 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21394 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 21395 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21396 { 15137 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21397 { 15137 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21398 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21399 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21400 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21401 { 15137 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21402 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21403 { 15137 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21404 { 15137 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21405 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21406 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21407 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21408 { 15137 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21409 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21410 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21411 { 15137 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21412 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21413 { 15137 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21414 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21415 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21416 { 15146 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21417 { 15146 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21418 { 15146 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21419 { 15146 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21420 { 15146 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21421 { 15146 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21422 { 15146 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21423 { 15146 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21424 { 15146 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21425 { 15155 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21426 { 15155 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21427 { 15155 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21428 { 15155 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21429 { 15155 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21430 { 15155 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21431 { 15155 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21432 { 15155 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21433 { 15155 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21434 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 21435 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 21436 { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21437 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 21438 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 21439 { 15164 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21440 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 21441 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 21442 { 15164 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 21443 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21444 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21445 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21446 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21447 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21448 { 15164 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21449 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21450 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21451 { 15164 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21452 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21453 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21454 { 15164 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21455 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21456 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21457 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21458 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21459 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21460 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21461 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 21462 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 21463 { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21464 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 21465 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 21466 { 15173 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21467 { 15173 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 21468 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 21469 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 21470 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21471 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21472 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21473 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21474 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21475 { 15173 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21476 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21477 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21478 { 15173 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21479 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21480 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21481 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21482 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21483 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21484 { 15173 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21485 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21486 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21487 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21488 { 15182 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21489 { 15182 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21490 { 15182 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21491 { 15182 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21492 { 15182 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21493 { 15182 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21494 { 15191 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21495 { 15191 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21496 { 15191 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21497 { 15191 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21498 { 15191 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21499 { 15191 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21500 { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21501 { 15200 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21502 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21503 { 15200 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 21504 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21505 { 15200 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21506 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21507 { 15200 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21508 { 15200 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21509 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21510 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21511 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21512 { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21513 { 15209 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21514 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21515 { 15209 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 21516 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21517 { 15209 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21518 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21519 { 15209 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21520 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21521 { 15209 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21522 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21523 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21524 { 15218 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21525 { 15218 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21526 { 15218 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21527 { 15218 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21528 { 15218 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21529 { 15218 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21530 { 15218 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21531 { 15218 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21532 { 15218 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21533 { 15227 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21534 { 15227 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21535 { 15227 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21536 { 15227 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21537 { 15227 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21538 { 15227 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21539 { 15227 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21540 { 15227 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21541 { 15227 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21542 { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 21543 { 15236 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 21544 { 15236 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 21545 { 15236 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 21546 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21547 { 15243 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 21548 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 21549 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 21550 { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 21551 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 21552 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 21553 { 15250 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 21554 { 15250 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21555 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 21556 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 21557 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 21558 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21559 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21560 { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21561 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21562 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21563 { 15250 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21564 { 15250 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21565 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21566 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21567 { 15250 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21568 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21569 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21570 { 15250 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21571 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21572 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21573 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21574 { 15250 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21575 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21576 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21577 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21578 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 21579 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 21580 { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 21581 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 21582 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 21583 { 15260 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 21584 { 15260 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21585 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 21586 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 21587 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 21588 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21589 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21590 { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21591 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21592 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21593 { 15260 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21594 { 15260 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21595 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21596 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21597 { 15260 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21598 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21599 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21600 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21601 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21602 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21603 { 15260 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21604 { 15260 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21605 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21606 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21607 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21608 { 15270 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21609 { 15270 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21610 { 15270 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21611 { 15270 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21612 { 15270 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21613 { 15270 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21614 { 15270 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21615 { 15270 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21616 { 15270 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21617 { 15280 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21618 { 15280 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21619 { 15280 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21620 { 15280 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21621 { 15280 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21622 { 15280 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21623 { 15280 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21624 { 15280 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21625 { 15280 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21626 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 21627 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 21628 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 21629 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 21630 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 21631 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 21632 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21633 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 21634 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 21635 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 21636 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21637 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21638 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21639 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21640 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21641 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21642 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21643 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21644 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21645 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21646 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21647 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21648 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21649 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21650 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21651 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21652 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21653 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21654 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21655 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21656 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, }, 21657 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, }, 21658 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, }, 21659 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, }, 21660 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, }, 21661 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, }, 21662 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21663 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 21664 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 21665 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 21666 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21667 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21668 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21669 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21670 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21671 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21672 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21673 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21674 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21675 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21676 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21677 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21678 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21679 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21680 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21681 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21682 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21683 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21684 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21685 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21686 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21687 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21688 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21689 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21690 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21691 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21692 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21693 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21694 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21695 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21696 { 15326 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21697 { 15326 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21698 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21699 { 15326 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21700 { 15326 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21701 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21702 { 15326 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21703 { 15326 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21704 { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 21705 { 15338 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 21706 { 15338 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 21707 { 15338 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 21708 { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, }, 21709 { 15347 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, }, 21710 { 15347 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, }, 21711 { 15347 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, }, 21712 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21713 { 15356 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 21714 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21715 { 15365 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 21716 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 21717 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 21718 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21719 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 21720 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 21721 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21722 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 21723 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 21724 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 21725 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21726 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21727 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21728 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21729 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21730 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21731 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21732 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21733 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21734 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21735 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21736 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21737 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21738 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21739 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21740 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21741 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21742 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21743 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 21744 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 21745 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21746 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 21747 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 21748 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21749 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 21750 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 21751 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 21752 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21753 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21754 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21755 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21756 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21757 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21758 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21759 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21760 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21761 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21762 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21763 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21764 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21765 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21766 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21767 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21768 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21769 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21770 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21771 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21772 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21773 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21774 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21775 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21776 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21777 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21778 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21779 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21780 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21781 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21782 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21783 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21784 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21785 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 21786 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21787 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21788 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21789 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21790 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21791 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21792 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21793 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21794 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 21795 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 21796 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, }, 21797 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 21798 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21799 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21800 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21801 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21802 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21803 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21804 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21805 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21806 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21807 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21808 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21809 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21810 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21811 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21812 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21813 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21814 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21815 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21816 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21817 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21818 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21819 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21820 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21821 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21822 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21823 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21824 { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 21825 { 15462 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 21826 { 15462 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 21827 { 15462 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 21828 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 21829 { 15471 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 21830 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21831 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21832 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21833 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21834 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21835 { 15480 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21836 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21837 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 21838 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21839 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21840 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21841 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21842 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21843 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21844 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21845 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21846 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21847 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21848 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21849 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21850 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21851 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21852 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21853 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21854 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21855 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21856 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21857 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21858 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21859 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21860 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21861 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21862 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21863 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 21864 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21865 { 15490 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21866 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21867 { 15490 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21868 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 21869 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21870 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21871 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21872 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21873 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21874 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21875 { 15490 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21876 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21877 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21878 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21879 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21880 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21881 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21882 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21883 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21884 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21885 { 15490 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21886 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21887 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21888 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21889 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21890 { 15500 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21891 { 15500 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 21892 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21893 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21894 { 15500 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21895 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21896 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21897 { 15500 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21898 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21899 { 15510 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21900 { 15510 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 21901 { 15510 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 21902 { 15510 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21903 { 15510 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21904 { 15510 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21905 { 15510 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21906 { 15510 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21907 { 15510 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21908 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21909 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21910 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21911 { 15532 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21912 { 15532 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21913 { 15532 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21914 { 15544 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21915 { 15559 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21916 { 15574 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21917 { 15589 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21918 { 15604 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21919 { 15619 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21920 { 15634 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21921 { 15649 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21922 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21923 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21924 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21925 { 15676 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21926 { 15676 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21927 { 15676 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21928 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21929 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21930 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21931 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21932 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21933 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21934 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21935 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21936 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21937 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21938 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21939 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21940 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21941 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21942 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21943 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21944 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21945 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21946 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21947 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21948 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21949 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21950 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21951 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21952 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21953 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21954 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21955 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21956 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21957 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21958 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21959 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21960 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21961 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21962 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21963 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21964 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21965 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21966 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21967 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21968 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 21969 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 21970 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21971 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21972 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21973 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21974 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21975 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21976 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21977 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21978 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21979 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21980 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21981 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21982 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 21983 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 21984 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 21985 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 21986 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 21987 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 21988 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21989 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21990 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21991 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21992 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21993 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21994 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21995 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21996 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21997 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 21998 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 21999 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22000 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22001 { 15732 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22002 { 15732 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22003 { 15732 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22004 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22005 { 15732 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22006 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22007 { 15732 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22008 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22009 { 15732 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22010 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 22011 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 22012 { 15732 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 22013 { 15732 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22014 { 15732 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22015 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22016 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22017 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22018 { 15732 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22019 { 15732 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22020 { 15732 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22021 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22022 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22023 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22024 { 15732 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22025 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22026 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22027 { 15732 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22028 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22029 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22030 { 15732 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22031 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22032 { 15740 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22033 { 15740 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22034 { 15740 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22035 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22036 { 15740 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22037 { 15740 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22038 { 15740 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22039 { 15740 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22040 { 15740 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22041 { 15740 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 22042 { 15740 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 22043 { 15740 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 22044 { 15740 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22045 { 15740 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22046 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22047 { 15740 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22048 { 15740 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22049 { 15740 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22050 { 15740 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22051 { 15740 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22052 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22053 { 15740 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22054 { 15740 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22055 { 15740 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22056 { 15740 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22057 { 15740 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22058 { 15740 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22059 { 15740 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22060 { 15740 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22061 { 15740 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22062 { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22063 { 15748 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 22064 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 22065 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 22066 { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 22067 { 15748 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 22068 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 22069 { 15748 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 22070 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 22071 { 15748 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 22072 { 15748 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 22073 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, }, 22074 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, }, 22075 { 15748 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, }, 22076 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22077 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22078 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22079 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22080 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22081 { 15748 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22082 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22083 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22084 { 15748 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22085 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22086 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22087 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22088 { 15748 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22089 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22090 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22091 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22092 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22093 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22094 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22095 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22096 { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22097 { 15756 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 22098 { 15756 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 22099 { 15756 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 22100 { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 22101 { 15756 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 22102 { 15756 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 22103 { 15756 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 22104 { 15756 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 22105 { 15756 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 22106 { 15756 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, }, 22107 { 15756 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, }, 22108 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, }, 22109 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, }, 22110 { 15756 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22111 { 15756 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22112 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22113 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22114 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22115 { 15756 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22116 { 15756 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22117 { 15756 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22118 { 15756 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22119 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22120 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22121 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22122 { 15756 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22123 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22124 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22125 { 15756 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22126 { 15756 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22127 { 15756 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22128 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22129 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22130 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22131 { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22132 { 15764 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 22133 { 15764 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 22134 { 15764 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22135 { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22136 { 15764 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22137 { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22138 { 15764 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22139 { 15764 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22140 { 15764 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22141 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22142 { 15772 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22143 { 15772 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 22144 { 15772 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 22145 { 15772 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22146 { 15772 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22147 { 15772 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22148 { 15772 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22149 { 15772 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22150 { 15772 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22151 { 15772 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22152 { 15780 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 22153 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22154 { 15789 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22155 { 15789 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22156 { 15789 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22157 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22158 { 15789 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22159 { 15789 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22160 { 15789 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22161 { 15789 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22162 { 15789 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22163 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22164 { 15789 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 22165 { 15789 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 22166 { 15789 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 22167 { 15789 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22168 { 15789 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22169 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22170 { 15789 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22171 { 15789 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22172 { 15789 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22173 { 15789 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22174 { 15789 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22175 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22176 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22177 { 15789 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22178 { 15789 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22179 { 15789 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22180 { 15789 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22181 { 15789 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22182 { 15789 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22183 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22184 { 15789 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22185 { 15789 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22186 { 15789 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22187 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22188 { 15796 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22189 { 15796 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22190 { 15796 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22191 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22192 { 15796 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22193 { 15796 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22194 { 15796 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22195 { 15796 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22196 { 15796 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22197 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22198 { 15796 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 22199 { 15796 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 22200 { 15796 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 22201 { 15796 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22202 { 15796 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22203 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22204 { 15796 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22205 { 15796 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22206 { 15796 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22207 { 15796 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22208 { 15796 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22209 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22210 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22211 { 15796 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22212 { 15796 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22213 { 15796 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22214 { 15796 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22215 { 15796 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22216 { 15796 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22217 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22218 { 15796 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22219 { 15796 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22220 { 15796 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22221 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22222 { 15803 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22223 { 15803 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, }, 22224 { 15803 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, }, 22225 { 15803 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22226 { 15803 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22227 { 15803 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22228 { 15803 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22229 { 15803 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22230 { 15803 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22231 { 15803 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22232 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22233 { 15810 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22234 { 15810 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, }, 22235 { 15810 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, }, 22236 { 15810 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22237 { 15810 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22238 { 15810 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22239 { 15810 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22240 { 15810 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22241 { 15810 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22242 { 15810 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22243 { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22244 { 15817 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 22245 { 15817 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 22246 { 15817 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 22247 { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22248 { 15825 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 22249 { 15825 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 22250 { 15825 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 22251 { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22252 { 15833 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 22253 { 15833 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 22254 { 15833 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 22255 { 15833 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, }, 22256 { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22257 { 15842 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 22258 { 15842 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 22259 { 15842 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 22260 { 15842 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, }, 22261 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22262 { 15851 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22263 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22264 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22265 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22266 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22267 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22268 { 15851 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22269 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22270 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22271 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 22272 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 22273 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 22274 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22275 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22276 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22277 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22278 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22279 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22280 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22281 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22282 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22283 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22284 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22285 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22286 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22287 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22288 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22289 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22290 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22291 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22292 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22293 { 15861 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22294 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22295 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22296 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22297 { 15861 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22298 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22299 { 15861 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22300 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22301 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22302 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 22303 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 22304 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 22305 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22306 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22307 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22308 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22309 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22310 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22311 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22312 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22313 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22314 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22315 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22316 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22317 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22318 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22319 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22320 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22321 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22322 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22323 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22324 { 15871 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22325 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22326 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22327 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22328 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22329 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22330 { 15871 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22331 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22332 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22333 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 22334 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 22335 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 22336 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22337 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22338 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22339 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22340 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22341 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22342 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22343 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22344 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22345 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22346 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22347 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22348 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22349 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22350 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22351 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22352 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22353 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22354 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22355 { 15881 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22356 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22357 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22358 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22359 { 15881 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22360 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22361 { 15881 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22362 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22363 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22364 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 22365 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 22366 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 22367 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22368 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22369 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22370 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22371 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22372 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22373 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22374 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22375 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22376 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22377 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22378 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22379 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22380 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22381 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22382 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22383 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22384 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22385 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22386 { 15891 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22387 { 15891 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22388 { 15891 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22389 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22390 { 15891 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22391 { 15891 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22392 { 15891 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22393 { 15891 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22394 { 15891 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22395 { 15891 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, }, 22396 { 15891 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, }, 22397 { 15891 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, }, 22398 { 15891 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22399 { 15891 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22400 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22401 { 15891 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22402 { 15891 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22403 { 15891 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22404 { 15891 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22405 { 15891 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22406 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22407 { 15891 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22408 { 15891 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22409 { 15891 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22410 { 15891 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22411 { 15891 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22412 { 15891 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22413 { 15891 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22414 { 15891 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22415 { 15891 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22416 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 22417 { 15898 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 22418 { 15898 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 22419 { 15898 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 22420 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 22421 { 15898 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 22422 { 15898 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, }, 22423 { 15898 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 22424 { 15898 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, }, 22425 { 15898 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, }, 22426 { 15898 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, }, 22427 { 15898 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, }, 22428 { 15898 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, }, 22429 { 15898 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22430 { 15898 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22431 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22432 { 15898 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22433 { 15898 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22434 { 15898 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22435 { 15898 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22436 { 15898 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22437 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22438 { 15898 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22439 { 15898 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22440 { 15898 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22441 { 15898 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22442 { 15898 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, }, 22443 { 15898 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22444 { 15898 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22445 { 15898 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22446 { 15898 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, }, 22447 { 15905 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, AMFBS_None, { }, }, 22448 { 15914 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, AMFBS_None, { }, }, 22449 { 15925 /* wait */, X86::WAIT, Convert_NoOperands, AMFBS_None, { }, }, 22450 { 15930 /* wbinvd */, X86::WBINVD, Convert_NoOperands, AMFBS_None, { }, }, 22451 { 15937 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, AMFBS_None, { }, }, 22452 { 15955 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 22453 { 15965 /* wrfsbaseq */, X86::WRFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 22454 { 15984 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 22455 { 15994 /* wrgsbaseq */, X86::WRGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 22456 { 16004 /* wrmsr */, X86::WRMSR, Convert_NoOperands, AMFBS_None, { }, }, 22457 { 16010 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, AMFBS_None, { }, }, 22458 { 16017 /* wrssd */, X86::WRSSD, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22459 { 16023 /* wrssq */, X86::WRSSQ, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22460 { 16029 /* wrussd */, X86::WRUSSD, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22461 { 16036 /* wrussq */, X86::WRUSSQ, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22462 { 16043 /* xabort */, X86::XABORT, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 22463 { 16050 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 22464 { 16064 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 22465 { 16064 /* xaddb */, X86::XADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 22466 { 16070 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22467 { 16070 /* xaddl */, X86::XADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22468 { 16076 /* xaddq */, X86::XADD64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22469 { 16076 /* xaddq */, X86::XADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22470 { 16082 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22471 { 16082 /* xaddw */, X86::XADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22472 { 16088 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, AMFBS_None, { MCK_AbsMem16 }, }, 22473 { 16088 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 22474 { 16100 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 22475 { 16100 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 22476 { 16100 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 22477 { 16106 /* xchgl */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, AMFBS_In64BitMode, { MCK_EAX, MCK_EAX }, }, 22478 { 16106 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_EAX, MCK_GR32 }, }, 22479 { 16106 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, }, 22480 { 16106 /* xchgl */, X86::XCHG32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22481 { 16106 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22482 { 16106 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22483 { 16112 /* xchgq */, X86::NOOP, Convert_NoOperands, AMFBS_None, { MCK_RAX, MCK_RAX }, }, 22484 { 16112 /* xchgq */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_RAX, MCK_GR64 }, }, 22485 { 16112 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_RAX }, }, 22486 { 16112 /* xchgq */, X86::XCHG64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22487 { 16112 /* xchgq */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22488 { 16112 /* xchgq */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22489 { 16118 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_AX, MCK_GR16 }, }, 22490 { 16118 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, }, 22491 { 16118 /* xchgw */, X86::XCHG16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22492 { 16118 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22493 { 16118 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22494 { 16124 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, AMFBS_None, { }, }, 22495 { 16134 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, AMFBS_None, { }, }, 22496 { 16144 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, AMFBS_None, { }, }, 22497 { 16154 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, AMFBS_None, { }, }, 22498 { 16164 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, AMFBS_None, { }, }, 22499 { 16174 /* xend */, X86::XEND, Convert_NoOperands, AMFBS_None, { }, }, 22500 { 16179 /* xgetbv */, X86::XGETBV, Convert_NoOperands, AMFBS_None, { }, }, 22501 { 16186 /* xlatb */, X86::XLAT, Convert_NoOperands, AMFBS_None, { }, }, 22502 { 16196 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 22503 { 16196 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 22504 { 16196 /* xorb */, X86::XOR8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, }, 22505 { 16196 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, }, 22506 { 16196 /* xorb */, X86::XOR8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, }, 22507 { 16196 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 22508 { 16201 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22509 { 16201 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22510 { 16201 /* xorl */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, }, 22511 { 16201 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, }, 22512 { 16201 /* xorl */, X86::XOR32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, }, 22513 { 16201 /* xorl */, X86::XOR32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, }, 22514 { 16201 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, }, 22515 { 16201 /* xorl */, X86::XOR32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, }, 22516 { 16201 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22517 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22518 { 16206 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 22519 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22520 { 16212 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 22521 { 16218 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22522 { 16218 /* xorq */, X86::XOR64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22523 { 16218 /* xorq */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, }, 22524 { 16218 /* xorq */, X86::XOR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, }, 22525 { 16218 /* xorq */, X86::XOR64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, }, 22526 { 16218 /* xorq */, X86::XOR64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, }, 22527 { 16218 /* xorq */, X86::XOR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, }, 22528 { 16218 /* xorq */, X86::XOR64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, }, 22529 { 16218 /* xorq */, X86::XOR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22530 { 16223 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22531 { 16223 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22532 { 16223 /* xorw */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, }, 22533 { 16223 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, }, 22534 { 16223 /* xorw */, X86::XOR16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, }, 22535 { 16223 /* xorw */, X86::XOR16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, }, 22536 { 16223 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, }, 22537 { 16223 /* xorw */, X86::XOR16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, }, 22538 { 16223 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22539 { 16228 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 22540 { 16237 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22541 { 16244 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 22542 { 16253 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22543 { 16261 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 22544 { 16271 /* xsave */, X86::XSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22545 { 16277 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 22546 { 16285 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22547 { 16292 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 22548 { 16301 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22549 { 16310 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 22550 { 16321 /* xsaves */, X86::XSAVES, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22551 { 16328 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 22552 { 16337 /* xsetbv */, X86::XSETBV, Convert_NoOperands, AMFBS_None, { }, }, 22553 { 16344 /* xsha1 */, X86::XSHA1, Convert_NoOperands, AMFBS_None, { }, }, 22554 { 16350 /* xsha256 */, X86::XSHA256, Convert_NoOperands, AMFBS_None, { }, }, 22555 { 16358 /* xstore */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, }, 22556 { 16365 /* xstorerng */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, }, 22557 { 16375 /* xtest */, X86::XTEST, Convert_NoOperands, AMFBS_None, { }, }, 22558}; 22559 22560static const MatchEntry MatchTable1[] = { 22561 { 0 /* aaa */, X86::AAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 22562 { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, }, 22563 { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 22564 { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, }, 22565 { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 22566 { 12 /* aas */, X86::AAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 22567 { 16 /* adc */, X86::ADC8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 22568 { 16 /* adc */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 22569 { 16 /* adc */, X86::ADC16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 22570 { 16 /* adc */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 22571 { 16 /* adc */, X86::ADC32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 22572 { 16 /* adc */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 22573 { 16 /* adc */, X86::ADC64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 22574 { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22575 { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 22576 { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 22577 { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22578 { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22579 { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 22580 { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 22581 { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22582 { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22583 { 16 /* adc */, X86::ADC64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 22584 { 16 /* adc */, X86::ADC64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 22585 { 16 /* adc */, X86::ADC64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22586 { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 22587 { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 22588 { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 22589 { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22590 { 16 /* adc */, X86::ADC16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 22591 { 16 /* adc */, X86::ADC16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 22592 { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22593 { 16 /* adc */, X86::ADC32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 22594 { 16 /* adc */, X86::ADC32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 22595 { 16 /* adc */, X86::ADC64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22596 { 16 /* adc */, X86::ADC64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 22597 { 16 /* adc */, X86::ADC64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 22598 { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 22599 { 16 /* adc */, X86::ADC8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 22600 { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22601 { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22602 { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22603 { 40 /* adcx */, X86::ADCX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22604 { 57 /* add */, X86::ADD8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 22605 { 57 /* add */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 22606 { 57 /* add */, X86::ADD16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 22607 { 57 /* add */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 22608 { 57 /* add */, X86::ADD32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 22609 { 57 /* add */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 22610 { 57 /* add */, X86::ADD64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 22611 { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22612 { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 22613 { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 22614 { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22615 { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22616 { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 22617 { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 22618 { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22619 { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22620 { 57 /* add */, X86::ADD64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 22621 { 57 /* add */, X86::ADD64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 22622 { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22623 { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 22624 { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 22625 { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 22626 { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22627 { 57 /* add */, X86::ADD16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 22628 { 57 /* add */, X86::ADD16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 22629 { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22630 { 57 /* add */, X86::ADD32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 22631 { 57 /* add */, X86::ADD32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 22632 { 57 /* add */, X86::ADD64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22633 { 57 /* add */, X86::ADD64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 22634 { 57 /* add */, X86::ADD64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 22635 { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 22636 { 57 /* add */, X86::ADD8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 22637 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22638 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22639 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22640 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22641 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22642 { 88 /* addsd */, X86::ADDSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 22643 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22644 { 94 /* addss */, X86::ADDSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 22645 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22646 { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22647 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22648 { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22649 { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22650 { 123 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22651 { 123 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22652 { 123 /* adox */, X86::ADOX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22653 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22654 { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22655 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22656 { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22657 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22658 { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22659 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22660 { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22661 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22662 { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22663 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 22664 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 22665 { 199 /* and */, X86::AND8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 22666 { 199 /* and */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 22667 { 199 /* and */, X86::AND16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 22668 { 199 /* and */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 22669 { 199 /* and */, X86::AND32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 22670 { 199 /* and */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 22671 { 199 /* and */, X86::AND64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 22672 { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22673 { 199 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 22674 { 199 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 22675 { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22676 { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22677 { 199 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 22678 { 199 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 22679 { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22680 { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22681 { 199 /* and */, X86::AND64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 22682 { 199 /* and */, X86::AND64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 22683 { 199 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22684 { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 22685 { 199 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 22686 { 199 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 22687 { 199 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22688 { 199 /* and */, X86::AND16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 22689 { 199 /* and */, X86::AND16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 22690 { 199 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22691 { 199 /* and */, X86::AND32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 22692 { 199 /* and */, X86::AND32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 22693 { 199 /* and */, X86::AND64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22694 { 199 /* and */, X86::AND64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 22695 { 199 /* and */, X86::AND64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 22696 { 199 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 22697 { 199 /* and */, X86::AND8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 22698 { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 22699 { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, }, 22700 { 213 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 22701 { 213 /* andn */, X86::ANDN64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, }, 22702 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22703 { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22704 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22705 { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22706 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22707 { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22708 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22709 { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22710 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, }, 22711 { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem16, MCK_GR16 }, }, 22712 { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 22713 { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, }, 22714 { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 22715 { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, }, 22716 { 271 /* bextr */, X86::BEXTR64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 22717 { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, }, 22718 { 271 /* bextr */, X86::BEXTR64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 22719 { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, }, 22720 { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22721 { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22722 { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22723 { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22724 { 317 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22725 { 317 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22726 { 317 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22727 { 317 /* blci */, X86::BLCI64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22728 { 322 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22729 { 322 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22730 { 322 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22731 { 322 /* blcic */, X86::BLCIC64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22732 { 354 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22733 { 354 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22734 { 354 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22735 { 354 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22736 { 377 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22737 { 377 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22738 { 377 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22739 { 377 /* blcs */, X86::BLCS64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22740 { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 22741 { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 22742 { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 22743 { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 22744 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22745 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22746 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, }, 22747 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, }, 22748 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 22749 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 22750 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, }, 22751 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, }, 22752 { 428 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22753 { 428 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22754 { 428 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22755 { 428 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22756 { 454 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22757 { 454 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22758 { 454 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22759 { 454 /* blsi */, X86::BLSI64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22760 { 459 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22761 { 459 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22762 { 459 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22763 { 459 /* blsic */, X86::BLSIC64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22764 { 491 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22765 { 491 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22766 { 491 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22767 { 491 /* blsmsk */, X86::BLSMSK64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22768 { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22769 { 514 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22770 { 514 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22771 { 514 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22772 { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, }, 22773 { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, }, 22774 { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, }, 22775 { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, }, 22776 { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, }, 22777 { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, }, 22778 { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, }, 22779 { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, }, 22780 { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, }, 22781 { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, }, 22782 { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, }, 22783 { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, }, 22784 { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_BNDR, MCK_Mem }, }, 22785 { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, }, 22786 { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, }, 22787 { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_BNDR, MCK_BNDR }, }, 22788 { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem128 }, }, 22789 { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_0__Mem645_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, }, 22790 { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_0__Reg1_1, AMFBS_In64BitMode, { MCK_Mem128, MCK_BNDR }, }, 22791 { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem64, MCK_BNDR }, }, 22792 { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_0__Reg1_1, AMFBS_None, { MCK_Mem, MCK_BNDR }, }, 22793 { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, }, 22794 { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, }, 22795 { 582 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22796 { 582 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22797 { 582 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22798 { 582 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22799 { 582 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22800 { 582 /* bsf */, X86::BSF64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22801 { 601 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22802 { 601 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22803 { 601 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22804 { 601 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22805 { 601 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22806 { 601 /* bsr */, X86::BSR64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22807 { 620 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 22808 { 620 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 22809 { 640 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22810 { 640 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 22811 { 640 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22812 { 640 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 22813 { 640 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22814 { 640 /* bt */, X86::BT64ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 22815 { 640 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22816 { 640 /* bt */, X86::BT16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 22817 { 640 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22818 { 640 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 22819 { 640 /* bt */, X86::BT64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22820 { 640 /* bt */, X86::BT64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 22821 { 643 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22822 { 643 /* btc */, X86::BTC16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 22823 { 643 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22824 { 643 /* btc */, X86::BTC32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 22825 { 643 /* btc */, X86::BTC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22826 { 643 /* btc */, X86::BTC64ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 22827 { 643 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22828 { 643 /* btc */, X86::BTC16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 22829 { 643 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22830 { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 22831 { 643 /* btc */, X86::BTC64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22832 { 643 /* btc */, X86::BTC64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 22833 { 670 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22834 { 670 /* btr */, X86::BTR16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 22835 { 670 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22836 { 670 /* btr */, X86::BTR32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 22837 { 670 /* btr */, X86::BTR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22838 { 670 /* btr */, X86::BTR64ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 22839 { 670 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22840 { 670 /* btr */, X86::BTR16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 22841 { 670 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22842 { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 22843 { 670 /* btr */, X86::BTR64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22844 { 670 /* btr */, X86::BTR64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 22845 { 689 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22846 { 689 /* bts */, X86::BTS16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 22847 { 689 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22848 { 689 /* bts */, X86::BTS32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 22849 { 689 /* bts */, X86::BTS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22850 { 689 /* bts */, X86::BTS64ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 22851 { 689 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 22852 { 689 /* bts */, X86::BTS16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 22853 { 689 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 22854 { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 22855 { 689 /* bts */, X86::BTS64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 22856 { 689 /* bts */, X86::BTS64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 22857 { 712 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 22858 { 712 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 22859 { 712 /* bzhi */, X86::BZHI64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 22860 { 712 /* bzhi */, X86::BZHI64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 22861 { 729 /* call */, X86::CALL16r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, }, 22862 { 729 /* call */, X86::CALL32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 22863 { 729 /* call */, X86::CALL64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 22864 { 729 /* call */, X86::CALL64pcrel32, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, }, 22865 { 729 /* call */, X86::CALLpcrel32, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, }, 22866 { 729 /* call */, X86::CALLpcrel16, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 22867 { 729 /* call */, X86::CALL16m, Convert__Mem165_0, AMFBS_Not64BitMode, { MCK_Mem16 }, }, 22868 { 729 /* call */, X86::CALL32m, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, }, 22869 { 729 /* call */, X86::CALL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 22870 { 729 /* call */, X86::FARCALL32m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 22871 { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 22872 { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 22873 { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 22874 { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 22875 { 757 /* cbw */, X86::CBW, Convert_NoOperands, AMFBS_None, { }, }, 22876 { 761 /* cdq */, X86::CDQ, Convert_NoOperands, AMFBS_None, { }, }, 22877 { 765 /* cdqe */, X86::CDQE, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 22878 { 770 /* clac */, X86::CLAC, Convert_NoOperands, AMFBS_None, { }, }, 22879 { 775 /* clc */, X86::CLC, Convert_NoOperands, AMFBS_None, { }, }, 22880 { 779 /* cld */, X86::CLD, Convert_NoOperands, AMFBS_None, { }, }, 22881 { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 22882 { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 22883 { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 22884 { 811 /* clgi */, X86::CLGI, Convert_NoOperands, AMFBS_None, { }, }, 22885 { 816 /* cli */, X86::CLI, Convert_NoOperands, AMFBS_None, { }, }, 22886 { 820 /* clr */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 22887 { 820 /* clr */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 22888 { 820 /* clr */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 22889 { 820 /* clr */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 22890 { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 22891 { 863 /* clts */, X86::CLTS, Convert_NoOperands, AMFBS_None, { }, }, 22892 { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 22893 { 873 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 22894 { 873 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 22895 { 873 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 22896 { 873 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 22897 { 880 /* cmc */, X86::CMC, Convert_NoOperands, AMFBS_None, { }, }, 22898 { 884 /* cmova */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22899 { 884 /* cmova */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22900 { 884 /* cmova */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22901 { 884 /* cmova */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22902 { 884 /* cmova */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22903 { 884 /* cmova */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_7, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22904 { 890 /* cmovae */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22905 { 890 /* cmovae */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22906 { 890 /* cmovae */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22907 { 890 /* cmovae */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22908 { 890 /* cmovae */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22909 { 890 /* cmovae */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_3, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22910 { 942 /* cmovb */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22911 { 942 /* cmovb */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22912 { 942 /* cmovb */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22913 { 942 /* cmovb */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22914 { 942 /* cmovb */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22915 { 942 /* cmovb */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_2, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22916 { 948 /* cmovbe */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22917 { 948 /* cmovbe */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22918 { 948 /* cmovbe */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22919 { 948 /* cmovbe */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22920 { 948 /* cmovbe */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22921 { 948 /* cmovbe */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_6, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22922 { 1000 /* cmove */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22923 { 1000 /* cmove */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22924 { 1000 /* cmove */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22925 { 1000 /* cmove */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22926 { 1000 /* cmove */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22927 { 1000 /* cmove */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_4, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22928 { 1027 /* cmovg */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22929 { 1027 /* cmovg */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22930 { 1027 /* cmovg */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22931 { 1027 /* cmovg */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22932 { 1027 /* cmovg */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22933 { 1027 /* cmovg */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_15, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22934 { 1033 /* cmovge */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22935 { 1033 /* cmovge */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22936 { 1033 /* cmovge */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22937 { 1033 /* cmovge */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22938 { 1033 /* cmovge */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22939 { 1033 /* cmovge */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_13, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22940 { 1085 /* cmovl */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22941 { 1085 /* cmovl */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22942 { 1085 /* cmovl */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22943 { 1085 /* cmovl */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22944 { 1085 /* cmovl */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22945 { 1085 /* cmovl */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_12, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22946 { 1091 /* cmovle */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22947 { 1091 /* cmovle */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22948 { 1091 /* cmovle */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22949 { 1091 /* cmovle */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22950 { 1091 /* cmovle */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22951 { 1091 /* cmovle */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_14, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22952 { 1143 /* cmovne */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22953 { 1143 /* cmovne */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22954 { 1143 /* cmovne */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22955 { 1143 /* cmovne */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22956 { 1143 /* cmovne */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22957 { 1143 /* cmovne */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_5, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22958 { 1174 /* cmovno */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22959 { 1174 /* cmovno */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22960 { 1174 /* cmovno */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22961 { 1174 /* cmovno */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22962 { 1174 /* cmovno */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22963 { 1174 /* cmovno */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22964 { 1205 /* cmovnp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22965 { 1205 /* cmovnp */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22966 { 1205 /* cmovnp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22967 { 1205 /* cmovnp */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22968 { 1205 /* cmovnp */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22969 { 1205 /* cmovnp */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_11, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22970 { 1236 /* cmovns */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22971 { 1236 /* cmovns */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22972 { 1236 /* cmovns */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22973 { 1236 /* cmovns */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22974 { 1236 /* cmovns */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22975 { 1236 /* cmovns */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_9, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22976 { 1267 /* cmovo */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22977 { 1267 /* cmovo */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22978 { 1267 /* cmovo */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22979 { 1267 /* cmovo */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22980 { 1267 /* cmovo */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22981 { 1267 /* cmovo */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22982 { 1294 /* cmovp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22983 { 1294 /* cmovp */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22984 { 1294 /* cmovp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22985 { 1294 /* cmovp */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22986 { 1294 /* cmovp */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22987 { 1294 /* cmovp */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_10, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22988 { 1321 /* cmovs */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 22989 { 1321 /* cmovs */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 22990 { 1321 /* cmovs */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 22991 { 1321 /* cmovs */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 22992 { 1321 /* cmovs */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 22993 { 1321 /* cmovs */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_8, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 22994 { 1348 /* cmp */, X86::CMP8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 22995 { 1348 /* cmp */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 22996 { 1348 /* cmp */, X86::CMP16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 22997 { 1348 /* cmp */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 22998 { 1348 /* cmp */, X86::CMP32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 22999 { 1348 /* cmp */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 23000 { 1348 /* cmp */, X86::CMP64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 23001 { 1348 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23002 { 1348 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 23003 { 1348 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 23004 { 1348 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23005 { 1348 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23006 { 1348 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 23007 { 1348 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 23008 { 1348 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23009 { 1348 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23010 { 1348 /* cmp */, X86::CMP64ri8, Convert__Reg1_0__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 23011 { 1348 /* cmp */, X86::CMP64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 23012 { 1348 /* cmp */, X86::CMP64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23013 { 1348 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 23014 { 1348 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 23015 { 1348 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 23016 { 1348 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 23017 { 1348 /* cmp */, X86::CMP16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 23018 { 1348 /* cmp */, X86::CMP16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 23019 { 1348 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23020 { 1348 /* cmp */, X86::CMP32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 23021 { 1348 /* cmp */, X86::CMP32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 23022 { 1348 /* cmp */, X86::CMP64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 23023 { 1348 /* cmp */, X86::CMP64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 23024 { 1348 /* cmp */, X86::CMP64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 23025 { 1348 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 23026 { 1348 /* cmp */, X86::CMP8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 23027 { 1362 /* cmppd */, X86::CMPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23028 { 1362 /* cmppd */, X86::CMPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23029 { 1368 /* cmpps */, X86::CMPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23030 { 1368 /* cmpps */, X86::CMPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23031 { 1379 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DstIdx16 }, }, 23032 { 1379 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DstIdx32 }, }, 23033 { 1379 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, }, 23034 { 1379 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DstIdx8 }, }, 23035 { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DstIdx8 }, }, 23036 { 1390 /* cmpsd */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DstIdx32 }, }, 23037 { 1390 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23038 { 1390 /* cmpsd */, X86::CMPSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 23039 { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, }, 23040 { 1408 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23041 { 1408 /* cmpss */, X86::CMPSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 23042 { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DstIdx16 }, }, 23043 { 1425 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23044 { 1425 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23045 { 1425 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23046 { 1425 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 23047 { 1425 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 23048 { 1425 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23049 { 1425 /* cmpxchg */, X86::CMPXCHG64rm, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 23050 { 1425 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 23051 { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128 }, }, 23052 { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23053 { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23054 { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23055 { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23056 { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23057 { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, AMFBS_None, { }, }, 23058 { 1510 /* cqo */, X86::CQO, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 23059 { 1519 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, }, 23060 { 1519 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23061 { 1519 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, }, 23062 { 1519 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, }, 23063 { 1519 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23064 { 1519 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, }, 23065 { 1519 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23066 { 1519 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, }, 23067 { 1519 /* crc32 */, X86::CRC32r64m64, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23068 { 1519 /* crc32 */, X86::CRC32r64m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR64, MCK_Mem8 }, }, 23069 { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23070 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23071 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23072 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23073 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23074 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23075 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23076 { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 23077 { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR64, MCK_Mem128 }, }, 23078 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23079 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23080 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 23081 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23082 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 23083 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23084 { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23085 { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23086 { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23087 { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23088 { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 23089 { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 23090 { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 23091 { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 23092 { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 23093 { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23094 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23095 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23096 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 23097 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 23098 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23099 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23100 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 23101 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 23102 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23103 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23104 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23105 { 1742 /* cvtss2sd */, X86::CVTSS2SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23106 { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 23107 { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23108 { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 23109 { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 23110 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23111 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23112 { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 23113 { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR64, MCK_Mem128 }, }, 23114 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23115 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23116 { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 23117 { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 23118 { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 23119 { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 23120 { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 23121 { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23122 { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 23123 { 1852 /* cvttss2si */, X86::CVTTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23124 { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 23125 { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 23126 { 1884 /* cwd */, X86::CWD, Convert_NoOperands, AMFBS_None, { }, }, 23127 { 1888 /* cwde */, X86::CWDE, Convert_NoOperands, AMFBS_None, { }, }, 23128 { 1903 /* daa */, X86::DAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 23129 { 1907 /* das */, X86::DAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 23130 { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23131 { 1918 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, }, 23132 { 1918 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 23133 { 1918 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, }, 23134 { 1918 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 23135 { 1918 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 23136 { 1918 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 23137 { 1918 /* dec */, X86::DEC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23138 { 1918 /* dec */, X86::DEC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23139 { 1918 /* dec */, X86::DEC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23140 { 1918 /* dec */, X86::DEC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23141 { 1942 /* div */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23142 { 1942 /* div */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23143 { 1942 /* div */, X86::DIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 23144 { 1942 /* div */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 23145 { 1942 /* div */, X86::DIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23146 { 1942 /* div */, X86::DIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23147 { 1942 /* div */, X86::DIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23148 { 1942 /* div */, X86::DIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23149 { 1942 /* div */, X86::DIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, }, 23150 { 1942 /* div */, X86::DIV8m, Convert__Mem85_1, AMFBS_None, { MCK_AL, MCK_Mem8 }, }, 23151 { 1942 /* div */, X86::DIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, }, 23152 { 1942 /* div */, X86::DIV16m, Convert__Mem165_1, AMFBS_None, { MCK_AX, MCK_Mem16 }, }, 23153 { 1942 /* div */, X86::DIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, }, 23154 { 1942 /* div */, X86::DIV32m, Convert__Mem325_1, AMFBS_None, { MCK_EAX, MCK_Mem32 }, }, 23155 { 1942 /* div */, X86::DIV64r, Convert__Reg1_1, AMFBS_None, { MCK_RAX, MCK_GR64 }, }, 23156 { 1942 /* div */, X86::DIV64m, Convert__Mem645_1, AMFBS_None, { MCK_RAX, MCK_Mem64 }, }, 23157 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23158 { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23159 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23160 { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23161 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23162 { 1973 /* divsd */, X86::DIVSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23163 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23164 { 1979 /* divss */, X86::DIVSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23165 { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23166 { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23167 { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23168 { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23169 { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23170 { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, AMFBS_None, { }, }, 23171 { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, AMFBS_None, { }, }, 23172 { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, AMFBS_None, { }, }, 23173 { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, AMFBS_None, { }, }, 23174 { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, AMFBS_None, { }, }, 23175 { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, AMFBS_None, { }, }, 23176 { 2042 /* enqcmd */, X86::ENQCMD16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, }, 23177 { 2042 /* enqcmd */, X86::ENQCMD32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, }, 23178 { 2042 /* enqcmd */, X86::ENQCMD64, Convert__Reg1_0__Mem5125_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem512 }, }, 23179 { 2049 /* enqcmds */, X86::ENQCMDS16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, }, 23180 { 2049 /* enqcmds */, X86::ENQCMDS32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, }, 23181 { 2049 /* enqcmds */, X86::ENQCMDS64, Convert__Reg1_0__Mem5125_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem512 }, }, 23182 { 2057 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, AMFBS_None, { MCK_Imm, MCK_Imm }, }, 23183 { 2063 /* es */, X86::ES_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23184 { 2066 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23185 { 2066 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23186 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23187 { 2076 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, }, 23188 { 2082 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, AMFBS_None, { }, }, 23189 { 2088 /* fabs */, X86::ABS_F, Convert_NoOperands, AMFBS_None, { }, }, 23190 { 2093 /* fadd */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23191 { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23192 { 2093 /* fadd */, X86::ADD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23193 { 2093 /* fadd */, X86::ADD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23194 { 2093 /* fadd */, X86::ADD_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23195 { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23196 { 2093 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23197 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23198 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23199 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23200 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23201 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23202 { 2116 /* fbld */, X86::FBLDm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 23203 { 2121 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 23204 { 2127 /* fchs */, X86::CHS_F, Convert_NoOperands, AMFBS_None, { }, }, 23205 { 2132 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23206 { 2139 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23207 { 2147 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23208 { 2154 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23209 { 2162 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23210 { 2171 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23211 { 2179 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23212 { 2187 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23213 { 2194 /* fcom */, X86::COM_FST0r, Convert__regST1, AMFBS_None, { }, }, 23214 { 2194 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23215 { 2194 /* fcom */, X86::FCOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23216 { 2194 /* fcom */, X86::FCOM64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23217 { 2199 /* fcomi */, X86::COM_FIr, Convert__regST1, AMFBS_None, { }, }, 23218 { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23219 { 2199 /* fcomi */, X86::COM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23220 { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23221 { 2211 /* fcomp */, X86::COMP_FST0r, Convert__regST1, AMFBS_None, { }, }, 23222 { 2211 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23223 { 2211 /* fcomp */, X86::FCOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23224 { 2211 /* fcomp */, X86::FCOMP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23225 { 2217 /* fcompi */, X86::COM_FIPr, Convert__regST1, AMFBS_None, { }, }, 23226 { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23227 { 2217 /* fcompi */, X86::COM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23228 { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23229 { 2231 /* fcompp */, X86::FCOMPP, Convert_NoOperands, AMFBS_None, { }, }, 23230 { 2251 /* fcos */, X86::FCOS, Convert_NoOperands, AMFBS_None, { }, }, 23231 { 2256 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, AMFBS_None, { }, }, 23232 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23233 { 2264 /* fdiv */, X86::DIV_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23234 { 2264 /* fdiv */, X86::DIV_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23235 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23236 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23237 { 2264 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23238 { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23239 { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23240 { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23241 { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23242 { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23243 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23244 { 2281 /* fdivr */, X86::DIVR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23245 { 2281 /* fdivr */, X86::DIVR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23246 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23247 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23248 { 2281 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23249 { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23250 { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23251 { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23252 { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23253 { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23254 { 2314 /* femms */, X86::FEMMS, Convert_NoOperands, AMFBS_None, { }, }, 23255 { 2320 /* ffree */, X86::FFREE, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23256 { 2326 /* ffreep */, X86::FFREEP, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23257 { 2333 /* fiadd */, X86::ADD_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23258 { 2333 /* fiadd */, X86::ADD_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23259 { 2353 /* ficom */, X86::FICOM16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23260 { 2353 /* ficom */, X86::FICOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23261 { 2366 /* ficomp */, X86::FICOMP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23262 { 2366 /* ficomp */, X86::FICOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23263 { 2396 /* fidiv */, X86::DIV_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23264 { 2396 /* fidiv */, X86::DIV_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23265 { 2409 /* fidivr */, X86::DIVR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23266 { 2409 /* fidivr */, X86::DIVR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23267 { 2439 /* fild */, X86::ILD_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23268 { 2439 /* fild */, X86::ILD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23269 { 2439 /* fild */, X86::ILD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23270 { 2463 /* fimul */, X86::MUL_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23271 { 2463 /* fimul */, X86::MUL_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23272 { 2483 /* fincstp */, X86::FINCSTP, Convert_NoOperands, AMFBS_None, { }, }, 23273 { 2491 /* fist */, X86::IST_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23274 { 2491 /* fist */, X86::IST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23275 { 2502 /* fistp */, X86::IST_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23276 { 2502 /* fistp */, X86::IST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23277 { 2502 /* fistp */, X86::IST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23278 { 2536 /* fisttp */, X86::ISTT_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23279 { 2536 /* fisttp */, X86::ISTT_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23280 { 2536 /* fisttp */, X86::ISTT_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23281 { 2568 /* fisub */, X86::SUB_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23282 { 2568 /* fisub */, X86::SUB_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23283 { 2581 /* fisubr */, X86::SUBR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23284 { 2581 /* fisubr */, X86::SUBR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23285 { 2611 /* fld */, X86::LD_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23286 { 2611 /* fld */, X86::LD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23287 { 2611 /* fld */, X86::LD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23288 { 2611 /* fld */, X86::LD_F80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 23289 { 2615 /* fld1 */, X86::LD_F1, Convert_NoOperands, AMFBS_None, { }, }, 23290 { 2620 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23291 { 2626 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23292 { 2638 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, AMFBS_None, { }, }, 23293 { 2645 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, AMFBS_None, { }, }, 23294 { 2652 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, AMFBS_None, { }, }, 23295 { 2659 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, AMFBS_None, { }, }, 23296 { 2666 /* fldpi */, X86::FLDPI, Convert_NoOperands, AMFBS_None, { }, }, 23297 { 2682 /* fldz */, X86::LD_F0, Convert_NoOperands, AMFBS_None, { }, }, 23298 { 2687 /* fmul */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23299 { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23300 { 2687 /* fmul */, X86::MUL_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23301 { 2687 /* fmul */, X86::MUL_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23302 { 2687 /* fmul */, X86::MUL_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23303 { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23304 { 2687 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23305 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23306 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23307 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23308 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23309 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23310 { 2710 /* fnclex */, X86::FNCLEX, Convert_NoOperands, AMFBS_None, { }, }, 23311 { 2717 /* fninit */, X86::FNINIT, Convert_NoOperands, AMFBS_None, { }, }, 23312 { 2724 /* fnop */, X86::FNOP, Convert_NoOperands, AMFBS_None, { }, }, 23313 { 2729 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23314 { 2736 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23315 { 2743 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23316 { 2751 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { }, }, 23317 { 2751 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { MCK_AX }, }, 23318 { 2751 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23319 { 2758 /* fpatan */, X86::FPATAN, Convert_NoOperands, AMFBS_None, { }, }, 23320 { 2765 /* fprem */, X86::FPREM, Convert_NoOperands, AMFBS_None, { }, }, 23321 { 2771 /* fprem1 */, X86::FPREM1, Convert_NoOperands, AMFBS_None, { }, }, 23322 { 2778 /* fptan */, X86::FPTAN, Convert_NoOperands, AMFBS_None, { }, }, 23323 { 2784 /* frndint */, X86::FRNDINT, Convert_NoOperands, AMFBS_None, { }, }, 23324 { 2792 /* frstor */, X86::FRSTORm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23325 { 2799 /* fs */, X86::FS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23326 { 2802 /* fscale */, X86::FSCALE, Convert_NoOperands, AMFBS_None, { }, }, 23327 { 2809 /* fsin */, X86::FSIN, Convert_NoOperands, AMFBS_None, { }, }, 23328 { 2814 /* fsincos */, X86::FSINCOS, Convert_NoOperands, AMFBS_None, { }, }, 23329 { 2822 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, AMFBS_None, { }, }, 23330 { 2828 /* fst */, X86::ST_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23331 { 2828 /* fst */, X86::ST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23332 { 2828 /* fst */, X86::ST_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23333 { 2837 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23334 { 2837 /* fstp */, X86::ST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23335 { 2837 /* fstp */, X86::ST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23336 { 2837 /* fstp */, X86::ST_FP80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, }, 23337 { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23338 { 2865 /* fsub */, X86::SUB_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23339 { 2865 /* fsub */, X86::SUB_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23340 { 2865 /* fsub */, X86::SUB_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23341 { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23342 { 2865 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23343 { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23344 { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23345 { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23346 { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23347 { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23348 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23349 { 2882 /* fsubr */, X86::SUBR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23350 { 2882 /* fsubr */, X86::SUBR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 23351 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23352 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23353 { 2882 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23354 { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST1, AMFBS_None, { }, }, 23355 { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23356 { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23357 { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23358 { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, }, 23359 { 2915 /* ftst */, X86::TST_F, Convert_NoOperands, AMFBS_None, { }, }, 23360 { 2920 /* fucom */, X86::UCOM_Fr, Convert__regST1, AMFBS_None, { }, }, 23361 { 2920 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23362 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__regST1, AMFBS_None, { }, }, 23363 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23364 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23365 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23366 { 2933 /* fucomp */, X86::UCOM_FPr, Convert__regST1, AMFBS_None, { }, }, 23367 { 2933 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23368 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, AMFBS_None, { }, }, 23369 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23370 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, }, 23371 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, }, 23372 { 2948 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, AMFBS_None, { }, }, 23373 { 2956 /* fxam */, X86::FXAM, Convert_NoOperands, AMFBS_None, { }, }, 23374 { 2961 /* fxch */, X86::XCH_F, Convert__regST1, AMFBS_None, { }, }, 23375 { 2961 /* fxch */, X86::XCH_F, Convert__Reg1_0, AMFBS_None, { MCK_RST }, }, 23376 { 2966 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 23377 { 2974 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 23378 { 2984 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 23379 { 2991 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 23380 { 3000 /* fxtract */, X86::FXTRACT, Convert_NoOperands, AMFBS_None, { }, }, 23381 { 3008 /* fyl2x */, X86::FYL2X, Convert_NoOperands, AMFBS_None, { }, }, 23382 { 3014 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, AMFBS_None, { }, }, 23383 { 3022 /* getsec */, X86::GETSEC, Convert_NoOperands, AMFBS_None, { }, }, 23384 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23385 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23386 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23387 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23388 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23389 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23390 { 3070 /* gs */, X86::GS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23391 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23392 { 3073 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23393 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23394 { 3080 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23395 { 3087 /* hlt */, X86::HLT, Convert_NoOperands, AMFBS_None, { }, }, 23396 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23397 { 3091 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23398 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23399 { 3098 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23400 { 3105 /* idiv */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23401 { 3105 /* idiv */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23402 { 3105 /* idiv */, X86::IDIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 23403 { 3105 /* idiv */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 23404 { 3105 /* idiv */, X86::IDIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23405 { 3105 /* idiv */, X86::IDIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23406 { 3105 /* idiv */, X86::IDIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23407 { 3105 /* idiv */, X86::IDIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23408 { 3105 /* idiv */, X86::IDIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, }, 23409 { 3105 /* idiv */, X86::IDIV8m, Convert__Mem85_1, AMFBS_None, { MCK_AL, MCK_Mem8 }, }, 23410 { 3105 /* idiv */, X86::IDIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, }, 23411 { 3105 /* idiv */, X86::IDIV16m, Convert__Mem165_1, AMFBS_None, { MCK_AX, MCK_Mem16 }, }, 23412 { 3105 /* idiv */, X86::IDIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, }, 23413 { 3105 /* idiv */, X86::IDIV32m, Convert__Mem325_1, AMFBS_None, { MCK_EAX, MCK_Mem32 }, }, 23414 { 3105 /* idiv */, X86::IDIV64r, Convert__Reg1_1, AMFBS_None, { MCK_RAX, MCK_GR64 }, }, 23415 { 3105 /* idiv */, X86::IDIV64m, Convert__Mem645_1, AMFBS_None, { MCK_RAX, MCK_Mem64 }, }, 23416 { 3134 /* imul */, X86::IMUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23417 { 3134 /* imul */, X86::IMUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23418 { 3134 /* imul */, X86::IMUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 23419 { 3134 /* imul */, X86::IMUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 23420 { 3134 /* imul */, X86::IMUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23421 { 3134 /* imul */, X86::IMUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23422 { 3134 /* imul */, X86::IMUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23423 { 3134 /* imul */, X86::IMUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23424 { 3134 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23425 { 3134 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 23426 { 3134 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 23427 { 3134 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23428 { 3134 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23429 { 3134 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 23430 { 3134 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 23431 { 3134 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23432 { 3134 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23433 { 3134 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_0__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 23434 { 3134 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 23435 { 3134 /* imul */, X86::IMUL64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23436 { 3134 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, }, 23437 { 3134 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_Imm }, }, 23438 { 3134 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, }, 23439 { 3134 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_Mem16, MCK_Imm }, }, 23440 { 3134 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, }, 23441 { 3134 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, }, 23442 { 3134 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, }, 23443 { 3134 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, }, 23444 { 3134 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_1__ImmSExti64i81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i8 }, }, 23445 { 3134 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, }, 23446 { 3134 /* imul */, X86::IMUL64rmi8, Convert__Reg1_0__Mem645_1__ImmSExti64i81_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i8 }, }, 23447 { 3134 /* imul */, X86::IMUL64rmi32, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, }, 23448 { 3163 /* in */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_AL, MCK_DX }, }, 23449 { 3163 /* in */, X86::IN8ri, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AL, MCK_ImmUnsignedi8 }, }, 23450 { 3163 /* in */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_AX, MCK_DX }, }, 23451 { 3163 /* in */, X86::IN16ri, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AX, MCK_ImmUnsignedi8 }, }, 23452 { 3163 /* in */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_EAX, MCK_DX }, }, 23453 { 3163 /* in */, X86::IN32ri, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_EAX, MCK_ImmUnsignedi8 }, }, 23454 { 3166 /* inb */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 23455 { 3166 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 23456 { 3170 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, }, 23457 { 3170 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 23458 { 3170 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, }, 23459 { 3170 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 23460 { 3170 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 23461 { 3170 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 23462 { 3170 /* inc */, X86::INC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23463 { 3170 /* inc */, X86::INC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23464 { 3170 /* inc */, X86::INC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23465 { 3170 /* inc */, X86::INC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23466 { 3189 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23467 { 3197 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 23468 { 3210 /* inl */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 23469 { 3210 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 23470 { 3214 /* ins */, X86::INSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_DX }, }, 23471 { 3214 /* ins */, X86::INSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_DX }, }, 23472 { 3214 /* ins */, X86::INSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_DX }, }, 23473 { 3218 /* insb */, X86::INSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_DX }, }, 23474 { 3223 /* insd */, X86::INSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_DX }, }, 23475 { 3228 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23476 { 3228 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 23477 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23478 { 3237 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, }, 23479 { 3250 /* insw */, X86::INSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_DX }, }, 23480 { 3255 /* int */, X86::INT, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 23481 { 3259 /* int3 */, X86::INT3, Convert_NoOperands, AMFBS_None, { }, }, 23482 { 3264 /* into */, X86::INTO, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 23483 { 3269 /* invd */, X86::INVD, Convert_NoOperands, AMFBS_None, { }, }, 23484 { 3274 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, }, 23485 { 3274 /* invept */, X86::INVEPT64, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem128 }, }, 23486 { 3281 /* invlpg */, X86::INVLPG, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23487 { 3288 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX }, }, 23488 { 3288 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_ECX }, }, 23489 { 3296 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, }, 23490 { 3296 /* invpcid */, X86::INVPCID64, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem128 }, }, 23491 { 3304 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, }, 23492 { 3304 /* invvpid */, X86::INVVPID64, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem128 }, }, 23493 { 3312 /* inw */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 23494 { 3312 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 23495 { 3316 /* iret */, X86::IRET16, Convert_NoOperands, AMFBS_None, { }, }, 23496 { 3321 /* iretd */, X86::IRET32, Convert_NoOperands, AMFBS_None, { }, }, 23497 { 3333 /* iretq */, X86::IRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 23498 { 3345 /* ja */, X86::JCC_1, Convert__AbsMem1_0__imm_95_7, AMFBS_None, { MCK_AbsMem }, }, 23499 { 3348 /* jae */, X86::JCC_1, Convert__AbsMem1_0__imm_95_3, AMFBS_None, { MCK_AbsMem }, }, 23500 { 3352 /* jb */, X86::JCC_1, Convert__AbsMem1_0__imm_95_2, AMFBS_None, { MCK_AbsMem }, }, 23501 { 3355 /* jbe */, X86::JCC_1, Convert__AbsMem1_0__imm_95_6, AMFBS_None, { MCK_AbsMem }, }, 23502 { 3359 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, }, 23503 { 3364 /* je */, X86::JCC_1, Convert__AbsMem1_0__imm_95_4, AMFBS_None, { MCK_AbsMem }, }, 23504 { 3367 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 23505 { 3373 /* jg */, X86::JCC_1, Convert__AbsMem1_0__imm_95_15, AMFBS_None, { MCK_AbsMem }, }, 23506 { 3376 /* jge */, X86::JCC_1, Convert__AbsMem1_0__imm_95_13, AMFBS_None, { MCK_AbsMem }, }, 23507 { 3380 /* jl */, X86::JCC_1, Convert__AbsMem1_0__imm_95_12, AMFBS_None, { MCK_AbsMem }, }, 23508 { 3383 /* jle */, X86::JCC_1, Convert__AbsMem1_0__imm_95_14, AMFBS_None, { MCK_AbsMem }, }, 23509 { 3387 /* jmp */, X86::JMP16r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, }, 23510 { 3387 /* jmp */, X86::JMP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 23511 { 3387 /* jmp */, X86::JMP64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 23512 { 3387 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 23513 { 3387 /* jmp */, X86::JMP16m, Convert__Mem165_0, AMFBS_Not64BitMode, { MCK_Mem16 }, }, 23514 { 3387 /* jmp */, X86::JMP32m, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, }, 23515 { 3387 /* jmp */, X86::JMP64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23516 { 3387 /* jmp */, X86::FARJMP32m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 23517 { 3387 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 23518 { 3387 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 23519 { 3391 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 23520 { 3401 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, }, 23521 { 3406 /* jne */, X86::JCC_1, Convert__AbsMem1_0__imm_95_5, AMFBS_None, { MCK_AbsMem }, }, 23522 { 3410 /* jno */, X86::JCC_1, Convert__AbsMem1_0__imm_95_1, AMFBS_None, { MCK_AbsMem }, }, 23523 { 3414 /* jnp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_11, AMFBS_None, { MCK_AbsMem }, }, 23524 { 3418 /* jns */, X86::JCC_1, Convert__AbsMem1_0__imm_95_9, AMFBS_None, { MCK_AbsMem }, }, 23525 { 3422 /* jo */, X86::JCC_1, Convert__AbsMem1_0__imm_95_0, AMFBS_None, { MCK_AbsMem }, }, 23526 { 3425 /* jp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_10, AMFBS_None, { MCK_AbsMem }, }, 23527 { 3428 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, }, 23528 { 3434 /* js */, X86::JCC_1, Convert__AbsMem1_0__imm_95_8, AMFBS_None, { MCK_AbsMem }, }, 23529 { 3437 /* kaddb */, X86::KADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23530 { 3443 /* kaddd */, X86::KADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23531 { 3449 /* kaddq */, X86::KADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23532 { 3455 /* kaddw */, X86::KADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23533 { 3461 /* kandb */, X86::KANDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23534 { 3467 /* kandd */, X86::KANDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23535 { 3473 /* kandnb */, X86::KANDNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23536 { 3480 /* kandnd */, X86::KANDNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23537 { 3487 /* kandnq */, X86::KANDNQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23538 { 3494 /* kandnw */, X86::KANDNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23539 { 3501 /* kandq */, X86::KANDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23540 { 3507 /* kandw */, X86::KANDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23541 { 3513 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23542 { 3513 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, }, 23543 { 3513 /* kmovb */, X86::KMOVBkm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VK1, MCK_Mem8 }, }, 23544 { 3513 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, }, 23545 { 3513 /* kmovb */, X86::KMOVBmk, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_VK1 }, }, 23546 { 3519 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23547 { 3519 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, }, 23548 { 3519 /* kmovd */, X86::KMOVDkm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VK1, MCK_Mem32 }, }, 23549 { 3519 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, }, 23550 { 3519 /* kmovd */, X86::KMOVDmk, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VK1 }, }, 23551 { 3525 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23552 { 3525 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR64 }, }, 23553 { 3525 /* kmovq */, X86::KMOVQkm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VK1, MCK_Mem64 }, }, 23554 { 3525 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VK1 }, }, 23555 { 3525 /* kmovq */, X86::KMOVQmk, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VK1 }, }, 23556 { 3531 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23557 { 3531 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, }, 23558 { 3531 /* kmovw */, X86::KMOVWkm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VK1, MCK_Mem16 }, }, 23559 { 3531 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, }, 23560 { 3531 /* kmovw */, X86::KMOVWmk, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_VK1 }, }, 23561 { 3537 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23562 { 3543 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23563 { 3549 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23564 { 3555 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23565 { 3561 /* korb */, X86::KORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23566 { 3566 /* kord */, X86::KORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23567 { 3571 /* korq */, X86::KORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23568 { 3576 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23569 { 3585 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23570 { 3594 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23571 { 3603 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23572 { 3612 /* korw */, X86::KORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23573 { 3617 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23574 { 3626 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23575 { 3635 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23576 { 3644 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23577 { 3653 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23578 { 3662 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23579 { 3671 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23580 { 3680 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, }, 23581 { 3689 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23582 { 3696 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23583 { 3703 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23584 { 3710 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, }, 23585 { 3717 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23586 { 3726 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23587 { 3735 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23588 { 3744 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23589 { 3751 /* kxnord */, X86::KXNORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23590 { 3758 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23591 { 3765 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23592 { 3772 /* kxorb */, X86::KXORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23593 { 3778 /* kxord */, X86::KXORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23594 { 3784 /* kxorq */, X86::KXORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23595 { 3790 /* kxorw */, X86::KXORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, }, 23596 { 3796 /* lahf */, X86::LAHF, Convert_NoOperands, AMFBS_None, { }, }, 23597 { 3801 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23598 { 3801 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23599 { 3801 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23600 { 3801 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, }, 23601 { 3801 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR32 }, }, 23602 { 3801 /* lar */, X86::LAR64rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, }, 23603 { 3820 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, AMFBS_Not16BitMode, { MCK_Mem }, }, 23604 { 3820 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, AMFBS_In16BitMode, { MCK_Mem }, }, 23605 { 3820 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 23606 { 3820 /* lcall */, X86::FARCALL64, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 23607 { 3820 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 23608 { 3820 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 23609 { 3847 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23610 { 3853 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23611 { 3861 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem }, }, 23612 { 3861 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, }, 23613 { 3875 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, }, 23614 { 3875 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, }, 23615 { 3875 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_GR32, MCK_Mem }, }, 23616 { 3875 /* lea */, X86::LEA64r, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, }, 23617 { 3889 /* leave */, X86::LEAVE, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 23618 { 3889 /* leave */, X86::LEAVE64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 23619 { 3900 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem }, }, 23620 { 3900 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, }, 23621 { 3914 /* lfence */, X86::LFENCE, Convert_NoOperands, AMFBS_None, { }, }, 23622 { 3921 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, }, 23623 { 3921 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, }, 23624 { 3921 /* lfs */, X86::LFS64rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, }, 23625 { 3940 /* lgdt */, X86::LGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 23626 { 3945 /* lgdtd */, X86::LGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 23627 { 3963 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 23628 { 3969 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, }, 23629 { 3969 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, }, 23630 { 3969 /* lgs */, X86::LGS64rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, }, 23631 { 3988 /* lidt */, X86::LIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 23632 { 3993 /* lidtd */, X86::LIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 23633 { 4011 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 23634 { 4017 /* ljmp */, X86::FARJMP64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 23635 { 4017 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, AMFBS_Not16BitMode, { MCK_Mem }, }, 23636 { 4017 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, AMFBS_In16BitMode, { MCK_Mem }, }, 23637 { 4017 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, }, 23638 { 4017 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, }, 23639 { 4040 /* lldt */, X86::LLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23640 { 4040 /* lldt */, X86::LLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23641 { 4051 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23642 { 4051 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 23643 { 4058 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23644 { 4058 /* lmsw */, X86::LMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23645 { 4069 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 23646 { 4074 /* lods */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16 }, }, 23647 { 4074 /* lods */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32 }, }, 23648 { 4074 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64 }, }, 23649 { 4074 /* lods */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8 }, }, 23650 { 4074 /* lods */, X86::LODSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_AL, MCK_SrcIdx8 }, }, 23651 { 4074 /* lods */, X86::LODSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_AX, MCK_SrcIdx16 }, }, 23652 { 4074 /* lods */, X86::LODSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_EAX, MCK_SrcIdx32 }, }, 23653 { 4074 /* lods */, X86::LODSQ, Convert__SrcIdx642_1, AMFBS_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, }, 23654 { 4079 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8 }, }, 23655 { 4079 /* lodsb */, X86::LODSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_AL, MCK_SrcIdx8 }, }, 23656 { 4085 /* lodsd */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32 }, }, 23657 { 4085 /* lodsd */, X86::LODSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_EAX, MCK_SrcIdx32 }, }, 23658 { 4097 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64 }, }, 23659 { 4097 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_1, AMFBS_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, }, 23660 { 4103 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16 }, }, 23661 { 4103 /* lodsw */, X86::LODSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_AX, MCK_SrcIdx16 }, }, 23662 { 4109 /* loop */, X86::LOOP, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 23663 { 4114 /* loope */, X86::LOOPE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 23664 { 4120 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 23665 { 4145 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23666 { 4145 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23667 { 4145 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23668 { 4145 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, }, 23669 { 4145 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR32 }, }, 23670 { 4145 /* lsl */, X86::LSL64rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, }, 23671 { 4164 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, }, 23672 { 4164 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, }, 23673 { 4164 /* lss */, X86::LSS64rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, }, 23674 { 4183 /* ltr */, X86::LTRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23675 { 4183 /* ltr */, X86::LTRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23676 { 4192 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, }, 23677 { 4192 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, }, 23678 { 4192 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_GR32, MCK_Imm }, }, 23679 { 4192 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_Mem32, MCK_Imm }, }, 23680 { 4199 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, }, 23681 { 4199 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, }, 23682 { 4199 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_GR32, MCK_Imm }, }, 23683 { 4199 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_Mem32, MCK_Imm }, }, 23684 { 4206 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23685 { 4206 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23686 { 4206 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23687 { 4206 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23688 { 4206 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23689 { 4206 /* lzcnt */, X86::LZCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23690 { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, }, 23691 { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, }, 23692 { 4244 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_VR64, MCK_VR64 }, }, 23693 { 4244 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_VR64, MCK_VR64 }, }, 23694 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23695 { 4253 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23696 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23697 { 4259 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23698 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23699 { 4265 /* maxsd */, X86::MAXSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23700 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23701 { 4271 /* maxss */, X86::MAXSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23702 { 4277 /* mfence */, X86::MFENCE, Convert_NoOperands, AMFBS_None, { }, }, 23703 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23704 { 4284 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23705 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23706 { 4290 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23707 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23708 { 4296 /* minsd */, X86::MINSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23709 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23710 { 4302 /* minss */, X86::MINSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23711 { 4308 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 23712 { 4308 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 23713 { 4308 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, }, 23714 { 4308 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, }, 23715 { 4316 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 23716 { 4316 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 23717 { 4316 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, }, 23718 { 4316 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, }, 23719 { 4325 /* montmul */, X86::MONTMUL, Convert_NoOperands, AMFBS_None, { }, }, 23720 { 4333 /* mov */, X86::MOV8ao16, Convert__MemOffs16_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs16_8 }, }, 23721 { 4333 /* mov */, X86::MOV8ao32, Convert__MemOffs32_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs32_8 }, }, 23722 { 4333 /* mov */, X86::MOV16ao16, Convert__MemOffs16_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs16_16 }, }, 23723 { 4333 /* mov */, X86::MOV16ao32, Convert__MemOffs32_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs32_16 }, }, 23724 { 4333 /* mov */, X86::MOV32ao16, Convert__MemOffs16_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs16_32 }, }, 23725 { 4333 /* mov */, X86::MOV32ao32, Convert__MemOffs32_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs32_32 }, }, 23726 { 4333 /* mov */, X86::MOV64ao32, Convert__MemOffs32_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs32_64 }, }, 23727 { 4333 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, }, 23728 { 4333 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, }, 23729 { 4333 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR64 }, }, 23730 { 4333 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_Mem16 }, }, 23731 { 4333 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, }, 23732 { 4333 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, }, 23733 { 4333 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, }, 23734 { 4333 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, }, 23735 { 4333 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, }, 23736 { 4333 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23737 { 4333 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 23738 { 4333 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23739 { 4333 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, }, 23740 { 4333 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, }, 23741 { 4333 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, }, 23742 { 4333 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23743 { 4333 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 23744 { 4333 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23745 { 4333 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_SEGMENT_REG }, }, 23746 { 4333 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, }, 23747 { 4333 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, }, 23748 { 4333 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23749 { 4333 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 23750 { 4333 /* mov */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR64, MCK_Imm }, }, 23751 { 4333 /* mov */, X86::MOV64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23752 { 4333 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 23753 { 4333 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 23754 { 4333 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 23755 { 4333 /* mov */, X86::MOV16o16a, Convert__MemOffs16_162_0, AMFBS_None, { MCK_MemOffs16_16, MCK_AX }, }, 23756 { 4333 /* mov */, X86::MOV32o16a, Convert__MemOffs16_322_0, AMFBS_None, { MCK_MemOffs16_32, MCK_EAX }, }, 23757 { 4333 /* mov */, X86::MOV8o16a, Convert__MemOffs16_82_0, AMFBS_None, { MCK_MemOffs16_8, MCK_AL }, }, 23758 { 4333 /* mov */, X86::MOV16o32a, Convert__MemOffs32_162_0, AMFBS_None, { MCK_MemOffs32_16, MCK_AX }, }, 23759 { 4333 /* mov */, X86::MOV32o32a, Convert__MemOffs32_322_0, AMFBS_None, { MCK_MemOffs32_32, MCK_EAX }, }, 23760 { 4333 /* mov */, X86::MOV64o32a, Convert__MemOffs32_642_0, AMFBS_None, { MCK_MemOffs32_64, MCK_RAX }, }, 23761 { 4333 /* mov */, X86::MOV8o32a, Convert__MemOffs32_82_0, AMFBS_None, { MCK_MemOffs32_8, MCK_AL }, }, 23762 { 4333 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_SEGMENT_REG }, }, 23763 { 4333 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 23764 { 4333 /* mov */, X86::MOV16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 23765 { 4333 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23766 { 4333 /* mov */, X86::MOV32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 23767 { 4333 /* mov */, X86::MOV64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 23768 { 4333 /* mov */, X86::MOV64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 23769 { 4333 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 23770 { 4333 /* mov */, X86::MOV8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 23771 { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23772 { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23773 { 4337 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23774 { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 23775 { 4343 /* movabs */, X86::MOV8ao64, Convert__MemOffs64_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs64_8 }, }, 23776 { 4343 /* movabs */, X86::MOV16ao64, Convert__MemOffs64_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs64_16 }, }, 23777 { 4343 /* movabs */, X86::MOV32ao64, Convert__MemOffs64_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs64_32 }, }, 23778 { 4343 /* movabs */, X86::MOV64ao64, Convert__MemOffs64_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs64_64 }, }, 23779 { 4343 /* movabs */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR64, MCK_Imm }, }, 23780 { 4343 /* movabs */, X86::MOV16o64a, Convert__MemOffs64_162_0, AMFBS_None, { MCK_MemOffs64_16, MCK_AX }, }, 23781 { 4343 /* movabs */, X86::MOV32o64a, Convert__MemOffs64_322_0, AMFBS_None, { MCK_MemOffs64_32, MCK_EAX }, }, 23782 { 4343 /* movabs */, X86::MOV64o64a, Convert__MemOffs64_642_0, AMFBS_None, { MCK_MemOffs64_64, MCK_RAX }, }, 23783 { 4343 /* movabs */, X86::MOV8o64a, Convert__MemOffs64_82_0, AMFBS_None, { MCK_MemOffs64_8, MCK_AL }, }, 23784 { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23785 { 4382 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23786 { 4382 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23787 { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23788 { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23789 { 4398 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23790 { 4398 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23791 { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23792 { 4426 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23793 { 4426 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23794 { 4426 /* movbe */, X86::MOVBE64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23795 { 4426 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 23796 { 4426 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23797 { 4426 /* movbe */, X86::MOVBE64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 23798 { 4453 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR32 }, }, 23799 { 4453 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR64 }, }, 23800 { 4453 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, }, 23801 { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 23802 { 4453 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 23803 { 4453 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23804 { 4453 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VR64 }, }, 23805 { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 23806 { 4453 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VR64 }, }, 23807 { 4453 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 23808 { 4453 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR64 }, }, 23809 { 4453 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 23810 { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23811 { 4458 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23812 { 4466 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, }, 23813 { 4466 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, }, 23814 { 4466 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_0__Mem5125_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem512 }, }, 23815 { 4476 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23816 { 4476 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_0__Reg1_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_GR64 }, }, 23817 { 4484 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, }, 23818 { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23819 { 4492 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23820 { 4492 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23821 { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23822 { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23823 { 4508 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23824 { 4508 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23825 { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23826 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23827 { 4532 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23828 { 4532 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23829 { 4539 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23830 { 4539 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23831 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23832 { 4566 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23833 { 4566 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23834 { 4573 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23835 { 4573 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23836 { 4580 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, }, 23837 { 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, }, 23838 { 4598 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23839 { 4606 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23840 { 4615 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23841 { 4615 /* movnti */, X86::MOVNTI_64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 23842 { 4638 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23843 { 4646 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23844 { 4654 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 23845 { 4661 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23846 { 4669 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 23847 { 4677 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 23848 { 4677 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR64 }, }, 23849 { 4677 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 23850 { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23851 { 4677 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 23852 { 4677 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23853 { 4677 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VR64 }, }, 23854 { 4677 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 23855 { 4677 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR64 }, }, 23856 { 4677 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23857 { 4682 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 23858 { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23859 { 4689 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, }, 23860 { 4697 /* movs */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, AMFBS_None, { MCK_DstIdx16, MCK_SrcIdx16 }, }, 23861 { 4697 /* movs */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, AMFBS_None, { MCK_DstIdx32, MCK_SrcIdx32 }, }, 23862 { 4697 /* movs */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, }, 23863 { 4697 /* movs */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, AMFBS_None, { MCK_DstIdx8, MCK_SrcIdx8 }, }, 23864 { 4702 /* movsb */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, AMFBS_None, { MCK_DstIdx8, MCK_SrcIdx8 }, }, 23865 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23866 { 4729 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23867 { 4729 /* movsd */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, AMFBS_None, { MCK_DstIdx32, MCK_SrcIdx32 }, }, 23868 { 4729 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 23869 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23870 { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23871 { 4743 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23872 { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23873 { 4758 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23874 { 4774 /* movsq */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, }, 23875 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23876 { 4780 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23877 { 4780 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 23878 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23879 { 4794 /* movsw */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, AMFBS_None, { MCK_DstIdx16, MCK_SrcIdx16 }, }, 23880 { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, }, 23881 { 4814 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR16, MCK_Mem8 }, }, 23882 { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, }, 23883 { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, }, 23884 { 4814 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, }, 23885 { 4814 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, }, 23886 { 4814 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, }, 23887 { 4814 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, }, 23888 { 4814 /* movsx */, X86::MOVSX64rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, }, 23889 { 4814 /* movsx */, X86::MOVSX64rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR64, MCK_Mem8 }, }, 23890 { 4820 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR32 }, }, 23891 { 4820 /* movsxd */, X86::MOVSX64rm32, Convert__Reg1_0__Mem325_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem32 }, }, 23892 { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23893 { 4827 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23894 { 4827 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23895 { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23896 { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23897 { 4843 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23898 { 4843 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 23899 { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23900 { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, }, 23901 { 4906 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR16, MCK_Mem8 }, }, 23902 { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, }, 23903 { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, }, 23904 { 4906 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, }, 23905 { 4906 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, }, 23906 { 4906 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, }, 23907 { 4906 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, }, 23908 { 4906 /* movzx */, X86::MOVZX64rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, }, 23909 { 4906 /* movzx */, X86::MOVZX64rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR64, MCK_Mem8 }, }, 23910 { 4912 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 23911 { 4912 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 23912 { 4920 /* mul */, X86::MUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23913 { 4920 /* mul */, X86::MUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23914 { 4920 /* mul */, X86::MUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 23915 { 4920 /* mul */, X86::MUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, }, 23916 { 4920 /* mul */, X86::MUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23917 { 4920 /* mul */, X86::MUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23918 { 4920 /* mul */, X86::MUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23919 { 4920 /* mul */, X86::MUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23920 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23921 { 4934 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23922 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23923 { 4940 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23924 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23925 { 4951 /* mulsd */, X86::MULSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 23926 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23927 { 4957 /* mulss */, X86::MULSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 23928 { 4968 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 23929 { 4968 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, }, 23930 { 4968 /* mulx */, X86::MULX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 23931 { 4968 /* mulx */, X86::MULX64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, }, 23932 { 4985 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_None, { }, }, 23933 { 4985 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ECX, MCK_EAX }, }, 23934 { 4985 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RCX, MCK_RAX }, }, 23935 { 4991 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_None, { }, }, 23936 { 4991 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EBX, MCK_ECX, MCK_EAX }, }, 23937 { 4991 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RBX, MCK_RCX, MCK_RAX }, }, 23938 { 4998 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 23939 { 4998 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 23940 { 4998 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 23941 { 4998 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 23942 { 4998 /* neg */, X86::NEG16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23943 { 4998 /* neg */, X86::NEG32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23944 { 4998 /* neg */, X86::NEG64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23945 { 4998 /* neg */, X86::NEG8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23946 { 5022 /* nop */, X86::NOOP, Convert_NoOperands, AMFBS_None, { }, }, 23947 { 5022 /* nop */, X86::NOOPWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 23948 { 5022 /* nop */, X86::NOOPLr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 23949 { 5022 /* nop */, X86::NOOPQr, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 23950 { 5022 /* nop */, X86::NOOPW, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23951 { 5022 /* nop */, X86::NOOPL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23952 { 5022 /* nop */, X86::NOOPQ, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23953 { 5041 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 23954 { 5041 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 23955 { 5041 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 23956 { 5041 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 23957 { 5041 /* not */, X86::NOT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 23958 { 5041 /* not */, X86::NOT32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 23959 { 5041 /* not */, X86::NOT64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 23960 { 5041 /* not */, X86::NOT8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 23961 { 5065 /* or */, X86::OR8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 23962 { 5065 /* or */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 23963 { 5065 /* or */, X86::OR16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 23964 { 5065 /* or */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 23965 { 5065 /* or */, X86::OR32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 23966 { 5065 /* or */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 23967 { 5065 /* or */, X86::OR64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 23968 { 5065 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 23969 { 5065 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 23970 { 5065 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 23971 { 5065 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 23972 { 5065 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 23973 { 5065 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 23974 { 5065 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 23975 { 5065 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 23976 { 5065 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 23977 { 5065 /* or */, X86::OR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 23978 { 5065 /* or */, X86::OR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 23979 { 5065 /* or */, X86::OR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 23980 { 5065 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 23981 { 5065 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 23982 { 5065 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 23983 { 5065 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 23984 { 5065 /* or */, X86::OR16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 23985 { 5065 /* or */, X86::OR16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 23986 { 5065 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 23987 { 5065 /* or */, X86::OR32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 23988 { 5065 /* or */, X86::OR32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 23989 { 5065 /* or */, X86::OR64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 23990 { 5065 /* or */, X86::OR64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 23991 { 5065 /* or */, X86::OR64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 23992 { 5065 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 23993 { 5065 /* or */, X86::OR8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 23994 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23995 { 5076 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23996 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 23997 { 5081 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 23998 { 5094 /* out */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AL }, }, 23999 { 5094 /* out */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AX }, }, 24000 { 5094 /* out */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_EAX }, }, 24001 { 5094 /* out */, X86::OUT8ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AL }, }, 24002 { 5094 /* out */, X86::OUT16ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AX }, }, 24003 { 5094 /* out */, X86::OUT32ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_EAX }, }, 24004 { 5098 /* outb */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 24005 { 5098 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 24006 { 5103 /* outl */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 24007 { 5103 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 24008 { 5108 /* outs */, X86::OUTSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_DX, MCK_SrcIdx16 }, }, 24009 { 5108 /* outs */, X86::OUTSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_DX, MCK_SrcIdx32 }, }, 24010 { 5108 /* outs */, X86::OUTSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_DX, MCK_SrcIdx8 }, }, 24011 { 5113 /* outsb */, X86::OUTSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_DX, MCK_SrcIdx8 }, }, 24012 { 5119 /* outsd */, X86::OUTSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_DX, MCK_SrcIdx32 }, }, 24013 { 5131 /* outsw */, X86::OUTSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_DX, MCK_SrcIdx16 }, }, 24014 { 5137 /* outw */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, }, 24015 { 5137 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, }, 24016 { 5142 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24017 { 5142 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24018 { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24019 { 5142 /* pabsb */, X86::PABSBrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24020 { 5148 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24021 { 5148 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24022 { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24023 { 5148 /* pabsd */, X86::PABSDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24024 { 5154 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24025 { 5154 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24026 { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24027 { 5154 /* pabsw */, X86::PABSWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24028 { 5160 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24029 { 5160 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24030 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24031 { 5160 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24032 { 5169 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24033 { 5169 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24034 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24035 { 5169 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24036 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24037 { 5178 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24038 { 5187 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24039 { 5187 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24040 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24041 { 5187 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24042 { 5196 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24043 { 5196 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24044 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24045 { 5196 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24046 { 5202 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24047 { 5202 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24048 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24049 { 5202 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24050 { 5208 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24051 { 5208 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24052 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24053 { 5208 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24054 { 5214 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24055 { 5214 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24056 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24057 { 5214 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24058 { 5221 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24059 { 5221 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24060 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24061 { 5221 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24062 { 5228 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24063 { 5228 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24064 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24065 { 5228 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24066 { 5236 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24067 { 5236 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24068 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24069 { 5236 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24070 { 5244 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24071 { 5244 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24072 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24073 { 5244 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24074 { 5250 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, }, 24075 { 5250 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24076 { 5250 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24077 { 5250 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24078 { 5258 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24079 { 5258 /* pand */, X86::MMX_PANDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24080 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24081 { 5258 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24082 { 5263 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24083 { 5263 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24084 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24085 { 5263 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24086 { 5269 /* pause */, X86::PAUSE, Convert_NoOperands, AMFBS_None, { }, }, 24087 { 5275 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24088 { 5275 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24089 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24090 { 5275 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24091 { 5281 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24092 { 5281 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24093 { 5289 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24094 { 5289 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24095 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24096 { 5289 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24097 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24098 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24099 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, }, 24100 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, }, 24101 { 5304 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24102 { 5304 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24103 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24104 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24105 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24106 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24107 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24108 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24109 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24110 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24111 { 5364 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24112 { 5364 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24113 { 5374 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24114 { 5374 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24115 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24116 { 5374 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24117 { 5382 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24118 { 5382 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24119 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24120 { 5382 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24121 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24122 { 5390 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24123 { 5398 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24124 { 5398 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24125 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24126 { 5398 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24127 { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24128 { 5406 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24129 { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24130 { 5416 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24131 { 5426 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24132 { 5426 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24133 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24134 { 5426 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24135 { 5434 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24136 { 5434 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24137 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24138 { 5434 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24139 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24140 { 5442 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24141 { 5450 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24142 { 5450 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24143 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24144 { 5450 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24145 { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24146 { 5458 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24147 { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24148 { 5468 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24149 { 5478 /* pconfig */, X86::PCONFIG, Convert_NoOperands, AMFBS_None, { }, }, 24150 { 5486 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 24151 { 5486 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, }, 24152 { 5486 /* pdep */, X86::PDEP64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 24153 { 5486 /* pdep */, X86::PDEP64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, }, 24154 { 5503 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 24155 { 5503 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, }, 24156 { 5503 /* pext */, X86::PEXT64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 24157 { 5503 /* pext */, X86::PEXT64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, }, 24158 { 5520 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24159 { 5520 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24160 { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24161 { 5527 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24162 { 5534 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24163 { 5534 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24164 { 5541 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, }, 24165 { 5541 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24166 { 5541 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24167 { 5548 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24168 { 5548 /* pf2id */, X86::PF2IDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24169 { 5554 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24170 { 5554 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24171 { 5560 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24172 { 5560 /* pfacc */, X86::PFACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24173 { 5566 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24174 { 5566 /* pfadd */, X86::PFADDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24175 { 5572 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24176 { 5572 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24177 { 5580 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24178 { 5580 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24179 { 5588 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24180 { 5588 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24181 { 5596 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24182 { 5596 /* pfmax */, X86::PFMAXrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24183 { 5602 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24184 { 5602 /* pfmin */, X86::PFMINrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24185 { 5608 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24186 { 5608 /* pfmul */, X86::PFMULrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24187 { 5614 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24188 { 5614 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24189 { 5621 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24190 { 5621 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24191 { 5629 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24192 { 5629 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24193 { 5635 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24194 { 5635 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24195 { 5644 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24196 { 5644 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24197 { 5653 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24198 { 5653 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24199 { 5662 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24200 { 5662 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24201 { 5670 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24202 { 5670 /* pfsub */, X86::PFSUBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24203 { 5676 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24204 { 5676 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24205 { 5683 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24206 { 5683 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24207 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24208 { 5683 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24209 { 5690 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24210 { 5690 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24211 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24212 { 5690 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24213 { 5698 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24214 { 5698 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24215 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24216 { 5698 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24217 { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24218 { 5705 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24219 { 5716 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24220 { 5716 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24221 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24222 { 5716 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24223 { 5723 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24224 { 5723 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24225 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24226 { 5723 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24227 { 5731 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24228 { 5731 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24229 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24230 { 5731 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24231 { 5738 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24232 { 5738 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24233 { 5744 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24234 { 5744 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24235 { 5750 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 24236 { 5750 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24237 { 5757 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 24238 { 5757 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24239 { 5764 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, }, 24240 { 5764 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24241 { 5771 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 24242 { 5771 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24243 { 5771 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 24244 { 5771 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24245 { 5778 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24246 { 5778 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24247 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24248 { 5778 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24249 { 5788 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24250 { 5788 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24251 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24252 { 5788 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24253 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24254 { 5796 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24255 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24256 { 5803 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24257 { 5810 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24258 { 5810 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24259 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24260 { 5810 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24261 { 5817 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24262 { 5817 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24263 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24264 { 5817 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24265 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24266 { 5824 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24267 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24268 { 5831 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24269 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24270 { 5838 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24271 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24272 { 5845 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24273 { 5852 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24274 { 5852 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24275 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24276 { 5852 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24277 { 5859 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24278 { 5859 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24279 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24280 { 5859 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24281 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24282 { 5866 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24283 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24284 { 5873 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24285 { 5880 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR64 }, }, 24286 { 5880 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, }, 24287 { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24288 { 5889 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24289 { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24290 { 5898 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, }, 24291 { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24292 { 5907 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24293 { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24294 { 5916 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24295 { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24296 { 5925 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24297 { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24298 { 5934 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24299 { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24300 { 5943 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24301 { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24302 { 5952 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, }, 24303 { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24304 { 5961 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24305 { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24306 { 5970 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24307 { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24308 { 5979 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24309 { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24310 { 5988 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24311 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24312 { 5997 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24313 { 6004 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24314 { 6004 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24315 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24316 { 6004 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24317 { 6013 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24318 { 6013 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24319 { 6021 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24320 { 6021 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24321 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24322 { 6021 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24323 { 6029 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24324 { 6029 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24325 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24326 { 6029 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24327 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24328 { 6036 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24329 { 6043 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24330 { 6043 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24331 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24332 { 6043 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24333 { 6050 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24334 { 6050 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24335 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24336 { 6050 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24337 { 6058 /* pop */, X86::POPDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 24338 { 6058 /* pop */, X86::POPDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 24339 { 6058 /* pop */, X86::POPES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 24340 { 6058 /* pop */, X86::POPES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 24341 { 6058 /* pop */, X86::POPFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, }, 24342 { 6058 /* pop */, X86::POPFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, }, 24343 { 6058 /* pop */, X86::POPFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, }, 24344 { 6058 /* pop */, X86::POPGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, }, 24345 { 6058 /* pop */, X86::POPGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, }, 24346 { 6058 /* pop */, X86::POPGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, }, 24347 { 6058 /* pop */, X86::POPSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 24348 { 6058 /* pop */, X86::POPSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 24349 { 6058 /* pop */, X86::POP16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24350 { 6058 /* pop */, X86::POP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 24351 { 6058 /* pop */, X86::POP64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24352 { 6058 /* pop */, X86::POP16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24353 { 6058 /* pop */, X86::POP32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, }, 24354 { 6058 /* pop */, X86::POP64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24355 { 6062 /* popal */, X86::POPA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24356 { 6068 /* popaw */, X86::POPA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24357 { 6074 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 24358 { 6074 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 24359 { 6074 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 24360 { 6074 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 24361 { 6074 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 24362 { 6074 /* popcnt */, X86::POPCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 24363 { 6105 /* popf */, X86::POPF16, Convert_NoOperands, AMFBS_None, { }, }, 24364 { 6110 /* popfd */, X86::POPF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24365 { 6122 /* popfq */, X86::POPF64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 24366 { 6149 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24367 { 6149 /* por */, X86::MMX_PORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24368 { 6149 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24369 { 6149 /* por */, X86::PORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24370 { 6153 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24371 { 6162 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24372 { 6174 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24373 { 6185 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24374 { 6196 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24375 { 6207 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24376 { 6217 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24377 { 6229 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24378 { 6229 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24379 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24380 { 6229 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24381 { 6236 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24382 { 6236 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24383 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24384 { 6236 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24385 { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24386 { 6243 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24387 { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24388 { 6250 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24389 { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24390 { 6258 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24391 { 6266 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, }, 24392 { 6266 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24393 { 6273 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24394 { 6273 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24395 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24396 { 6273 /* psignb */, X86::PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24397 { 6280 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24398 { 6280 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24399 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24400 { 6280 /* psignd */, X86::PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24401 { 6287 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24402 { 6287 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24403 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24404 { 6287 /* psignw */, X86::PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24405 { 6294 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24406 { 6294 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24407 { 6294 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24408 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24409 { 6294 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24410 { 6294 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24411 { 6300 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24412 { 6307 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24413 { 6307 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24414 { 6307 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24415 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24416 { 6307 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24417 { 6307 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24418 { 6313 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24419 { 6313 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24420 { 6313 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24421 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24422 { 6313 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24423 { 6313 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24424 { 6319 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24425 { 6319 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24426 { 6319 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24427 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24428 { 6319 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24429 { 6319 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24430 { 6325 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24431 { 6325 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24432 { 6325 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24433 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24434 { 6325 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24435 { 6325 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24436 { 6331 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24437 { 6331 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24438 { 6331 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24439 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24440 { 6331 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24441 { 6331 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24442 { 6337 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24443 { 6344 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24444 { 6344 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24445 { 6344 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24446 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24447 { 6344 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24448 { 6344 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24449 { 6350 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24450 { 6350 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, }, 24451 { 6350 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24452 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24453 { 6350 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, }, 24454 { 6350 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24455 { 6356 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24456 { 6356 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24457 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24458 { 6356 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24459 { 6362 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24460 { 6362 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24461 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24462 { 6362 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24463 { 6368 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24464 { 6368 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24465 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24466 { 6368 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24467 { 6374 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24468 { 6374 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24469 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24470 { 6374 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24471 { 6381 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24472 { 6381 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24473 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24474 { 6381 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24475 { 6388 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24476 { 6388 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24477 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24478 { 6388 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24479 { 6396 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24480 { 6396 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24481 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24482 { 6396 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24483 { 6404 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24484 { 6404 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24485 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24486 { 6404 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24487 { 6410 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24488 { 6410 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24489 { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24490 { 6417 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24491 { 6423 /* ptwrite */, X86::PTWRITEr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24492 { 6423 /* ptwrite */, X86::PTWRITE64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24493 { 6423 /* ptwrite */, X86::PTWRITEm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24494 { 6423 /* ptwrite */, X86::PTWRITE64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24495 { 6449 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24496 { 6449 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24497 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24498 { 6449 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24499 { 6459 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24500 { 6459 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24501 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24502 { 6459 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24503 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24504 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24505 { 6480 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24506 { 6480 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24507 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24508 { 6480 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24509 { 6490 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24510 { 6490 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, }, 24511 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24512 { 6490 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24513 { 6500 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24514 { 6500 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, }, 24515 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24516 { 6500 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24517 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24518 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24519 { 6521 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24520 { 6521 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, }, 24521 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24522 { 6521 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24523 { 6531 /* push */, X86::PUSHCS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, }, 24524 { 6531 /* push */, X86::PUSHCS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, }, 24525 { 6531 /* push */, X86::PUSHDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 24526 { 6531 /* push */, X86::PUSHDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, }, 24527 { 6531 /* push */, X86::PUSHES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 24528 { 6531 /* push */, X86::PUSHES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, }, 24529 { 6531 /* push */, X86::PUSHFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, }, 24530 { 6531 /* push */, X86::PUSHFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, }, 24531 { 6531 /* push */, X86::PUSHFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, }, 24532 { 6531 /* push */, X86::PUSHGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, }, 24533 { 6531 /* push */, X86::PUSHGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, }, 24534 { 6531 /* push */, X86::PUSHGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, }, 24535 { 6531 /* push */, X86::PUSHSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 24536 { 6531 /* push */, X86::PUSHSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, }, 24537 { 6531 /* push */, X86::PUSH16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24538 { 6531 /* push */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 24539 { 6531 /* push */, X86::PUSH64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24540 { 6531 /* push */, X86::PUSH64i8, Convert__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8 }, }, 24541 { 6531 /* push */, X86::PUSH16i8, Convert__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8 }, }, 24542 { 6531 /* push */, X86::PUSH32i8, Convert__ImmSExti32i81_0, AMFBS_Not64BitMode, { MCK_ImmSExti32i8 }, }, 24543 { 6531 /* push */, X86::PUSH64i32, Convert__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32 }, }, 24544 { 6531 /* push */, X86::PUSHi32, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 24545 { 6531 /* push */, X86::PUSHi16, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 24546 { 6531 /* push */, X86::PUSH16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24547 { 6531 /* push */, X86::PUSH32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, }, 24548 { 6531 /* push */, X86::PUSH64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24549 { 6536 /* pushal */, X86::PUSHA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24550 { 6543 /* pushaw */, X86::PUSHA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24551 { 6550 /* pushf */, X86::PUSHF16, Convert_NoOperands, AMFBS_None, { }, }, 24552 { 6556 /* pushfd */, X86::PUSHF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24553 { 6570 /* pushfq */, X86::PUSHF64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 24554 { 6602 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, }, 24555 { 6602 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, }, 24556 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24557 { 6602 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24558 { 6607 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24559 { 6607 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24560 { 6607 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24561 { 6607 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24562 { 6607 /* rcl */, X86::RCL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24563 { 6607 /* rcl */, X86::RCL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24564 { 6607 /* rcl */, X86::RCL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24565 { 6607 /* rcl */, X86::RCL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24566 { 6607 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24567 { 6607 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24568 { 6607 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24569 { 6607 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24570 { 6607 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24571 { 6607 /* rcl */, X86::RCL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24572 { 6607 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24573 { 6607 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24574 { 6607 /* rcl */, X86::RCL16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24575 { 6607 /* rcl */, X86::RCL16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24576 { 6607 /* rcl */, X86::RCL32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24577 { 6607 /* rcl */, X86::RCL32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24578 { 6607 /* rcl */, X86::RCL64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24579 { 6607 /* rcl */, X86::RCL64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24580 { 6607 /* rcl */, X86::RCL8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24581 { 6607 /* rcl */, X86::RCL8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24582 { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24583 { 6631 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24584 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24585 { 6637 /* rcpss */, X86::RCPSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24586 { 6643 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24587 { 6643 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24588 { 6643 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24589 { 6643 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24590 { 6643 /* rcr */, X86::RCR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24591 { 6643 /* rcr */, X86::RCR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24592 { 6643 /* rcr */, X86::RCR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24593 { 6643 /* rcr */, X86::RCR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24594 { 6643 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24595 { 6643 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24596 { 6643 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24597 { 6643 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24598 { 6643 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24599 { 6643 /* rcr */, X86::RCR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24600 { 6643 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24601 { 6643 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24602 { 6643 /* rcr */, X86::RCR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24603 { 6643 /* rcr */, X86::RCR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24604 { 6643 /* rcr */, X86::RCR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24605 { 6643 /* rcr */, X86::RCR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24606 { 6643 /* rcr */, X86::RCR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24607 { 6643 /* rcr */, X86::RCR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24608 { 6643 /* rcr */, X86::RCR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24609 { 6643 /* rcr */, X86::RCR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24610 { 6667 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 24611 { 6667 /* rdfsbase */, X86::RDFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24612 { 6696 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 24613 { 6696 /* rdgsbase */, X86::RDGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24614 { 6725 /* rdmsr */, X86::RDMSR, Convert_NoOperands, AMFBS_None, { }, }, 24615 { 6731 /* rdpid */, X86::RDPID32, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, }, 24616 { 6731 /* rdpid */, X86::RDPID64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24617 { 6737 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, AMFBS_None, { }, }, 24618 { 6744 /* rdpmc */, X86::RDPMC, Convert_NoOperands, AMFBS_None, { }, }, 24619 { 6750 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24620 { 6750 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24621 { 6750 /* rdrand */, X86::RDRAND64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 24622 { 6781 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24623 { 6781 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24624 { 6781 /* rdseed */, X86::RDSEED64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 24625 { 6812 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24626 { 6819 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24627 { 6826 /* rdtsc */, X86::RDTSC, Convert_NoOperands, AMFBS_None, { }, }, 24628 { 6832 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, AMFBS_None, { }, }, 24629 { 6839 /* rep */, X86::REP_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 24630 { 6843 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 24631 { 6849 /* ret */, X86::RETL, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24632 { 6849 /* ret */, X86::RETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 24633 { 6849 /* ret */, X86::RETW, Convert_NoOperands, AMFBS_None, { }, }, 24634 { 6849 /* ret */, X86::RETIL, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, }, 24635 { 6849 /* ret */, X86::RETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, }, 24636 { 6849 /* ret */, X86::RETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 24637 { 6853 /* retf */, X86::LRETL, Convert_NoOperands, AMFBS_None, { }, }, 24638 { 6853 /* retf */, X86::LRETW, Convert_NoOperands, AMFBS_None, { }, }, 24639 { 6853 /* retf */, X86::LRETIL, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 24640 { 6853 /* retf */, X86::LRETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 24641 { 6858 /* retfq */, X86::LRETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 24642 { 6858 /* retfq */, X86::LRETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, }, 24643 { 6879 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 24644 { 6885 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24645 { 6885 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24646 { 6885 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24647 { 6885 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24648 { 6885 /* rol */, X86::ROL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24649 { 6885 /* rol */, X86::ROL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24650 { 6885 /* rol */, X86::ROL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24651 { 6885 /* rol */, X86::ROL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24652 { 6885 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24653 { 6885 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24654 { 6885 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24655 { 6885 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24656 { 6885 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24657 { 6885 /* rol */, X86::ROL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24658 { 6885 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24659 { 6885 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24660 { 6885 /* rol */, X86::ROL16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24661 { 6885 /* rol */, X86::ROL16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24662 { 6885 /* rol */, X86::ROL32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24663 { 6885 /* rol */, X86::ROL32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24664 { 6885 /* rol */, X86::ROL64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24665 { 6885 /* rol */, X86::ROL64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24666 { 6885 /* rol */, X86::ROL8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24667 { 6885 /* rol */, X86::ROL8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24668 { 6909 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24669 { 6909 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24670 { 6909 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24671 { 6909 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24672 { 6909 /* ror */, X86::ROR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24673 { 6909 /* ror */, X86::ROR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24674 { 6909 /* ror */, X86::ROR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24675 { 6909 /* ror */, X86::ROR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24676 { 6909 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24677 { 6909 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24678 { 6909 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24679 { 6909 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24680 { 6909 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24681 { 6909 /* ror */, X86::ROR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24682 { 6909 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24683 { 6909 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24684 { 6909 /* ror */, X86::ROR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24685 { 6909 /* ror */, X86::ROR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24686 { 6909 /* ror */, X86::ROR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24687 { 6909 /* ror */, X86::ROR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24688 { 6909 /* ror */, X86::ROR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24689 { 6909 /* ror */, X86::ROR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24690 { 6909 /* ror */, X86::ROR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24691 { 6909 /* ror */, X86::ROR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24692 { 6933 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 24693 { 6933 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24694 { 6933 /* rorx */, X86::RORX64ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, }, 24695 { 6933 /* rorx */, X86::RORX64mi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24696 { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24697 { 6950 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24698 { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24699 { 6958 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24700 { 6966 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24701 { 6966 /* roundsd */, X86::ROUNDSDm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24702 { 6974 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24703 { 6974 /* roundss */, X86::ROUNDSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24704 { 6982 /* rsm */, X86::RSM, Convert_NoOperands, AMFBS_None, { }, }, 24705 { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24706 { 6986 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24707 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24708 { 6994 /* rsqrtss */, X86::RSQRTSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24709 { 7002 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24710 { 7011 /* sahf */, X86::SAHF, Convert_NoOperands, AMFBS_None, { }, }, 24711 { 7016 /* salc */, X86::SALC, Convert_NoOperands, AMFBS_Not64BitMode, { }, }, 24712 { 7021 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24713 { 7021 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24714 { 7021 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24715 { 7021 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24716 { 7021 /* sar */, X86::SAR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24717 { 7021 /* sar */, X86::SAR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24718 { 7021 /* sar */, X86::SAR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24719 { 7021 /* sar */, X86::SAR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24720 { 7021 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24721 { 7021 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24722 { 7021 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24723 { 7021 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24724 { 7021 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24725 { 7021 /* sar */, X86::SAR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24726 { 7021 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24727 { 7021 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24728 { 7021 /* sar */, X86::SAR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24729 { 7021 /* sar */, X86::SAR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24730 { 7021 /* sar */, X86::SAR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24731 { 7021 /* sar */, X86::SAR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24732 { 7021 /* sar */, X86::SAR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24733 { 7021 /* sar */, X86::SAR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24734 { 7021 /* sar */, X86::SAR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24735 { 7021 /* sar */, X86::SAR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24736 { 7045 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 24737 { 7045 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 24738 { 7045 /* sarx */, X86::SARX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 24739 { 7045 /* sarx */, X86::SARX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 24740 { 7062 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, AMFBS_None, { }, }, 24741 { 7074 /* sbb */, X86::SBB8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 24742 { 7074 /* sbb */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 24743 { 7074 /* sbb */, X86::SBB16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 24744 { 7074 /* sbb */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 24745 { 7074 /* sbb */, X86::SBB32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 24746 { 7074 /* sbb */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 24747 { 7074 /* sbb */, X86::SBB64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 24748 { 7074 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 24749 { 7074 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 24750 { 7074 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 24751 { 7074 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 24752 { 7074 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 24753 { 7074 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 24754 { 7074 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 24755 { 7074 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 24756 { 7074 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 24757 { 7074 /* sbb */, X86::SBB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 24758 { 7074 /* sbb */, X86::SBB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 24759 { 7074 /* sbb */, X86::SBB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 24760 { 7074 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 24761 { 7074 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 24762 { 7074 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 24763 { 7074 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 24764 { 7074 /* sbb */, X86::SBB16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 24765 { 7074 /* sbb */, X86::SBB16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 24766 { 7074 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 24767 { 7074 /* sbb */, X86::SBB32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 24768 { 7074 /* sbb */, X86::SBB32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 24769 { 7074 /* sbb */, X86::SBB64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 24770 { 7074 /* sbb */, X86::SBB64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 24771 { 7074 /* sbb */, X86::SBB64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 24772 { 7074 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 24773 { 7074 /* sbb */, X86::SBB8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 24774 { 7098 /* scas */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, }, 24775 { 7098 /* scas */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, }, 24776 { 7098 /* scas */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, }, 24777 { 7098 /* scas */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, }, 24778 { 7098 /* scas */, X86::SCASB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, }, 24779 { 7098 /* scas */, X86::SCASW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, }, 24780 { 7098 /* scas */, X86::SCASL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, }, 24781 { 7098 /* scas */, X86::SCASQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, }, 24782 { 7103 /* scasb */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, }, 24783 { 7103 /* scasb */, X86::SCASB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, }, 24784 { 7109 /* scasd */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, }, 24785 { 7109 /* scasd */, X86::SCASL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, }, 24786 { 7121 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, }, 24787 { 7121 /* scasq */, X86::SCASQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, }, 24788 { 7127 /* scasw */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, }, 24789 { 7127 /* scasw */, X86::SCASW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, }, 24790 { 7133 /* seta */, X86::SETCCr, Convert__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR8 }, }, 24791 { 7133 /* seta */, X86::SETCCm, Convert__Mem85_0__imm_95_7, AMFBS_None, { MCK_Mem8 }, }, 24792 { 7138 /* setae */, X86::SETCCr, Convert__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR8 }, }, 24793 { 7138 /* setae */, X86::SETCCm, Convert__Mem85_0__imm_95_3, AMFBS_None, { MCK_Mem8 }, }, 24794 { 7144 /* setb */, X86::SETCCr, Convert__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR8 }, }, 24795 { 7144 /* setb */, X86::SETCCm, Convert__Mem85_0__imm_95_2, AMFBS_None, { MCK_Mem8 }, }, 24796 { 7149 /* setbe */, X86::SETCCr, Convert__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR8 }, }, 24797 { 7149 /* setbe */, X86::SETCCm, Convert__Mem85_0__imm_95_6, AMFBS_None, { MCK_Mem8 }, }, 24798 { 7155 /* sete */, X86::SETCCr, Convert__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR8 }, }, 24799 { 7155 /* sete */, X86::SETCCm, Convert__Mem85_0__imm_95_4, AMFBS_None, { MCK_Mem8 }, }, 24800 { 7160 /* setg */, X86::SETCCr, Convert__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR8 }, }, 24801 { 7160 /* setg */, X86::SETCCm, Convert__Mem85_0__imm_95_15, AMFBS_None, { MCK_Mem8 }, }, 24802 { 7165 /* setge */, X86::SETCCr, Convert__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR8 }, }, 24803 { 7165 /* setge */, X86::SETCCm, Convert__Mem85_0__imm_95_13, AMFBS_None, { MCK_Mem8 }, }, 24804 { 7171 /* setl */, X86::SETCCr, Convert__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR8 }, }, 24805 { 7171 /* setl */, X86::SETCCm, Convert__Mem85_0__imm_95_12, AMFBS_None, { MCK_Mem8 }, }, 24806 { 7176 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, }, 24807 { 7176 /* setle */, X86::SETCCm, Convert__Mem85_0__imm_95_14, AMFBS_None, { MCK_Mem8 }, }, 24808 { 7182 /* setne */, X86::SETCCr, Convert__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR8 }, }, 24809 { 7182 /* setne */, X86::SETCCm, Convert__Mem85_0__imm_95_5, AMFBS_None, { MCK_Mem8 }, }, 24810 { 7188 /* setno */, X86::SETCCr, Convert__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR8 }, }, 24811 { 7188 /* setno */, X86::SETCCm, Convert__Mem85_0__imm_95_1, AMFBS_None, { MCK_Mem8 }, }, 24812 { 7194 /* setnp */, X86::SETCCr, Convert__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR8 }, }, 24813 { 7194 /* setnp */, X86::SETCCm, Convert__Mem85_0__imm_95_11, AMFBS_None, { MCK_Mem8 }, }, 24814 { 7200 /* setns */, X86::SETCCr, Convert__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR8 }, }, 24815 { 7200 /* setns */, X86::SETCCm, Convert__Mem85_0__imm_95_9, AMFBS_None, { MCK_Mem8 }, }, 24816 { 7206 /* seto */, X86::SETCCr, Convert__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR8 }, }, 24817 { 7206 /* seto */, X86::SETCCm, Convert__Mem85_0__imm_95_0, AMFBS_None, { MCK_Mem8 }, }, 24818 { 7211 /* setp */, X86::SETCCr, Convert__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR8 }, }, 24819 { 7211 /* setp */, X86::SETCCm, Convert__Mem85_0__imm_95_10, AMFBS_None, { MCK_Mem8 }, }, 24820 { 7216 /* sets */, X86::SETCCr, Convert__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR8 }, }, 24821 { 7216 /* sets */, X86::SETCCm, Convert__Mem85_0__imm_95_8, AMFBS_None, { MCK_Mem8 }, }, 24822 { 7221 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, AMFBS_None, { }, }, 24823 { 7230 /* sfence */, X86::SFENCE, Convert_NoOperands, AMFBS_None, { }, }, 24824 { 7237 /* sgdt */, X86::SGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 24825 { 7242 /* sgdtd */, X86::SGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 24826 { 7260 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 24827 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24828 { 7266 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24829 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24830 { 7275 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24831 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24832 { 7284 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24833 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24834 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24835 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24836 { 7304 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24837 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24838 { 7315 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24839 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24840 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24841 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, }, 24842 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, }, 24843 { 7338 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24844 { 7338 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24845 { 7338 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24846 { 7338 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24847 { 7338 /* shl */, X86::SHL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24848 { 7338 /* shl */, X86::SHL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24849 { 7338 /* shl */, X86::SHL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24850 { 7338 /* shl */, X86::SHL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24851 { 7338 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24852 { 7338 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24853 { 7338 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24854 { 7338 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24855 { 7338 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24856 { 7338 /* shl */, X86::SHL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24857 { 7338 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24858 { 7338 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24859 { 7338 /* shl */, X86::SHL16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24860 { 7338 /* shl */, X86::SHL16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24861 { 7338 /* shl */, X86::SHL32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24862 { 7338 /* shl */, X86::SHL32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24863 { 7338 /* shl */, X86::SHL64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24864 { 7338 /* shl */, X86::SHL64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24865 { 7338 /* shl */, X86::SHL8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24866 { 7338 /* shl */, X86::SHL8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24867 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 24868 { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 24869 { 7347 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 24870 { 7347 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 24871 { 7347 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 24872 { 7347 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 24873 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, }, 24874 { 7347 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, }, 24875 { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, }, 24876 { 7347 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 24877 { 7347 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_CL }, }, 24878 { 7347 /* shld */, X86::SHLD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, }, 24879 { 7347 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_CL }, }, 24880 { 7347 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, }, 24881 { 7347 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_CL }, }, 24882 { 7347 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 24883 { 7347 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_CL }, }, 24884 { 7347 /* shld */, X86::SHLD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, }, 24885 { 7385 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 24886 { 7385 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 24887 { 7385 /* shlx */, X86::SHLX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 24888 { 7385 /* shlx */, X86::SHLX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 24889 { 7402 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, }, 24890 { 7402 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, }, 24891 { 7402 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, }, 24892 { 7402 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, }, 24893 { 7402 /* shr */, X86::SHR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24894 { 7402 /* shr */, X86::SHR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24895 { 7402 /* shr */, X86::SHR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, }, 24896 { 7402 /* shr */, X86::SHR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, }, 24897 { 7402 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, }, 24898 { 7402 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, }, 24899 { 7402 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, }, 24900 { 7402 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, }, 24901 { 7402 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, }, 24902 { 7402 /* shr */, X86::SHR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, }, 24903 { 7402 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, }, 24904 { 7402 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, }, 24905 { 7402 /* shr */, X86::SHR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, }, 24906 { 7402 /* shr */, X86::SHR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, }, 24907 { 7402 /* shr */, X86::SHR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, }, 24908 { 7402 /* shr */, X86::SHR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, }, 24909 { 7402 /* shr */, X86::SHR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, }, 24910 { 7402 /* shr */, X86::SHR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, }, 24911 { 7402 /* shr */, X86::SHR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, }, 24912 { 7402 /* shr */, X86::SHR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, }, 24913 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 24914 { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 24915 { 7411 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 24916 { 7411 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 24917 { 7411 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 24918 { 7411 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 24919 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, }, 24920 { 7411 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, }, 24921 { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, }, 24922 { 7411 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 24923 { 7411 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_CL }, }, 24924 { 7411 /* shrd */, X86::SHRD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, }, 24925 { 7411 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_CL }, }, 24926 { 7411 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, }, 24927 { 7411 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_CL }, }, 24928 { 7411 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 24929 { 7411 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_CL }, }, 24930 { 7411 /* shrd */, X86::SHRD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, }, 24931 { 7449 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, 24932 { 7449 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, }, 24933 { 7449 /* shrx */, X86::SHRX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, 24934 { 7449 /* shrx */, X86::SHRX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, }, 24935 { 7466 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24936 { 7466 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24937 { 7473 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 24938 { 7473 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 24939 { 7480 /* sidt */, X86::SIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 24940 { 7485 /* sidtd */, X86::SIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 24941 { 7503 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, }, 24942 { 7509 /* skinit */, X86::SKINIT, Convert_NoOperands, AMFBS_None, { MCK_EAX }, }, 24943 { 7516 /* sldt */, X86::SLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24944 { 7516 /* sldt */, X86::SLDT32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24945 { 7516 /* sldt */, X86::SLDT64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 24946 { 7516 /* sldt */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24947 { 7516 /* sldt */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24948 { 7539 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24949 { 7539 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 24950 { 7546 /* smsw */, X86::SMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24951 { 7546 /* smsw */, X86::SMSW32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24952 { 7546 /* smsw */, X86::SMSW64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 24953 { 7546 /* smsw */, X86::SMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24954 { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24955 { 7569 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24956 { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24957 { 7576 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 24958 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24959 { 7583 /* sqrtsd */, X86::SQRTSDm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 24960 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 24961 { 7590 /* sqrtss */, X86::SQRTSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 24962 { 7597 /* ss */, X86::SS_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 24963 { 7600 /* stac */, X86::STAC, Convert_NoOperands, AMFBS_None, { }, }, 24964 { 7605 /* stc */, X86::STC, Convert_NoOperands, AMFBS_None, { }, }, 24965 { 7609 /* std */, X86::STD, Convert_NoOperands, AMFBS_None, { }, }, 24966 { 7613 /* stgi */, X86::STGI, Convert_NoOperands, AMFBS_None, { }, }, 24967 { 7618 /* sti */, X86::STI, Convert_NoOperands, AMFBS_None, { }, }, 24968 { 7622 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 24969 { 7630 /* stos */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, }, 24970 { 7630 /* stos */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, }, 24971 { 7630 /* stos */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, }, 24972 { 7630 /* stos */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, }, 24973 { 7630 /* stos */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, }, 24974 { 7630 /* stos */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, }, 24975 { 7630 /* stos */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, }, 24976 { 7630 /* stos */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, }, 24977 { 7635 /* stosb */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, }, 24978 { 7635 /* stosb */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, }, 24979 { 7641 /* stosd */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, }, 24980 { 7641 /* stosd */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, }, 24981 { 7653 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, }, 24982 { 7653 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, }, 24983 { 7659 /* stosw */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, }, 24984 { 7659 /* stosw */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, }, 24985 { 7665 /* str */, X86::STR16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 24986 { 7665 /* str */, X86::STR32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 24987 { 7665 /* str */, X86::STR64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, }, 24988 { 7665 /* str */, X86::STRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 24989 { 7684 /* sub */, X86::SUB8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 24990 { 7684 /* sub */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 24991 { 7684 /* sub */, X86::SUB16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 24992 { 7684 /* sub */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 24993 { 7684 /* sub */, X86::SUB32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 24994 { 7684 /* sub */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 24995 { 7684 /* sub */, X86::SUB64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 24996 { 7684 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 24997 { 7684 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 24998 { 7684 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 24999 { 7684 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 25000 { 7684 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 25001 { 7684 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 25002 { 7684 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 25003 { 7684 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 25004 { 7684 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 25005 { 7684 /* sub */, X86::SUB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 25006 { 7684 /* sub */, X86::SUB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 25007 { 7684 /* sub */, X86::SUB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 25008 { 7684 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 25009 { 7684 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 25010 { 7684 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 25011 { 7684 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 25012 { 7684 /* sub */, X86::SUB16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 25013 { 7684 /* sub */, X86::SUB16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 25014 { 7684 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 25015 { 7684 /* sub */, X86::SUB32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 25016 { 7684 /* sub */, X86::SUB32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 25017 { 7684 /* sub */, X86::SUB64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 25018 { 7684 /* sub */, X86::SUB64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 25019 { 7684 /* sub */, X86::SUB64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 25020 { 7684 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 25021 { 7684 /* sub */, X86::SUB8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 25022 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25023 { 7698 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25024 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25025 { 7704 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25026 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25027 { 7715 /* subsd */, X86::SUBSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 25028 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25029 { 7721 /* subss */, X86::SUBSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 25030 { 7732 /* swapgs */, X86::SWAPGS, Convert_NoOperands, AMFBS_None, { }, }, 25031 { 7739 /* syscall */, X86::SYSCALL, Convert_NoOperands, AMFBS_None, { }, }, 25032 { 7747 /* sysenter */, X86::SYSENTER, Convert_NoOperands, AMFBS_None, { }, }, 25033 { 7756 /* sysexit */, X86::SYSEXIT, Convert_NoOperands, AMFBS_None, { }, }, 25034 { 7773 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 25035 { 7782 /* sysret */, X86::SYSRET, Convert_NoOperands, AMFBS_None, { }, }, 25036 { 7797 /* sysretq */, X86::SYSRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, }, 25037 { 7805 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 25038 { 7805 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 25039 { 7805 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 25040 { 7805 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 25041 { 7828 /* test */, X86::TEST8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 25042 { 7828 /* test */, X86::TEST16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 25043 { 7828 /* test */, X86::TEST32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 25044 { 7828 /* test */, X86::TEST64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 25045 { 7828 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 25046 { 7828 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 25047 { 7828 /* test */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 25048 { 7828 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 25049 { 7828 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 25050 { 7828 /* test */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 25051 { 7828 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 25052 { 7828 /* test */, X86::TEST64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_GR64, MCK_ImmSExti64i32 }, }, 25053 { 7828 /* test */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 25054 { 7828 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 25055 { 7828 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 25056 { 7828 /* test */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 25057 { 7828 /* test */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 25058 { 7828 /* test */, X86::TEST16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 25059 { 7828 /* test */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 25060 { 7828 /* test */, X86::TEST32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 25061 { 7828 /* test */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 25062 { 7828 /* test */, X86::TEST64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 25063 { 7828 /* test */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 25064 { 7828 /* test */, X86::TEST8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 25065 { 7857 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, }, 25066 { 7864 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 25067 { 7864 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 25068 { 7864 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 25069 { 7864 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 25070 { 7864 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 25071 { 7864 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 25072 { 7891 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 25073 { 7891 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 25074 { 7891 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 25075 { 7891 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 25076 { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25077 { 7911 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 25078 { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25079 { 7919 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 25080 { 7927 /* ud2 */, X86::TRAP, Convert_NoOperands, AMFBS_None, { }, }, 25081 { 7931 /* ud2b */, X86::UD2B, Convert_NoOperands, AMFBS_None, { }, }, 25082 { 7936 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, }, 25083 { 7936 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, }, 25084 { 7936 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 25085 { 7945 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, }, 25086 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25087 { 7952 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25088 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25089 { 7961 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25090 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25091 { 7970 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25092 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25093 { 7979 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25094 { 7988 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 25095 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 25096 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 25097 { 7998 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25098 { 7998 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25099 { 7998 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25100 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 25101 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 25102 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 25103 { 8019 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25104 { 8019 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25105 { 8019 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25106 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25107 { 8030 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25108 { 8030 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25109 { 8030 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25110 { 8030 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25111 { 8030 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25112 { 8030 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25113 { 8030 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25114 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25115 { 8030 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25116 { 8030 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25117 { 8030 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25118 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25119 { 8030 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25120 { 8030 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25121 { 8030 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25122 { 8030 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25123 { 8030 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25124 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25125 { 8030 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25126 { 8030 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25127 { 8030 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25128 { 8030 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25129 { 8030 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25130 { 8030 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25131 { 8030 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25132 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25133 { 8030 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25134 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25135 { 8030 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25136 { 8030 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25137 { 8030 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25138 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25139 { 8030 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25140 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25141 { 8037 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25142 { 8037 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25143 { 8037 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25144 { 8037 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25145 { 8037 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25146 { 8037 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25147 { 8037 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25148 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25149 { 8037 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25150 { 8037 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25151 { 8037 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25152 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25153 { 8037 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25154 { 8037 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25155 { 8037 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25156 { 8037 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25157 { 8037 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25158 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25159 { 8037 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25160 { 8037 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25161 { 8037 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25162 { 8037 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25163 { 8037 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25164 { 8037 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25165 { 8037 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25166 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25167 { 8037 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25168 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25169 { 8037 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25170 { 8037 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25171 { 8037 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25172 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25173 { 8037 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25174 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25175 { 8044 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 25176 { 8044 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25177 { 8044 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 25178 { 8044 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 25179 { 8044 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25180 { 8044 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 25181 { 8044 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25182 { 8044 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 25183 { 8044 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 25184 { 8044 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 25185 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25186 { 8051 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 25187 { 8051 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25188 { 8051 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 25189 { 8051 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 25190 { 8051 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25191 { 8051 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 25192 { 8051 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25193 { 8051 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 25194 { 8051 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 25195 { 8051 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 25196 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25197 { 8058 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25198 { 8058 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25199 { 8058 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25200 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25201 { 8068 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25202 { 8068 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25203 { 8068 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25204 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25205 { 8078 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25206 { 8078 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25207 { 8078 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25208 { 8078 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25209 { 8078 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25210 { 8078 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25211 { 8078 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25212 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25213 { 8078 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25214 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25215 { 8086 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25216 { 8086 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25217 { 8086 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25218 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25219 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25220 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25221 { 8086 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25222 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25223 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25224 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25225 { 8098 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25226 { 8098 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25227 { 8098 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25228 { 8098 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25229 { 8098 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25230 { 8098 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25231 { 8098 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25232 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25233 { 8098 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25234 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25235 { 8106 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25236 { 8106 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25237 { 8106 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25238 { 8106 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25239 { 8106 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25240 { 8106 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25241 { 8106 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25242 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25243 { 8106 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25244 { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25245 { 8118 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25246 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25247 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25248 { 8143 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25249 { 8143 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25250 { 8143 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25251 { 8143 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25252 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25253 { 8143 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25254 { 8143 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25255 { 8143 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25256 { 8143 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 25257 { 8143 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25258 { 8143 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25259 { 8143 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25260 { 8143 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25261 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25262 { 8143 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25263 { 8143 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25264 { 8143 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25265 { 8143 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25266 { 8143 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25267 { 8143 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25268 { 8143 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25269 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25270 { 8143 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25271 { 8143 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 25272 { 8143 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25273 { 8143 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25274 { 8143 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 25275 { 8151 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25276 { 8151 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25277 { 8151 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25278 { 8151 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25279 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25280 { 8151 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25281 { 8151 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 25282 { 8151 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25283 { 8151 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25284 { 8151 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25285 { 8151 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25286 { 8151 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25287 { 8151 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25288 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25289 { 8151 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25290 { 8151 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25291 { 8151 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25292 { 8151 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 25293 { 8151 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25294 { 8151 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25295 { 8151 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25296 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25297 { 8151 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25298 { 8151 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25299 { 8151 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 25300 { 8151 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25301 { 8151 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25302 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25303 { 8159 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25304 { 8159 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25305 { 8159 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25306 { 8159 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25307 { 8159 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25308 { 8159 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25309 { 8159 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25310 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25311 { 8159 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25312 { 8159 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25313 { 8159 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25314 { 8159 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25315 { 8159 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25316 { 8159 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25317 { 8159 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25318 { 8159 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25319 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25320 { 8159 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25321 { 8159 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25322 { 8159 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25323 { 8159 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25324 { 8159 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25325 { 8159 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25326 { 8159 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25327 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25328 { 8159 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25329 { 8159 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25330 { 8159 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25331 { 8159 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25332 { 8159 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25333 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25334 { 8167 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25335 { 8167 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25336 { 8167 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25337 { 8167 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25338 { 8167 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25339 { 8167 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25340 { 8167 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25341 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25342 { 8167 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25343 { 8167 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25344 { 8167 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25345 { 8167 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25346 { 8167 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25347 { 8167 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25348 { 8167 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25349 { 8167 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25350 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25351 { 8167 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25352 { 8167 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25353 { 8167 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25354 { 8167 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25355 { 8167 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25356 { 8167 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25357 { 8167 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25358 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25359 { 8167 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25360 { 8167 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25361 { 8167 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25362 { 8167 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25363 { 8167 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25364 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25365 { 8175 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25366 { 8175 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25367 { 8175 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25368 { 8175 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25369 { 8175 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25370 { 8175 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25371 { 8175 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25372 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25373 { 8175 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25374 { 8175 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25375 { 8175 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25376 { 8175 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25377 { 8175 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25378 { 8175 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25379 { 8175 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25380 { 8175 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25381 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25382 { 8175 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25383 { 8175 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25384 { 8175 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25385 { 8175 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25386 { 8175 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25387 { 8175 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25388 { 8175 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25389 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25390 { 8175 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25391 { 8175 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25392 { 8175 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25393 { 8175 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25394 { 8175 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25395 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25396 { 8182 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 25397 { 8182 /* vandps */, X86::VANDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25398 { 8182 /* vandps */, X86::VANDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 25399 { 8182 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25400 { 8182 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25401 { 8182 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25402 { 8182 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25403 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25404 { 8182 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25405 { 8182 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25406 { 8182 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25407 { 8182 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25408 { 8182 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25409 { 8182 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25410 { 8182 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25411 { 8182 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25412 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25413 { 8182 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25414 { 8182 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25415 { 8182 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25416 { 8182 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25417 { 8182 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25418 { 8182 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25419 { 8182 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25420 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25421 { 8182 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25422 { 8182 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25423 { 8182 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25424 { 8182 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25425 { 8182 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25426 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25427 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25428 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25429 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25430 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25431 { 8189 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25432 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25433 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25434 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25435 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25436 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25437 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25438 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25439 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25440 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25441 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25442 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25443 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25444 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25445 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25446 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25447 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25448 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25449 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25450 { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25451 { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25452 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25453 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25454 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25455 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25456 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25457 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25458 { 8199 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25459 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25460 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25461 { 8199 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25462 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25463 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25464 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25465 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25466 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25467 { 8199 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25468 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25469 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25470 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25471 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25472 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25473 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25474 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25475 { 8199 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25476 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25477 { 8199 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25478 { 8199 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25479 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25480 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25481 { 8209 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25482 { 8209 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 25483 { 8209 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25484 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25485 { 8218 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25486 { 8218 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 25487 { 8218 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25488 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25489 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 25490 { 8227 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25491 { 8227 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 25492 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 25493 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 25494 { 8237 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 25495 { 8237 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 25496 { 8247 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 25497 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 25498 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 25499 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 25500 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 25501 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25502 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25503 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25504 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25505 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25506 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25507 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25508 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25509 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 25510 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 25511 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25512 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25513 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25514 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25515 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 25516 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25517 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25518 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 25519 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 25520 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25521 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25522 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25523 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25524 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 25525 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25526 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25527 { 8342 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 25528 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25529 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 25530 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 25531 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 25532 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 25533 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 25534 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25535 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25536 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25537 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25538 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25539 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25540 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25541 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25542 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25543 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25544 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25545 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25546 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 25547 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 25548 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25549 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25550 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25551 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25552 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 25553 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25554 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25555 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 25556 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 25557 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25558 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25559 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25560 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25561 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 25562 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25563 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25564 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 25565 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, }, 25566 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 25567 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 25568 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 25569 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 25570 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25571 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25572 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25573 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25574 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25575 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25576 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25577 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25578 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25579 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 25580 { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 25581 { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, }, 25582 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25583 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 25584 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 25585 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 25586 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 25587 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32 }, }, 25588 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25589 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 25590 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25591 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 25592 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25593 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 25594 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25595 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 25596 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25597 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 25598 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25599 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 25600 { 8463 /* vcmppd */, X86::VCMPPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25601 { 8463 /* vcmppd */, X86::VCMPPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25602 { 8463 /* vcmppd */, X86::VCMPPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25603 { 8463 /* vcmppd */, X86::VCMPPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25604 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25605 { 8463 /* vcmppd */, X86::VCMPPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25606 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25607 { 8463 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25608 { 8463 /* vcmppd */, X86::VCMPPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 25609 { 8463 /* vcmppd */, X86::VCMPPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25610 { 8463 /* vcmppd */, X86::VCMPPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 25611 { 8463 /* vcmppd */, X86::VCMPPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25612 { 8463 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25613 { 8463 /* vcmppd */, X86::VCMPPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25614 { 8463 /* vcmppd */, X86::VCMPPDZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25615 { 8463 /* vcmppd */, X86::VCMPPDZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25616 { 8463 /* vcmppd */, X86::VCMPPDZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25617 { 8463 /* vcmppd */, X86::VCMPPDZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25618 { 8463 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25619 { 8463 /* vcmppd */, X86::VCMPPDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25620 { 8463 /* vcmppd */, X86::VCMPPDZ128rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 25621 { 8463 /* vcmppd */, X86::VCMPPDZ256rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25622 { 8463 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25623 { 8463 /* vcmppd */, X86::VCMPPDZrmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25624 { 8470 /* vcmpps */, X86::VCMPPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25625 { 8470 /* vcmpps */, X86::VCMPPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25626 { 8470 /* vcmpps */, X86::VCMPPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25627 { 8470 /* vcmpps */, X86::VCMPPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25628 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25629 { 8470 /* vcmpps */, X86::VCMPPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25630 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25631 { 8470 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25632 { 8470 /* vcmpps */, X86::VCMPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 25633 { 8470 /* vcmpps */, X86::VCMPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25634 { 8470 /* vcmpps */, X86::VCMPPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25635 { 8470 /* vcmpps */, X86::VCMPPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25636 { 8470 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25637 { 8470 /* vcmpps */, X86::VCMPPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 25638 { 8470 /* vcmpps */, X86::VCMPPSZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25639 { 8470 /* vcmpps */, X86::VCMPPSZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 25640 { 8470 /* vcmpps */, X86::VCMPPSZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 25641 { 8470 /* vcmpps */, X86::VCMPPSZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 25642 { 8470 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 25643 { 8470 /* vcmpps */, X86::VCMPPSZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 25644 { 8470 /* vcmpps */, X86::VCMPPSZ128rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 25645 { 8470 /* vcmpps */, X86::VCMPPSZ256rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 25646 { 8470 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25647 { 8470 /* vcmpps */, X86::VCMPPSZrmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 25648 { 8477 /* vcmpsd */, X86::VCMPSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25649 { 8477 /* vcmpsd */, X86::VCMPSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 25650 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25651 { 8477 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 25652 { 8477 /* vcmpsd */, X86::VCMPSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25653 { 8477 /* vcmpsd */, X86::VCMPSDZrr_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25654 { 8477 /* vcmpsd */, X86::VCMPSDZrm_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 25655 { 8477 /* vcmpsd */, X86::VCMPSDZrrb_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25656 { 8484 /* vcmpss */, X86::VCMPSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25657 { 8484 /* vcmpss */, X86::VCMPSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 25658 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 25659 { 8484 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 25660 { 8484 /* vcmpss */, X86::VCMPSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25661 { 8484 /* vcmpss */, X86::VCMPSSZrr_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 25662 { 8484 /* vcmpss */, X86::VCMPSSZrm_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 25663 { 8484 /* vcmpss */, X86::VCMPSSZrrb_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 25664 { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25665 { 8491 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 25666 { 8491 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25667 { 8491 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 25668 { 8491 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 25669 { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25670 { 8499 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 25671 { 8499 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25672 { 8499 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 25673 { 8499 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 25674 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25675 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 25676 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 25677 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 25678 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 25679 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 25680 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25681 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25682 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25683 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25684 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25685 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25686 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25687 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25688 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25689 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25690 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 25691 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 25692 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 25693 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 25694 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 25695 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25696 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25697 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25698 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25699 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25700 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25701 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25702 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25703 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25704 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25705 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 25706 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 25707 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 25708 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25709 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 25710 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 25711 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 25712 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 25713 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 25714 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 25715 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25716 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 25717 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25718 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25719 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25720 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25721 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25722 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25723 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25724 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 25725 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 25726 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25727 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25728 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 25729 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25730 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25731 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 25732 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 25733 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 25734 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 25735 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25736 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25737 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 25738 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 25739 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25740 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25741 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 25742 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 25743 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 25744 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 25745 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25746 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25747 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25748 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25749 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25750 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25751 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25752 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25753 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25754 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25755 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25756 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25757 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 25758 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25759 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25760 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 25761 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25762 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25763 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 25764 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 25765 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 25766 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 25767 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 25768 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 25769 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 25770 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 25771 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 25772 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 25773 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 25774 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 25775 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25776 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25777 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25778 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 25779 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 25780 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 25781 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 25782 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 25783 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 25784 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 25785 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 25786 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25787 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 25788 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 25789 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25790 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 25791 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 25792 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25793 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25794 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25795 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 25796 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25797 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 25798 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25799 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 25800 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 25801 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 25802 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 25803 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to8_125_ }, }, 25804 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to16_125_ }, }, 25805 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25806 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25807 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25808 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25809 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25810 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25811 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25812 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25813 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25814 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25815 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 25816 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 25817 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25818 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25819 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 25820 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 25821 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 25822 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 25823 { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25824 { 8580 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25825 { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 25826 { 8595 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 25827 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25828 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 25829 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25830 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, }, 25831 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25832 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 25833 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25834 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 25835 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 25836 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 25837 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25838 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25839 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, }, 25840 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 25841 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25842 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25843 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25844 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25845 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25846 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25847 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25848 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25849 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25850 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25851 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25852 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25853 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25854 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25855 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 25856 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25857 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25858 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25859 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 25860 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25861 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25862 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 25863 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 25864 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, }, 25865 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25866 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 25867 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25868 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 25869 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 25870 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 25871 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25872 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25873 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, }, 25874 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 25875 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25876 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25877 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25878 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25879 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25880 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25881 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25882 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25883 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25884 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25885 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25886 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25887 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25888 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25889 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 25890 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25891 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25892 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25893 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 25894 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25895 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25896 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25897 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 25898 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 25899 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 25900 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 25901 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25902 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25903 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25904 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25905 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25906 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25907 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25908 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25909 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25910 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25911 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25912 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25913 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25914 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25915 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25916 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25917 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25918 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25919 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 25920 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25921 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25922 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25923 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 25924 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25925 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25926 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 25927 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25928 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 25929 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 25930 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 25931 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25932 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25933 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, }, 25934 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 25935 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25936 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25937 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25938 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25939 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25940 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25941 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25942 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25943 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25944 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25945 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25946 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25947 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25948 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25949 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 25950 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25951 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25952 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25953 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 25954 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25955 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25956 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 25957 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 25958 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 25959 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 25960 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 25961 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 25962 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 25963 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 25964 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 25965 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25966 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 25967 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 25968 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 25969 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 25970 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 25971 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 25972 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 25973 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25974 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 25975 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 25976 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25977 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 25978 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 25979 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 25980 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25981 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 25982 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 25983 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 25984 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 25985 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 25986 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 25987 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 25988 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 25989 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 25990 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 25991 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 25992 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 25993 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 25994 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 25995 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, }, 25996 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25997 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 25998 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 25999 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26000 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26001 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26002 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26003 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26004 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26005 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26006 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26007 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26008 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26009 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26010 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 26011 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 26012 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 26013 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 26014 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26015 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26016 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26017 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26018 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26019 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26020 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26021 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26022 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26023 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26024 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26025 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26026 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26027 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26028 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26029 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26030 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26031 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26032 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26033 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26034 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26035 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26036 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26037 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26038 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26039 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26040 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26041 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26042 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26043 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26044 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 26045 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 26046 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 26047 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 26048 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26049 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 26050 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 26051 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 26052 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 26053 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 26054 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 26055 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26056 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, }, 26057 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 26058 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26059 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 26060 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26061 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26062 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26063 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26064 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26065 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26066 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26067 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26068 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26069 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26070 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26071 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26072 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26073 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26074 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26075 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26076 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26077 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26078 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 26079 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26080 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26081 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26082 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26083 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26084 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26085 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26086 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 26087 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26088 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 26089 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26090 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26091 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26092 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26093 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26094 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26095 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26096 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26097 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26098 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 26099 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 26100 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26101 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 26102 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 26103 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 26104 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 26105 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 26106 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 26107 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26108 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, }, 26109 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 26110 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26111 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 26112 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26113 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26114 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26115 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26116 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26117 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26118 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26119 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26120 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26121 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26122 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26123 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26124 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, }, 26125 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26126 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26127 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26128 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, }, 26129 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26130 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26131 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26132 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26133 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26134 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26135 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26136 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26137 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26138 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26139 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26140 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26141 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26142 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26143 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26144 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26145 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26146 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26147 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26148 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26149 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26150 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26151 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26152 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26153 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26154 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26155 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26156 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26157 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26158 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26159 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26160 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26161 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 26162 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 26163 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 26164 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 26165 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 26166 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 26167 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26168 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, }, 26169 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 26170 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26171 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 26172 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26173 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26174 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26175 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26176 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26177 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26178 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26179 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26180 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26181 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26182 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26183 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26184 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, }, 26185 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26186 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26187 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26188 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, }, 26189 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26190 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26191 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26192 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26193 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26194 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26195 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26196 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26197 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26198 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26199 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26200 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26201 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26202 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26203 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26204 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26205 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26206 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26207 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26208 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26209 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26210 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26211 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26212 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26213 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26214 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26215 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26216 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26217 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26218 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26219 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26220 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26221 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 26222 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26223 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 26224 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 26225 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 26226 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26227 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26228 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, }, 26229 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 26230 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26231 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26232 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26233 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26234 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26235 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26236 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26237 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26238 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26239 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26240 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26241 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26242 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26243 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26244 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26245 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26246 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26247 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26248 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26249 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26250 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 26251 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26252 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 26253 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 26254 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 26255 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26256 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 26257 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 26258 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, }, 26259 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, }, 26260 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 26261 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 26262 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26263 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 26264 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26265 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26266 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 26267 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26268 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 26269 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26270 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26271 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26272 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 26273 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26274 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 26275 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, }, 26276 { 8886 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, }, 26277 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, }, 26278 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, }, 26279 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 26280 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 26281 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, }, 26282 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, }, 26283 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 26284 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 26285 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, }, 26286 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, }, 26287 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, }, 26288 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 26289 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 26290 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, }, 26291 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, }, 26292 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 26293 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 26294 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, }, 26295 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, }, 26296 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 26297 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 26298 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26299 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 26300 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 26301 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26302 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 26303 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26304 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 26305 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 26306 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 26307 { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 26308 { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26309 { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 26310 { 8995 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 26311 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 26312 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26313 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 26314 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 26315 { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, }, 26316 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, }, 26317 { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26318 { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 26319 { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26320 { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 26321 { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, }, 26322 { 9027 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, }, 26323 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 26324 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, }, 26325 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 26326 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, }, 26327 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26328 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 26329 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26330 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 26331 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 26332 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 26333 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26334 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26335 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, }, 26336 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 26337 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26338 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26339 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26340 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26341 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26342 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26343 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26344 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26345 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26346 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26347 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26348 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26349 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26350 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26351 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26352 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26353 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26354 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26355 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26356 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26357 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26358 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26359 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26360 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26361 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26362 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26363 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26364 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26365 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 26366 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26367 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26368 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26369 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26370 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26371 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26372 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26373 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26374 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26375 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26376 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26377 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26378 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26379 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26380 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26381 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26382 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26383 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26384 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26385 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26386 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26387 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26388 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 26389 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26390 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 26391 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 26392 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 26393 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26394 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26395 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, }, 26396 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 26397 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26398 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26399 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26400 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26401 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26402 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26403 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26404 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26405 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26406 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26407 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26408 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26409 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26410 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26411 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26412 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26413 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26414 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26415 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26416 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26417 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26418 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26419 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26420 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26421 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26422 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26423 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26424 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26425 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 26426 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26427 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26428 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26429 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26430 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26431 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26432 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26433 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26434 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26435 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26436 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26437 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26438 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26439 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26440 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26441 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26442 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26443 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26444 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26445 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26446 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26447 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 26448 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 26449 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 26450 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 26451 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26452 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26453 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26454 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26455 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26456 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26457 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26458 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26459 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 26460 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26461 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26462 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26463 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26464 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26465 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26466 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26467 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26468 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26469 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26470 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26471 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26472 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26473 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26474 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26475 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26476 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26477 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26478 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26479 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26480 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26481 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26482 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 26483 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 26484 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 26485 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 26486 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 26487 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 26488 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26489 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, }, 26490 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 26491 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26492 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 26493 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26494 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26495 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26496 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26497 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26498 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26499 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26500 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26501 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26502 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26503 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26504 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26505 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26506 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26507 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26508 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26509 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26510 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26511 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26512 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26513 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26514 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26515 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26516 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26517 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26518 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26519 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 26520 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26521 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26522 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26523 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26524 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26525 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26526 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26527 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26528 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26529 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26530 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26531 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26532 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26533 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26534 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26535 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26536 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26537 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26538 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26539 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26540 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26541 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26542 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 26543 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 26544 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 26545 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 26546 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 26547 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 26548 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26549 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, }, 26550 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 26551 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26552 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 26553 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26554 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26555 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26556 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26557 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26558 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26559 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26560 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26561 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26562 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26563 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26564 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26565 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26566 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26567 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26568 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26569 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, }, 26570 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26571 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 26572 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26573 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 26574 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 26575 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 26576 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26577 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 26578 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 26579 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, }, 26580 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, }, 26581 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26582 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, }, 26583 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26584 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 26585 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, }, 26586 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, }, 26587 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 26588 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26589 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 26590 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 26591 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 26592 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26593 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 26594 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 26595 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, }, 26596 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, }, 26597 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 26598 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 26599 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 26600 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, }, 26601 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, }, 26602 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, }, 26603 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26604 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 26605 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 26606 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 26607 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 26608 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 26609 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, }, 26610 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26611 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, }, 26612 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26613 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 26614 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26615 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26616 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26617 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26618 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26619 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 26620 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26621 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26622 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26623 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26624 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26625 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26626 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26627 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, }, 26628 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26629 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26630 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26631 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26632 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26633 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26634 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26635 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26636 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26637 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26638 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26639 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26640 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26641 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26642 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26643 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26644 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26645 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26646 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26647 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26648 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26649 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26650 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26651 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26652 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26653 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26654 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26655 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26656 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 26657 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 26658 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26659 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26660 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26661 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26662 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26663 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26664 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26665 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26666 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26667 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26668 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26669 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26670 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26671 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26672 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26673 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26674 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26675 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26676 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26677 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26678 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26679 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26680 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26681 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26682 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26683 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26684 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26685 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26686 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26687 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26688 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26689 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26690 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26691 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 26692 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26693 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, }, 26694 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 26695 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, }, 26696 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26697 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26698 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, }, 26699 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, }, 26700 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26701 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26702 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26703 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26704 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26705 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26706 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26707 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26708 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26709 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26710 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26711 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26712 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26713 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26714 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 26715 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26716 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 26717 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 26718 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 26719 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26720 { 9418 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, }, 26721 { 9418 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, }, 26722 { 9418 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 26723 { 9418 /* vcvtusi2sd */, X86::VCVTUSI642SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 26724 { 9418 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, }, 26725 { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, }, 26726 { 9453 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, }, 26727 { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 26728 { 9453 /* vcvtusi2ss */, X86::VCVTUSI642SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 26729 { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, }, 26730 { 9453 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, }, 26731 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26732 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 26733 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26734 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 26735 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26736 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 26737 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26738 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 26739 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26740 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 26741 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26742 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 26743 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 26744 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 26745 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26746 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 26747 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26748 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 26749 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 26750 { 9498 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 26751 { 9498 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 26752 { 9498 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 26753 { 9498 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26754 { 9498 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 26755 { 9498 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 26756 { 9498 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 26757 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 26758 { 9498 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 26759 { 9498 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26760 { 9498 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26761 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26762 { 9498 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26763 { 9498 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26764 { 9498 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 26765 { 9498 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 26766 { 9498 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 26767 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 26768 { 9498 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 26769 { 9498 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26770 { 9498 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 26771 { 9498 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26772 { 9498 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 26773 { 9498 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 26774 { 9498 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26775 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 26776 { 9498 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 26777 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26778 { 9498 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26779 { 9498 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 26780 { 9498 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 26781 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26782 { 9498 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26783 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 26784 { 9505 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 26785 { 9505 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 26786 { 9505 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 26787 { 9505 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26788 { 9505 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 26789 { 9505 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 26790 { 9505 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 26791 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 26792 { 9505 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 26793 { 9505 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26794 { 9505 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26795 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26796 { 9505 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26797 { 9505 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26798 { 9505 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 26799 { 9505 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 26800 { 9505 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 26801 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 26802 { 9505 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 26803 { 9505 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26804 { 9505 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 26805 { 9505 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26806 { 9505 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 26807 { 9505 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 26808 { 9505 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26809 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 26810 { 9505 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 26811 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26812 { 9505 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26813 { 9505 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26814 { 9505 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26815 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 26816 { 9505 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26817 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 26818 { 9512 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 26819 { 9512 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26820 { 9512 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 26821 { 9512 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26822 { 9512 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26823 { 9512 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 26824 { 9512 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26825 { 9512 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 26826 { 9512 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26827 { 9512 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26828 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 26829 { 9519 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 26830 { 9519 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26831 { 9519 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 26832 { 9519 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26833 { 9519 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26834 { 9519 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 26835 { 9519 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26836 { 9519 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 26837 { 9519 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26838 { 9519 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 26839 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 26840 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 26841 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 26842 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 26843 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 26844 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 26845 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26846 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26847 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26848 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 26849 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 26850 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 26851 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 26852 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 26853 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 26854 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 26855 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 26856 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26857 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 26858 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 26859 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26860 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 26861 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 26862 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26863 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 26864 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 26865 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26866 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 26867 { 9536 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 26868 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 26869 { 9542 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 26870 { 9542 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26871 { 9542 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 26872 { 9548 /* verr */, X86::VERRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 26873 { 9548 /* verr */, X86::VERRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 26874 { 9553 /* verw */, X86::VERWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, }, 26875 { 9553 /* verw */, X86::VERWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, }, 26876 { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26877 { 9558 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26878 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 26879 { 9558 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 26880 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26881 { 9558 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26882 { 9558 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26883 { 9558 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26884 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26885 { 9558 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26886 { 9558 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26887 { 9558 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 26888 { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26889 { 9566 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26890 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 26891 { 9566 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 26892 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26893 { 9566 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26894 { 9566 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26895 { 9566 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26896 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 26897 { 9566 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26898 { 9566 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 26899 { 9566 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 26900 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26901 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26902 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26903 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26904 { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26905 { 9574 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26906 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26907 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26908 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26909 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26910 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26911 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26912 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26913 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26914 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26915 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26916 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26917 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26918 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 26919 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 26920 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 26921 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 26922 { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 26923 { 9584 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 26924 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 26925 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 26926 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 26927 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 26928 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 26929 { 9584 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 26930 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 26931 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 26932 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 26933 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 26934 { 9584 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 26935 { 9584 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 26936 { 9594 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26937 { 9594 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26938 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26939 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26940 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26941 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26942 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26943 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26944 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26945 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26946 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26947 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26948 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26949 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26950 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26951 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26952 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26953 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26954 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26955 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26956 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26957 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26958 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26959 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26960 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26961 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26962 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26963 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26964 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26965 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26966 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26967 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26968 { 9663 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26969 { 9663 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, }, 26970 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26971 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26972 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26973 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26974 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26975 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26976 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26977 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26978 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26979 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26980 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26981 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26982 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26983 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26984 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26985 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26986 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26987 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26988 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26989 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26990 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26991 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26992 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26993 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 26994 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26995 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26996 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26997 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26998 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 26999 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27000 { 9732 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27001 { 9732 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 27002 { 9732 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 27003 { 9732 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27004 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27005 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 27006 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 27007 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 27008 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27009 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 27010 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 27011 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 27012 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27013 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 27014 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27015 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 27016 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 27017 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 27018 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27019 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 27020 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27021 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 27022 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 27023 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 27024 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 27025 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 27026 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27027 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 27028 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27029 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 27030 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 27031 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 27032 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27033 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 27034 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27035 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 27036 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 27037 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 27038 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27039 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 27040 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 27041 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 27042 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27043 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 27044 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27045 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 27046 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 27047 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 27048 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27049 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 27050 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27051 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 27052 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 27053 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 27054 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 27055 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 27056 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 27057 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 27058 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27059 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 27060 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 27061 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 27062 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27063 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 27064 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27065 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 27066 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27067 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27068 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 27069 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27070 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 27071 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27072 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27073 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27074 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 27075 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27076 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27077 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 27078 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 27079 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 27080 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27081 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 27082 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27083 { 9791 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27084 { 9791 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27085 { 9791 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27086 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27087 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27088 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27089 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27090 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27091 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27092 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27093 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27094 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27095 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27096 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27097 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27098 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27099 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27100 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27101 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27102 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27103 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27104 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27105 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27106 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27107 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27108 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27109 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27110 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27111 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27112 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27113 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27114 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27115 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27116 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27117 { 9803 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27118 { 9803 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27119 { 9803 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27120 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27121 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27122 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27123 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27124 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27125 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27126 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27127 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27128 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27129 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27130 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27131 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27132 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27133 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27134 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27135 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27136 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27137 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27138 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27139 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27140 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27141 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27142 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27143 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27144 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27145 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27146 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27147 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27148 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27149 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27150 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27151 { 9815 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27152 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27153 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 27154 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27155 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27156 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 27157 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27158 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 27159 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27160 { 9815 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27161 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27162 { 9827 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27163 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27164 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 27165 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27166 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27167 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 27168 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27169 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 27170 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27171 { 9827 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27172 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27173 { 9839 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27174 { 9839 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27175 { 9839 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27176 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27177 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27178 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27179 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27180 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27181 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27182 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27183 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27184 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27185 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27186 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27187 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27188 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27189 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27190 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27191 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27192 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27193 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27194 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27195 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27196 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27197 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27198 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27199 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27200 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27201 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27202 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27203 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27204 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27205 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27206 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27207 { 9851 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27208 { 9851 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27209 { 9851 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27210 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27211 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27212 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27213 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27214 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27215 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27216 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27217 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27218 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27219 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27220 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27221 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27222 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27223 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27224 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27225 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27226 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27227 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27228 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27229 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27230 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27231 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27232 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27233 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27234 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27235 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27236 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27237 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27238 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27239 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27240 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27241 { 9863 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27242 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27243 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 27244 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27245 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27246 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 27247 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27248 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 27249 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27250 { 9863 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27251 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27252 { 9875 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27253 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27254 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 27255 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27256 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27257 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 27258 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27259 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 27260 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27261 { 9875 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27262 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27263 { 9887 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27264 { 9887 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27265 { 9887 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27266 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27267 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27268 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27269 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27270 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27271 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27272 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27273 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27274 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27275 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27276 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27277 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27278 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27279 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27280 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27281 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27282 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27283 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27284 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27285 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27286 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27287 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27288 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27289 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27290 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27291 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27292 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27293 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27294 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27295 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27296 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27297 { 9899 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27298 { 9899 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27299 { 9899 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27300 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27301 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27302 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27303 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27304 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27305 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27306 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27307 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27308 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27309 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27310 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27311 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27312 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27313 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27314 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27315 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27316 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27317 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27318 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27319 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27320 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27321 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27322 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27323 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27324 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27325 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27326 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27327 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27328 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27329 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27330 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27331 { 9911 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27332 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27333 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 27334 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27335 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27336 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 27337 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27338 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 27339 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27340 { 9911 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27341 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27342 { 9923 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27343 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27344 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 27345 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27346 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27347 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 27348 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27349 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 27350 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27351 { 9923 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27352 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27353 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27354 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 27355 { 9935 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27356 { 9935 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27357 { 9935 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 27358 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27359 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27360 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 27361 { 9944 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27362 { 9944 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27363 { 9944 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 27364 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27365 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27366 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, }, 27367 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27368 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27369 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, }, 27370 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27371 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27372 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27373 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27374 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27375 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27376 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27377 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27378 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27379 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27380 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27381 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27382 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27383 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27384 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27385 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27386 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27387 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27388 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27389 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27390 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27391 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27392 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27393 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27394 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27395 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27396 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27397 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27398 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27399 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27400 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27401 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27402 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27403 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27404 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27405 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27406 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27407 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27408 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27409 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27410 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27411 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27412 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27413 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27414 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27415 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27416 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27417 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27418 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27419 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27420 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27421 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27422 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27423 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27424 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27425 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27426 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27427 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27428 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27429 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27430 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27431 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27432 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27433 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27434 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27435 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27436 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27437 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27438 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27439 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27440 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27441 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27442 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27443 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27444 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27445 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27446 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27447 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27448 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27449 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27450 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27451 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27452 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27453 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27454 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27455 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27456 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27457 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27458 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27459 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27460 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27461 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27462 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27463 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27464 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27465 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27466 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27467 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27468 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27469 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27470 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27471 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27472 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27473 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27474 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27475 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27476 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27477 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27478 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27479 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27480 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27481 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27482 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27483 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27484 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27485 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27486 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27487 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27488 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27489 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27490 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27491 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27492 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27493 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27494 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27495 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27496 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27497 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27498 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27499 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27500 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27501 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27502 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27503 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27504 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27505 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27506 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27507 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27508 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27509 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27510 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27511 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27512 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27513 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27514 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27515 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27516 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27517 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27518 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27519 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27520 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27521 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27522 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27523 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27524 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27525 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27526 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27527 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27528 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27529 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27530 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27531 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27532 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27533 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27534 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27535 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27536 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27537 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27538 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27539 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27540 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27541 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27542 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27543 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27544 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27545 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27546 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27547 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27548 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27549 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27550 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27551 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27552 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27553 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27554 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27555 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27556 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27557 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27558 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27559 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27560 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27561 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27562 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27563 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27564 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27565 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27566 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27567 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27568 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27569 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27570 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27571 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27572 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27573 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27574 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27575 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27576 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 27577 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27578 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27579 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 27580 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27581 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27582 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 27583 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27584 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27585 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 27586 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27587 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27588 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27589 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27590 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27591 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27592 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27593 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27594 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27595 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27596 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27597 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27598 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27599 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27600 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27601 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27602 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27603 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27604 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27605 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27606 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27607 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27608 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27609 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27610 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27611 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27612 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27613 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27614 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27615 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27616 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27617 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27618 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27619 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27620 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27621 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27622 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27623 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27624 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27625 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27626 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27627 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27628 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27629 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27630 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27631 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27632 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27633 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27634 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27635 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27636 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27637 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27638 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27639 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27640 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27641 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27642 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27643 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27644 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27645 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27646 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27647 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27648 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27649 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27650 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27651 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27652 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27653 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27654 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27655 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27656 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27657 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 27658 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27659 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27660 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 27661 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27662 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 27663 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27664 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27665 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27666 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27667 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27668 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 27669 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27670 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27671 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 27672 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27673 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 27674 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27675 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27676 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27677 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27678 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27679 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27680 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27681 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27682 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27683 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27684 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27685 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27686 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27687 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27688 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27689 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27690 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27691 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27692 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27693 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27694 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27695 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27696 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27697 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27698 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27699 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27700 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27701 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27702 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27703 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27704 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27705 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27706 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27707 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27708 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27709 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27710 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27711 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27712 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27713 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27714 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27715 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27716 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27717 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27718 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27719 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27720 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27721 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27722 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27723 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27724 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27725 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27726 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27727 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27728 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27729 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27730 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27731 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27732 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27733 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27734 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27735 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27736 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27737 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27738 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27739 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27740 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27741 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27742 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27743 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27744 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27745 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27746 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27747 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 27748 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27749 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27750 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 27751 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27752 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 27753 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27754 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27755 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27756 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27757 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27758 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 27759 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27760 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27761 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 27762 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27763 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 27764 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27765 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27766 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27767 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27768 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27769 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27770 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27771 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27772 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27773 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27774 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27775 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27776 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27777 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27778 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27779 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27780 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27781 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27782 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27783 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27784 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27785 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27786 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27787 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27788 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27789 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27790 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27791 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27792 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27793 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27794 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27795 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27796 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27797 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27798 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27799 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27800 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27801 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27802 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27803 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27804 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27805 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27806 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27807 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27808 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27809 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27810 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27811 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27812 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27813 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27814 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27815 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27816 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27817 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27818 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27819 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27820 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27821 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27822 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27823 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27824 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27825 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27826 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27827 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27828 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27829 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27830 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27831 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27832 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27833 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27834 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27835 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 27836 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27837 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 27838 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27839 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27840 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 27841 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27842 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 27843 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27844 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27845 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27846 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 27847 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27848 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 27849 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27850 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27851 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 27852 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27853 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 27854 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27855 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 27856 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27857 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27858 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27859 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27860 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27861 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27862 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27863 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27864 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27865 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27866 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27867 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27868 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27869 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27870 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27871 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27872 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27873 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27874 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27875 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27876 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27877 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27878 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27879 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27880 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27881 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27882 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27883 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27884 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27885 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27886 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27887 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27888 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27889 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27890 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27891 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27892 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27893 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27894 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27895 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27896 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27897 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27898 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27899 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27900 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27901 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27902 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27903 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27904 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27905 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27906 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27907 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27908 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27909 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27910 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27911 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27912 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27913 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27914 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27915 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27916 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27917 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27918 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27919 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27920 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27921 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27922 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27923 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27924 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27925 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27926 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27927 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27928 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27929 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27930 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27931 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27932 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27933 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27934 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27935 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27936 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27937 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27938 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27939 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27940 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27941 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27942 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27943 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27944 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27945 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27946 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27947 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27948 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27949 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27950 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27951 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27952 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27953 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27954 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 27955 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 27956 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27957 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 27958 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27959 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27960 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27961 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27962 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27963 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27964 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27965 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 27966 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 27967 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 27968 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27969 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27970 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27971 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27972 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 27973 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 27974 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 27975 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 27976 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 27977 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 27978 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 27979 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 27980 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27981 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 27982 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 27983 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27984 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 27985 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 27986 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27987 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27988 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 27989 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 27990 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 27991 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 27992 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 27993 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 27994 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 27995 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 27996 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 27997 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 27998 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 27999 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28000 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28001 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28002 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28003 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28004 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28005 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28006 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28007 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28008 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28009 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28010 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28011 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28012 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28013 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28014 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28015 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28016 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28017 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28018 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28019 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28020 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28021 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28022 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28023 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28024 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28025 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28026 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28027 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28028 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28029 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28030 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28031 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28032 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28033 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28034 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28035 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28036 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28037 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28038 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28039 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28040 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28041 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28042 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28043 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28044 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28045 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28046 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28047 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28048 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28049 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28050 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28051 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28052 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28053 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28054 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28055 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28056 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28057 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28058 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28059 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28060 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28061 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28062 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28063 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28064 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28065 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28066 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28067 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28068 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28069 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28070 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28071 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28072 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28073 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28074 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28075 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28076 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28077 { 10343 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28078 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28079 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28080 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28081 { 10352 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28082 { 10352 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28083 { 10352 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28084 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28085 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28086 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, }, 28087 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28088 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28089 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, }, 28090 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28091 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28092 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28093 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28094 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28095 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28096 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28097 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28098 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28099 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28100 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28101 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28102 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28103 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28104 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28105 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28106 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28107 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28108 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28109 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28110 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28111 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28112 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28113 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28114 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28115 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28116 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28117 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28118 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28119 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28120 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28121 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28122 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28123 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28124 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28125 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28126 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28127 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28128 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28129 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28130 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28131 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28132 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28133 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28134 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28135 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28136 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28137 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28138 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28139 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28140 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28141 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28142 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28143 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28144 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28145 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28146 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28147 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28148 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28149 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28150 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28151 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28152 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28153 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28154 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28155 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28156 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28157 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28158 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28159 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28160 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28161 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28162 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28163 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28164 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28165 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28166 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28167 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28168 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28169 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28170 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28171 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28172 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28173 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28174 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28175 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28176 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28177 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28178 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28179 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28180 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28181 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28182 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28183 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28184 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28185 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28186 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28187 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28188 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28189 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28190 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28191 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28192 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28193 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28194 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28195 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28196 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28197 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28198 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28199 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28200 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28201 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28202 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28203 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28204 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28205 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28206 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28207 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28208 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28209 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28210 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28211 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28212 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28213 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28214 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28215 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28216 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28217 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28218 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28219 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28220 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28221 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28222 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28223 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28224 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28225 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28226 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28227 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28228 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28229 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28230 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28231 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28232 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28233 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28234 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28235 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28236 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28237 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28238 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28239 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28240 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28241 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28242 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28243 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28244 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28245 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28246 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28247 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28248 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28249 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28250 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28251 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28252 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28253 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28254 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28255 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28256 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28257 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28258 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28259 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28260 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28261 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28262 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28263 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28264 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28265 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28266 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28267 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28268 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28269 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28270 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28271 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28272 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28273 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28274 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28275 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28276 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28277 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28278 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28279 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28280 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28281 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28282 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28283 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28284 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28285 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28286 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28287 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28288 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28289 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28290 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28291 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28292 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28293 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28294 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28295 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28296 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28297 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28298 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28299 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28300 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28301 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28302 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28303 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28304 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28305 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28306 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28307 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28308 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28309 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28310 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28311 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28312 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28313 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28314 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28315 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28316 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28317 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28318 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28319 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28320 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28321 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28322 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28323 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28324 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28325 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28326 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28327 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28328 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28329 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28330 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28331 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28332 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28333 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28334 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28335 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28336 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28337 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28338 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28339 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28340 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28341 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28342 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28343 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28344 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28345 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28346 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28347 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28348 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28349 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28350 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28351 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28352 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28353 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28354 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28355 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28356 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28357 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28358 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28359 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28360 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28361 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28362 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28363 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28364 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28365 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28366 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28367 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28368 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28369 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28370 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28371 { 10545 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28372 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28373 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28374 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, }, 28375 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28376 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28377 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, }, 28378 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28379 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28380 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28381 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28382 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28383 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28384 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28385 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28386 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28387 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28388 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28389 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28390 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28391 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28392 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28393 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28394 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28395 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28396 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28397 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28398 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28399 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28400 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28401 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28402 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28403 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28404 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28405 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28406 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28407 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28408 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28409 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28410 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28411 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28412 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28413 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28414 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28415 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28416 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28417 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28418 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28419 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28420 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28421 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28422 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28423 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28424 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28425 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28426 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28427 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28428 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28429 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28430 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28431 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28432 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28433 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28434 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28435 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28436 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28437 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28438 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28439 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28440 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28441 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28442 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28443 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28444 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28445 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28446 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28447 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28448 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28449 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28450 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28451 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28452 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28453 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28454 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28455 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28456 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28457 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28458 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28459 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28460 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28461 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28462 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28463 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28464 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28465 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28466 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28467 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28468 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28469 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28470 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28471 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28472 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28473 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28474 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28475 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28476 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28477 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28478 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28479 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28480 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28481 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28482 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28483 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28484 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28485 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28486 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28487 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28488 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28489 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28490 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28491 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28492 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28493 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28494 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28495 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28496 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28497 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28498 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28499 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28500 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28501 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28502 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28503 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28504 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28505 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28506 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28507 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28508 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28509 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28510 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28511 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28512 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28513 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28514 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28515 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28516 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28517 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28518 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28519 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28520 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28521 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28522 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28523 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28524 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28525 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28526 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28527 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28528 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28529 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28530 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28531 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28532 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28533 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28534 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28535 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28536 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28537 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28538 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28539 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28540 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28541 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28542 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28543 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28544 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28545 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28546 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28547 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28548 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28549 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28550 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28551 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28552 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28553 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28554 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28555 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28556 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28557 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28558 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28559 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28560 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28561 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28562 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28563 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28564 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28565 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28566 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28567 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28568 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28569 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28570 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28571 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28572 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28573 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28574 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28575 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28576 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28577 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28578 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28579 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28580 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28581 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28582 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28583 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28584 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28585 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28586 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28587 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28588 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28589 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28590 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28591 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28592 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28593 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28594 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28595 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28596 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28597 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28598 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28599 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28600 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28601 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28602 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28603 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28604 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28605 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28606 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28607 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28608 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28609 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28610 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28611 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28612 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28613 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28614 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28615 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28616 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28617 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28618 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28619 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28620 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28621 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28622 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28623 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28624 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 28625 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28626 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28627 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28628 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28629 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28630 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28631 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28632 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28633 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28634 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28635 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28636 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28637 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28638 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28639 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28640 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28641 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28642 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28643 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28644 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28645 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28646 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28647 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 28648 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28649 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28650 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28651 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28652 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28653 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28654 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28655 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28656 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 28657 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28658 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28659 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 28660 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28661 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 28662 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, }, 28663 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28664 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 28665 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, }, 28666 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28667 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28668 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28669 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28670 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28671 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28672 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28673 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28674 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28675 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28676 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28677 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28678 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28679 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28680 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28681 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28682 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28683 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28684 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28685 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28686 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28687 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28688 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28689 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28690 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 28691 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28692 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28693 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28694 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28695 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28696 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28697 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28698 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28699 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 28700 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28701 { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28702 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28703 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 28704 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28705 { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 28706 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28707 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 28708 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28709 { 10876 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 28710 { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 28711 { 10887 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 28712 { 10887 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 28713 { 10887 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 28714 { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 28715 { 10895 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 28716 { 10895 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 28717 { 10895 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 28718 { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 28719 { 10903 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 28720 { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 28721 { 10911 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 28722 { 10919 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 28723 { 10919 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, }, 28724 { 10919 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, }, 28725 { 10919 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, }, 28726 { 10919 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, }, 28727 { 10930 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 28728 { 10930 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 28729 { 10930 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, }, 28730 { 10930 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, }, 28731 { 10930 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 28732 { 10941 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, }, 28733 { 10955 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 28734 { 10969 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 28735 { 10983 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, }, 28736 { 10997 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, }, 28737 { 11011 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 28738 { 11025 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 28739 { 11039 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, }, 28740 { 11053 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 28741 { 11053 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 28742 { 11053 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, }, 28743 { 11053 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, }, 28744 { 11053 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 28745 { 11064 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, }, 28746 { 11064 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, }, 28747 { 11064 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, }, 28748 { 11064 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, }, 28749 { 11064 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, }, 28750 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 28751 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 28752 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 28753 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 28754 { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 28755 { 11075 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 28756 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 28757 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 28758 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 28759 { 11075 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 28760 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 28761 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 28762 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 28763 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 28764 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 28765 { 11075 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 28766 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 28767 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 28768 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 28769 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 28770 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 28771 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 28772 { 11075 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 28773 { 11075 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 28774 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 28775 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 28776 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 28777 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 28778 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 28779 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 28780 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 28781 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 28782 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 28783 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 28784 { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 28785 { 11085 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 28786 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 28787 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 28788 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 28789 { 11085 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 28790 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 28791 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 28792 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 28793 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 28794 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 28795 { 11085 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 28796 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 28797 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 28798 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 28799 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 28800 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 28801 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 28802 { 11085 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 28803 { 11085 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 28804 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 28805 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 28806 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 28807 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 28808 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 28809 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 28810 { 11095 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28811 { 11095 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 28812 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 28813 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28814 { 11095 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 28815 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28816 { 11095 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 28817 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 28818 { 11095 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 28819 { 11105 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28820 { 11105 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 28821 { 11105 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 28822 { 11105 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28823 { 11105 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 28824 { 11105 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28825 { 11105 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 28826 { 11105 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 28827 { 11105 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 28828 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28829 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28830 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28831 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28832 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28833 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28834 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28835 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28836 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28837 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28838 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28839 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28840 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28841 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28842 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28843 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28844 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28845 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28846 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28847 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28848 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28849 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28850 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28851 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28852 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28853 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28854 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28855 { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28856 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28857 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28858 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28859 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28860 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28861 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28862 { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28863 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28864 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28865 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28866 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28867 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 28868 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28869 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28870 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28871 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28872 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28873 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28874 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28875 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28876 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28877 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28878 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28879 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28880 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28881 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28882 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28883 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 28884 { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28885 { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28886 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28887 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 28888 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28889 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 28890 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28891 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28892 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 28893 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28894 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 28895 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28896 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28897 { 11148 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28898 { 11148 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 28899 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28900 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28901 { 11148 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 28902 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28903 { 11148 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 28904 { 11148 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28905 { 11148 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 28906 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 28907 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28908 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 28909 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28910 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28911 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28912 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28913 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28914 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28915 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28916 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28917 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28918 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28919 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28920 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28921 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28922 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28923 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28924 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28925 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28926 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28927 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28928 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28929 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28930 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28931 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28932 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28933 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28934 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28935 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28936 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28937 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 28938 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28939 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 28940 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28941 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28942 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28943 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28944 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28945 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28946 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28947 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28948 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28949 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28950 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28951 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28952 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28953 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28954 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28955 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28956 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 28957 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 28958 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28959 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 28960 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 28961 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28962 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 28963 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 28964 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28965 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 28966 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 28967 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 28968 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28969 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28970 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28971 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28972 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 28973 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 28974 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 28975 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 28976 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 28977 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 28978 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 28979 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 28980 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 28981 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 28982 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 28983 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 28984 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 28985 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 28986 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 28987 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 28988 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 28989 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 28990 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28991 { 11203 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28992 { 11203 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28993 { 11203 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28994 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28995 { 11211 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 28996 { 11211 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 28997 { 11211 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 28998 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 28999 { 11219 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29000 { 11219 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29001 { 11219 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29002 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29003 { 11227 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29004 { 11227 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29005 { 11227 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29006 { 11235 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, }, 29007 { 11235 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29008 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29009 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29010 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29011 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29012 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29013 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29014 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29015 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29016 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29017 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29018 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29019 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29020 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29021 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29022 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29023 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29024 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29025 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29026 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29027 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29028 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29029 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29030 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29031 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29032 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29033 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29034 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29035 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29036 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29037 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29038 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29039 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29040 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29041 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29042 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29043 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29044 { 11299 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, }, 29045 { 11299 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29046 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29047 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29048 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29049 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29050 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29051 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29052 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29053 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29054 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29055 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29056 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29057 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29058 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29059 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29060 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29061 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29062 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29063 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29064 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29065 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29066 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29067 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29068 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29069 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29070 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29071 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29072 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29073 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29074 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29075 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29076 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29077 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29078 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29079 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29080 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 29081 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29082 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 29083 { 11363 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 29084 { 11363 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 29085 { 11363 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 29086 { 11373 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29087 { 11373 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29088 { 11380 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 29089 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, }, 29090 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, }, 29091 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29092 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29093 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 29094 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 29095 { 11412 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29096 { 11412 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29097 { 11412 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 29098 { 11412 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 29099 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29100 { 11423 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29101 { 11423 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29102 { 11423 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29103 { 11423 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29104 { 11423 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29105 { 11423 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29106 { 11423 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29107 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29108 { 11423 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29109 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29110 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29111 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29112 { 11423 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29113 { 11423 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29114 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29115 { 11423 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29116 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29117 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29118 { 11423 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29119 { 11423 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29120 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29121 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29122 { 11423 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29123 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29124 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29125 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29126 { 11423 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29127 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29128 { 11423 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29129 { 11423 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29130 { 11423 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29131 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29132 { 11423 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29133 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29134 { 11430 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29135 { 11430 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29136 { 11430 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29137 { 11430 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29138 { 11430 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29139 { 11430 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29140 { 11430 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29141 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29142 { 11430 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29143 { 11430 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29144 { 11430 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29145 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29146 { 11430 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29147 { 11430 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29148 { 11430 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29149 { 11430 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29150 { 11430 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29151 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29152 { 11430 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29153 { 11430 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29154 { 11430 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29155 { 11430 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29156 { 11430 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29157 { 11430 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29158 { 11430 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29159 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29160 { 11430 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29161 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29162 { 11430 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29163 { 11430 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29164 { 11430 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29165 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29166 { 11430 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29167 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29168 { 11437 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29169 { 11437 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29170 { 11437 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29171 { 11437 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29172 { 11437 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29173 { 11437 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 29174 { 11437 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29175 { 11437 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 29176 { 11437 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29177 { 11437 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29178 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29179 { 11444 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 29180 { 11444 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29181 { 11444 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 29182 { 11444 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29183 { 11444 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29184 { 11444 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 29185 { 11444 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29186 { 11444 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 29187 { 11444 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29188 { 11444 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29189 { 11451 /* vmcall */, X86::VMCALL, Convert_NoOperands, AMFBS_None, { }, }, 29190 { 11458 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 29191 { 11466 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, AMFBS_None, { }, }, 29192 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29193 { 11473 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29194 { 11473 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29195 { 11473 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29196 { 11473 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29197 { 11473 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29198 { 11473 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29199 { 11473 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29200 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29201 { 11473 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29202 { 11473 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29203 { 11473 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29204 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29205 { 11473 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29206 { 11473 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29207 { 11473 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29208 { 11473 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29209 { 11473 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29210 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29211 { 11473 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29212 { 11473 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29213 { 11473 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29214 { 11473 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29215 { 11473 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29216 { 11473 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29217 { 11473 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29218 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29219 { 11473 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29220 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29221 { 11473 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29222 { 11473 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29223 { 11473 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29224 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29225 { 11473 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29226 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29227 { 11480 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29228 { 11480 /* vminps */, X86::VMINPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29229 { 11480 /* vminps */, X86::VMINPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29230 { 11480 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29231 { 11480 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29232 { 11480 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29233 { 11480 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29234 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29235 { 11480 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29236 { 11480 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29237 { 11480 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29238 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29239 { 11480 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29240 { 11480 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29241 { 11480 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29242 { 11480 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29243 { 11480 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29244 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29245 { 11480 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29246 { 11480 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29247 { 11480 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29248 { 11480 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29249 { 11480 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29250 { 11480 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29251 { 11480 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29252 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29253 { 11480 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29254 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29255 { 11480 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29256 { 11480 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29257 { 11480 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29258 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 29259 { 11480 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29260 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29261 { 11487 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29262 { 11487 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29263 { 11487 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29264 { 11487 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29265 { 11487 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29266 { 11487 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 29267 { 11487 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29268 { 11487 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 29269 { 11487 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29270 { 11487 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29271 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29272 { 11494 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 29273 { 11494 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29274 { 11494 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 29275 { 11494 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29276 { 11494 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29277 { 11494 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 29278 { 11494 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29279 { 11494 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 29280 { 11494 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29281 { 11494 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 29282 { 11501 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, AMFBS_None, { }, }, 29283 { 11510 /* vmload */, X86::VMLOAD32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 29284 { 11510 /* vmload */, X86::VMLOAD64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 29285 { 11517 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, AMFBS_None, { }, }, 29286 { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29287 { 11525 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29288 { 11525 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29289 { 11525 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29290 { 11525 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29291 { 11525 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29292 { 11525 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29293 { 11525 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29294 { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29295 { 11525 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29296 { 11525 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29297 { 11525 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29298 { 11525 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29299 { 11525 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29300 { 11525 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29301 { 11525 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29302 { 11525 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29303 { 11525 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29304 { 11525 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29305 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29306 { 11525 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29307 { 11525 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29308 { 11525 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29309 { 11525 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29310 { 11525 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29311 { 11525 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29312 { 11525 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29313 { 11525 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29314 { 11525 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29315 { 11525 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29316 { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29317 { 11533 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29318 { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29319 { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29320 { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29321 { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29322 { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29323 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29324 { 11533 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29325 { 11533 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29326 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29327 { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29328 { 11543 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29329 { 11543 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29330 { 11543 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29331 { 11543 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29332 { 11543 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29333 { 11543 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29334 { 11543 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29335 { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29336 { 11543 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29337 { 11543 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29338 { 11543 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29339 { 11543 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29340 { 11543 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29341 { 11543 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29342 { 11543 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29343 { 11543 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29344 { 11543 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29345 { 11543 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29346 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29347 { 11543 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29348 { 11543 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29349 { 11543 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29350 { 11543 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29351 { 11543 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29352 { 11543 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29353 { 11543 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29354 { 11543 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29355 { 11543 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29356 { 11543 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29357 { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29358 { 11551 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29359 { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29360 { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29361 { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29362 { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29363 { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29364 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29365 { 11551 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29366 { 11551 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29367 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29368 { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, }, 29369 { 11561 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 29370 { 11561 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 29371 { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, }, 29372 { 11561 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, }, 29373 { 11561 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 29374 { 11561 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 29375 { 11561 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 29376 { 11561 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 29377 { 11561 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 29378 { 11561 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 29379 { 11561 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 29380 { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29381 { 11567 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 29382 { 11567 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29383 { 11567 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29384 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29385 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 29386 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29387 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29388 { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29389 { 11567 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29390 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29391 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 29392 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29393 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29394 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29395 { 11567 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29396 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29397 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 29398 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29399 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29400 { 11567 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29401 { 11567 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29402 { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29403 { 11576 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29404 { 11576 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29405 { 11576 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29406 { 11576 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29407 { 11576 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29408 { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29409 { 11584 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29410 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29411 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29412 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29413 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29414 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29415 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29416 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29417 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29418 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29419 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29420 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29421 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29422 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29423 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29424 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29425 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29426 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29427 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29428 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29429 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29430 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29431 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29432 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29433 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29434 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29435 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29436 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29437 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29438 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29439 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29440 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29441 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29442 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29443 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29444 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29445 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29446 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29447 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29448 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29449 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29450 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29451 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29452 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29453 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29454 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29455 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29456 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29457 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29458 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29459 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29460 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29461 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29462 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29463 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29464 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29465 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29466 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29467 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29468 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29469 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29470 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29471 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29472 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29473 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29474 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29475 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29476 { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29477 { 11638 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29478 { 11638 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29479 { 11638 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29480 { 11638 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29481 { 11638 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29482 { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29483 { 11646 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29484 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29485 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29486 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29487 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29488 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29489 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29490 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29491 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29492 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29493 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29494 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29495 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29496 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29497 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29498 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29499 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29500 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29501 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29502 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29503 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29504 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29505 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29506 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29507 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29508 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29509 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29510 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29511 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29512 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29513 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29514 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29515 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29516 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29517 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29518 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29519 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29520 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29521 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29522 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29523 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29524 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29525 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29526 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29527 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29528 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29529 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29530 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29531 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29532 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29533 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29534 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29535 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29536 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29537 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29538 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29539 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29540 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29541 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29542 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29543 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29544 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29545 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29546 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29547 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29548 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29549 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29550 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29551 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29552 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29553 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29554 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29555 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29556 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29557 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29558 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29559 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29560 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29561 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29562 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29563 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29564 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29565 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29566 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29567 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29568 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29569 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29570 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29571 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29572 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29573 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29574 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29575 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29576 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29577 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29578 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29579 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29580 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29581 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29582 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29583 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29584 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29585 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29586 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29587 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29588 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29589 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29590 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29591 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29592 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29593 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29594 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29595 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29596 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29597 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29598 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29599 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29600 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29601 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29602 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29603 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29604 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29605 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29606 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29607 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29608 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29609 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29610 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29611 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29612 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29613 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29614 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29615 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29616 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29617 { 11742 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29618 { 11751 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 29619 { 11751 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 29620 { 11751 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29621 { 11751 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29622 { 11759 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 29623 { 11759 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 29624 { 11759 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29625 { 11759 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29626 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29627 { 11767 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29628 { 11776 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 29629 { 11776 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 29630 { 11776 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29631 { 11776 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29632 { 11784 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 29633 { 11784 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 29634 { 11784 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29635 { 11784 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29636 { 11792 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, }, 29637 { 11792 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, }, 29638 { 11802 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, }, 29639 { 11802 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, }, 29640 { 11812 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29641 { 11812 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29642 { 11812 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29643 { 11812 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29644 { 11812 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29645 { 11821 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29646 { 11821 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29647 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29648 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29649 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29650 { 11831 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29651 { 11831 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29652 { 11831 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29653 { 11831 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29654 { 11831 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29655 { 11840 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29656 { 11840 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29657 { 11840 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29658 { 11840 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29659 { 11840 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29660 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29661 { 11849 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, }, 29662 { 11849 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 29663 { 11849 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, }, 29664 { 11849 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, }, 29665 { 11849 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 29666 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29667 { 11849 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 29668 { 11849 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 29669 { 11849 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 29670 { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29671 { 11855 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29672 { 11863 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 29673 { 11863 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 29674 { 11863 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, }, 29675 { 11863 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 29676 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29677 { 11863 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29678 { 11863 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 29679 { 11863 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29680 { 11863 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 29681 { 11863 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29682 { 11863 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29683 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29684 { 11870 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29685 { 11870 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29686 { 11870 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29687 { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29688 { 11879 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29689 { 11879 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29690 { 11879 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29691 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29692 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29693 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29694 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29695 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29696 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29697 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29698 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29699 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29700 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29701 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29702 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29703 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29704 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29705 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29706 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29707 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29708 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29709 { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29710 { 11889 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29711 { 11889 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29712 { 11889 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29713 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29714 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29715 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29716 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29717 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29718 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29719 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29720 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29721 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29722 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29723 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29724 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29725 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29726 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29727 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29728 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29729 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29730 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29731 { 11899 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 29732 { 11899 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 29733 { 11899 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, }, 29734 { 11899 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 29735 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29736 { 11899 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29737 { 11899 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 29738 { 11899 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29739 { 11899 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 29740 { 11899 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29741 { 11899 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29742 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29743 { 11906 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29744 { 11906 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29745 { 11906 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29746 { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29747 { 11915 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29748 { 11915 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29749 { 11915 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29750 { 11915 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29751 { 11915 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29752 { 11915 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29753 { 11915 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29754 { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29755 { 11915 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29756 { 11915 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29757 { 11915 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29758 { 11915 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29759 { 11915 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29760 { 11915 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29761 { 11915 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29762 { 11915 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29763 { 11915 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29764 { 11915 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29765 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29766 { 11915 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29767 { 11915 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29768 { 11915 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29769 { 11915 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29770 { 11915 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29771 { 11915 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29772 { 11915 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29773 { 11915 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29774 { 11915 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29775 { 11915 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29776 { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29777 { 11923 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29778 { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29779 { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29780 { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29781 { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29782 { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29783 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29784 { 11923 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29785 { 11923 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29786 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29787 { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29788 { 11933 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 29789 { 11933 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29790 { 11933 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 29791 { 11933 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29792 { 11933 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 29793 { 11933 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29794 { 11933 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 29795 { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29796 { 11933 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 29797 { 11933 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, }, 29798 { 11933 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 29799 { 11933 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, }, 29800 { 11933 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 29801 { 11933 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 29802 { 11933 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29803 { 11933 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 29804 { 11933 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29805 { 11933 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 29806 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29807 { 11933 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 29808 { 11933 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29809 { 11933 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29810 { 11933 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29811 { 11933 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29812 { 11933 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 29813 { 11933 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29814 { 11933 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 29815 { 11933 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29816 { 11933 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 29817 { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 29818 { 11941 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 29819 { 11941 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 29820 { 11941 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 29821 { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 29822 { 11941 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 29823 { 11941 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 29824 { 11941 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 29825 { 11941 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 29826 { 11941 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 29827 { 11941 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 29828 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 29829 { 11951 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 29830 { 11951 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 29831 { 11951 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 29832 { 11960 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 29833 { 11968 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 29834 { 11976 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, }, 29835 { 11976 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, }, 29836 { 11976 /* vmread */, X86::VMREAD32mr, Convert__Mem325_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem32, MCK_GR32 }, }, 29837 { 11976 /* vmread */, X86::VMREAD64mr, Convert__Mem645_0__Reg1_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_GR64 }, }, 29838 { 11999 /* vmresume */, X86::VMRESUME, Convert_NoOperands, AMFBS_None, { }, }, 29839 { 12008 /* vmrun */, X86::VMRUN32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 29840 { 12008 /* vmrun */, X86::VMRUN64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 29841 { 12014 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, }, 29842 { 12014 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, }, 29843 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29844 { 12021 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29845 { 12021 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29846 { 12021 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29847 { 12021 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29848 { 12021 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29849 { 12021 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29850 { 12021 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29851 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29852 { 12021 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29853 { 12021 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29854 { 12021 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29855 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 29856 { 12021 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29857 { 12021 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29858 { 12021 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29859 { 12021 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29860 { 12021 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29861 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29862 { 12021 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29863 { 12021 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29864 { 12021 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29865 { 12021 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29866 { 12021 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29867 { 12021 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29868 { 12021 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29869 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29870 { 12021 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29871 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 29872 { 12021 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29873 { 12021 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29874 { 12021 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29875 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 29876 { 12021 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29877 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29878 { 12028 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29879 { 12028 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29880 { 12028 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29881 { 12028 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29882 { 12028 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29883 { 12028 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29884 { 12028 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29885 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29886 { 12028 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29887 { 12028 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29888 { 12028 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29889 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 29890 { 12028 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29891 { 12028 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29892 { 12028 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29893 { 12028 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29894 { 12028 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29895 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29896 { 12028 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29897 { 12028 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29898 { 12028 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29899 { 12028 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29900 { 12028 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29901 { 12028 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29902 { 12028 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29903 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29904 { 12028 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29905 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 29906 { 12028 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29907 { 12028 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29908 { 12028 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29909 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 29910 { 12028 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29911 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29912 { 12035 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 29913 { 12035 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29914 { 12035 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 29915 { 12035 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 29916 { 12035 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29917 { 12035 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 29918 { 12035 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29919 { 12035 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 29920 { 12035 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 29921 { 12035 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 29922 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29923 { 12042 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 29924 { 12042 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29925 { 12042 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 29926 { 12042 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 29927 { 12042 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29928 { 12042 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 29929 { 12042 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29930 { 12042 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 29931 { 12042 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 29932 { 12042 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 29933 { 12049 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, }, 29934 { 12049 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, }, 29935 { 12049 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, }, 29936 { 12049 /* vmwrite */, X86::VMWRITE64rm, Convert__Reg1_0__Mem645_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem64 }, }, 29937 { 12075 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, AMFBS_None, { }, }, 29938 { 12082 /* vmxon */, X86::VMXON, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, }, 29939 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29940 { 12088 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29941 { 12088 /* vorpd */, X86::VORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29942 { 12088 /* vorpd */, X86::VORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29943 { 12088 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29944 { 12088 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29945 { 12088 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29946 { 12088 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29947 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29948 { 12088 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29949 { 12088 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29950 { 12088 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29951 { 12088 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29952 { 12088 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29953 { 12088 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29954 { 12088 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29955 { 12088 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29956 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29957 { 12088 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29958 { 12088 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29959 { 12088 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29960 { 12088 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29961 { 12088 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29962 { 12088 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29963 { 12088 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29964 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29965 { 12088 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29966 { 12088 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29967 { 12088 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 29968 { 12088 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 29969 { 12088 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 29970 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 29971 { 12094 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 29972 { 12094 /* vorps */, X86::VORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 29973 { 12094 /* vorps */, X86::VORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 29974 { 12094 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 29975 { 12094 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 29976 { 12094 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 29977 { 12094 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 29978 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 29979 { 12094 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 29980 { 12094 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29981 { 12094 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29982 { 12094 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29983 { 12094 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 29984 { 12094 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 29985 { 12094 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 29986 { 12094 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 29987 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 29988 { 12094 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 29989 { 12094 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 29990 { 12094 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 29991 { 12094 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29992 { 12094 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 29993 { 12094 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 29994 { 12094 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 29995 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 29996 { 12094 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 29997 { 12094 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 29998 { 12094 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 29999 { 12094 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30000 { 12094 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30001 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_VR512 }, }, 30002 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrm, Convert__VK16Pair1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_Mem512 }, }, 30003 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ128rr, Convert__VK4Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK4Pair, MCK_FR32X, MCK_FR32X }, }, 30004 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ128rm, Convert__VK4Pair1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK4Pair, MCK_FR32X, MCK_Mem128 }, }, 30005 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ256rr, Convert__VK8Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK8Pair, MCK_VR256X, MCK_VR256X }, }, 30006 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ256rm, Convert__VK8Pair1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK8Pair, MCK_VR256X, MCK_Mem256 }, }, 30007 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrmb, Convert__VK16Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30008 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ128rmb, Convert__VK4Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK4Pair, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30009 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZ256rmb, Convert__VK8Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK8Pair, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30010 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ128rr, Convert__VK2Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK2Pair, MCK_FR32X, MCK_FR32X }, }, 30011 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ128rm, Convert__VK2Pair1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK2Pair, MCK_FR32X, MCK_Mem128 }, }, 30012 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ256rr, Convert__VK4Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK4Pair, MCK_VR256X, MCK_VR256X }, }, 30013 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ256rm, Convert__VK4Pair1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK4Pair, MCK_VR256X, MCK_Mem256 }, }, 30014 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_VR512 }, }, 30015 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrm, Convert__VK8Pair1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_Mem512 }, }, 30016 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ128rmb, Convert__VK2Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK2Pair, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30017 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZ256rmb, Convert__VK4Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK4Pair, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30018 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrmb, Convert__VK8Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30019 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 30020 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 30021 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 30022 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 30023 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 30024 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 30025 { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30026 { 12149 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 30027 { 12149 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 30028 { 12149 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 30029 { 12149 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30030 { 12149 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 30031 { 12149 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 30032 { 12149 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 30033 { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 30034 { 12149 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 30035 { 12149 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30036 { 12149 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 30037 { 12149 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 30038 { 12149 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 30039 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 30040 { 12149 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 30041 { 12149 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30042 { 12149 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 30043 { 12149 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 30044 { 12149 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 30045 { 12149 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 30046 { 12149 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 30047 { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30048 { 12156 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 30049 { 12156 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 30050 { 12156 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 30051 { 12156 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30052 { 12156 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 30053 { 12156 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 30054 { 12156 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 30055 { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 30056 { 12156 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 30057 { 12156 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30058 { 12156 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30059 { 12156 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30060 { 12156 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30061 { 12156 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 30062 { 12156 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 30063 { 12156 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 30064 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 30065 { 12156 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 30066 { 12156 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30067 { 12156 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 30068 { 12156 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 30069 { 12156 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 30070 { 12156 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 30071 { 12156 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 30072 { 12156 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 30073 { 12156 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 30074 { 12156 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 30075 { 12156 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 30076 { 12156 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 30077 { 12156 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 30078 { 12163 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30079 { 12163 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 30080 { 12163 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 30081 { 12163 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 30082 { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 30083 { 12163 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 30084 { 12163 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30085 { 12163 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30086 { 12163 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30087 { 12163 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30088 { 12163 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 30089 { 12163 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 30090 { 12163 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 30091 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 30092 { 12163 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 30093 { 12163 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30094 { 12163 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 30095 { 12163 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 30096 { 12163 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 30097 { 12163 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 30098 { 12163 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 30099 { 12163 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 30100 { 12163 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 30101 { 12163 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 30102 { 12163 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 30103 { 12163 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 30104 { 12163 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 30105 { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30106 { 12170 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 30107 { 12170 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 30108 { 12170 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 30109 { 12170 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30110 { 12170 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 30111 { 12170 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 30112 { 12170 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 30113 { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 30114 { 12170 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 30115 { 12170 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30116 { 12170 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 30117 { 12170 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 30118 { 12170 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 30119 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 30120 { 12170 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 30121 { 12170 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30122 { 12170 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 30123 { 12170 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 30124 { 12170 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 30125 { 12170 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 30126 { 12170 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 30127 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30128 { 12177 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30129 { 12177 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30130 { 12177 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30131 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30132 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30133 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30134 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30135 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30136 { 12177 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30137 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30138 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30139 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30140 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30141 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30142 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30143 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30144 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30145 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30146 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30147 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30148 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30149 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30150 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30151 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30152 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30153 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30154 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30155 { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30156 { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30157 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30158 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30159 { 12187 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30160 { 12187 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30161 { 12187 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30162 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30163 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30164 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30165 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30166 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30167 { 12187 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30168 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30169 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30170 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30171 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30172 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30173 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30174 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30175 { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30176 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30177 { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30178 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30179 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30180 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30181 { 12197 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30182 { 12197 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30183 { 12197 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30184 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30185 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30186 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30187 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30188 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30189 { 12197 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30190 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30191 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30192 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30193 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30194 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30195 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30196 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30197 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30198 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30199 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30200 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30201 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30202 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30203 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30204 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30205 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30206 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30207 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30208 { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30209 { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30210 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30211 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30212 { 12207 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30213 { 12207 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30214 { 12207 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30215 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30216 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30217 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30218 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30219 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30220 { 12207 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30221 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30222 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30223 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30224 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30225 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30226 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30227 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30228 { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30229 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30230 { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30231 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30232 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30233 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30234 { 12217 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30235 { 12217 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30236 { 12217 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30237 { 12217 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30238 { 12217 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30239 { 12217 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30240 { 12217 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30241 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30242 { 12217 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30243 { 12217 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30244 { 12217 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30245 { 12217 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30246 { 12217 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30247 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30248 { 12217 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30249 { 12217 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30250 { 12217 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30251 { 12217 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30252 { 12217 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30253 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30254 { 12217 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30255 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30256 { 12224 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30257 { 12224 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30258 { 12224 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30259 { 12224 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30260 { 12224 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30261 { 12224 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30262 { 12224 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30263 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30264 { 12224 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30265 { 12224 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30266 { 12224 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30267 { 12224 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30268 { 12224 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30269 { 12224 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30270 { 12224 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30271 { 12224 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30272 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30273 { 12224 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30274 { 12224 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30275 { 12224 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30276 { 12224 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30277 { 12224 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30278 { 12224 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30279 { 12224 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30280 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30281 { 12224 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30282 { 12224 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30283 { 12224 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30284 { 12224 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30285 { 12224 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30286 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30287 { 12231 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30288 { 12231 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30289 { 12231 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30290 { 12231 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30291 { 12231 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30292 { 12231 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30293 { 12231 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30294 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30295 { 12231 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30296 { 12231 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30297 { 12231 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30298 { 12231 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30299 { 12231 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30300 { 12231 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30301 { 12231 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30302 { 12231 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30303 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30304 { 12231 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30305 { 12231 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30306 { 12231 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30307 { 12231 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30308 { 12231 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30309 { 12231 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30310 { 12231 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30311 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30312 { 12231 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30313 { 12231 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30314 { 12231 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30315 { 12231 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30316 { 12231 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30317 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30318 { 12238 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30319 { 12238 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30320 { 12238 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30321 { 12238 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30322 { 12238 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30323 { 12238 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30324 { 12238 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30325 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30326 { 12238 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30327 { 12238 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30328 { 12238 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30329 { 12238 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30330 { 12238 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30331 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30332 { 12238 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30333 { 12238 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30334 { 12238 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30335 { 12238 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30336 { 12238 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30337 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30338 { 12238 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30339 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30340 { 12246 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30341 { 12246 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30342 { 12246 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30343 { 12246 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30344 { 12246 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30345 { 12246 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30346 { 12246 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30347 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30348 { 12246 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30349 { 12246 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30350 { 12246 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30351 { 12246 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30352 { 12246 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30353 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30354 { 12246 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30355 { 12246 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30356 { 12246 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30357 { 12246 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30358 { 12246 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30359 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30360 { 12246 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30361 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30362 { 12254 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30363 { 12254 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30364 { 12254 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30365 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30366 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30367 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30368 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30369 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30370 { 12254 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30371 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30372 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30373 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30374 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30375 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30376 { 12254 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30377 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30378 { 12254 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30379 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30380 { 12254 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30381 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30382 { 12254 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30383 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30384 { 12263 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30385 { 12263 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30386 { 12263 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30387 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30388 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30389 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30390 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30391 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30392 { 12263 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30393 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30394 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30395 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30396 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30397 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30398 { 12263 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30399 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30400 { 12263 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30401 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30402 { 12263 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30403 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30404 { 12263 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30405 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30406 { 12272 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30407 { 12272 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30408 { 12272 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30409 { 12272 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30410 { 12272 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30411 { 12272 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30412 { 12272 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30413 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30414 { 12272 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30415 { 12272 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30416 { 12272 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30417 { 12272 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30418 { 12272 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30419 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30420 { 12272 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30421 { 12272 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30422 { 12272 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30423 { 12272 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30424 { 12272 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30425 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30426 { 12272 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30427 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 30428 { 12279 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30429 { 12279 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 30430 { 12279 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30431 { 12279 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30432 { 12279 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30433 { 12279 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30434 { 12279 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30435 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30436 { 12279 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30437 { 12279 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30438 { 12279 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30439 { 12279 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30440 { 12279 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30441 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30442 { 12279 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30443 { 12279 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30444 { 12279 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30445 { 12279 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30446 { 12279 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30447 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30448 { 12279 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30449 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30450 { 12288 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30451 { 12288 /* vpand */, X86::VPANDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30452 { 12288 /* vpand */, X86::VPANDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30453 { 12294 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30454 { 12294 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30455 { 12294 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30456 { 12294 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30457 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30458 { 12294 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30459 { 12294 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30460 { 12294 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30461 { 12294 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30462 { 12294 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30463 { 12294 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30464 { 12294 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30465 { 12294 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30466 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30467 { 12294 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30468 { 12294 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30469 { 12294 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30470 { 12294 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30471 { 12294 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30472 { 12294 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30473 { 12294 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30474 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30475 { 12294 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30476 { 12294 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30477 { 12294 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30478 { 12294 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30479 { 12294 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30480 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30481 { 12301 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30482 { 12301 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30483 { 12301 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30484 { 12308 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30485 { 12308 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30486 { 12308 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30487 { 12308 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30488 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30489 { 12308 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30490 { 12308 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30491 { 12308 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30492 { 12308 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30493 { 12308 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30494 { 12308 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30495 { 12308 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30496 { 12308 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30497 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30498 { 12308 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30499 { 12308 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30500 { 12308 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30501 { 12308 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30502 { 12308 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30503 { 12308 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30504 { 12308 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30505 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30506 { 12308 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30507 { 12308 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30508 { 12308 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30509 { 12308 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30510 { 12308 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30511 { 12316 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30512 { 12316 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30513 { 12316 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30514 { 12316 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30515 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30516 { 12316 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30517 { 12316 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30518 { 12316 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30519 { 12316 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30520 { 12316 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30521 { 12316 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30522 { 12316 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30523 { 12316 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30524 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30525 { 12316 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30526 { 12316 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30527 { 12316 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30528 { 12316 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30529 { 12316 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30530 { 12316 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30531 { 12316 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30532 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30533 { 12316 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30534 { 12316 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30535 { 12316 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30536 { 12316 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30537 { 12316 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30538 { 12324 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30539 { 12324 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30540 { 12324 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30541 { 12324 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30542 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30543 { 12324 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30544 { 12324 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30545 { 12324 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30546 { 12324 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30547 { 12324 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30548 { 12324 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30549 { 12324 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30550 { 12324 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30551 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30552 { 12324 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30553 { 12324 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30554 { 12324 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30555 { 12324 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30556 { 12324 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30557 { 12324 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30558 { 12324 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30559 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30560 { 12324 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30561 { 12324 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30562 { 12324 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30563 { 12324 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30564 { 12324 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30565 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30566 { 12331 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30567 { 12331 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30568 { 12331 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30569 { 12331 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30570 { 12331 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30571 { 12331 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30572 { 12331 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30573 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30574 { 12331 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30575 { 12331 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30576 { 12331 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30577 { 12331 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30578 { 12331 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30579 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30580 { 12331 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30581 { 12331 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30582 { 12331 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30583 { 12331 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30584 { 12331 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30585 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30586 { 12331 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30587 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30588 { 12338 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30589 { 12338 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30590 { 12338 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30591 { 12338 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30592 { 12338 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30593 { 12338 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30594 { 12338 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30595 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30596 { 12338 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30597 { 12338 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30598 { 12338 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30599 { 12338 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30600 { 12338 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30601 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30602 { 12338 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30603 { 12338 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30604 { 12338 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30605 { 12338 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30606 { 12338 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30607 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30608 { 12338 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30609 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 30610 { 12345 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30611 { 12345 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 30612 { 12345 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30613 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30614 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30615 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30616 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30617 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30618 { 12354 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30619 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30620 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30621 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30622 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30623 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30624 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30625 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30626 { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30627 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30628 { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30629 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30630 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30631 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30632 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30633 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30634 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30635 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30636 { 12364 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30637 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30638 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30639 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30640 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30641 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30642 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30643 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30644 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30645 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30646 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30647 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30648 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30649 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30650 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30651 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30652 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30653 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30654 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30655 { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30656 { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30657 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30658 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30659 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30660 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30661 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30662 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30663 { 12374 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30664 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30665 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30666 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30667 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30668 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30669 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30670 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30671 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30672 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30673 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30674 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30675 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30676 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30677 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30678 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30679 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30680 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30681 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30682 { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30683 { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30684 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30685 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30686 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30687 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30688 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30689 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30690 { 12384 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30691 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30692 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30693 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30694 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30695 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30696 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30697 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 30698 { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 30699 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 30700 { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 30701 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 30702 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 30703 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30704 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 30705 { 12394 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30706 { 12394 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 30707 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 30708 { 12404 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30709 { 12404 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 30710 { 12404 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30711 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30712 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_FR32, MCK_Mem8 }, }, 30713 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 30714 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR256, MCK_Mem8 }, }, 30715 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 30716 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30717 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_FR32X, MCK_Mem8 }, }, 30718 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, }, 30719 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 30720 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR256X, MCK_Mem8 }, }, 30721 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, }, 30722 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 30723 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR512, MCK_Mem8 }, }, 30724 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30725 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30726 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, }, 30727 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30728 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30729 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, }, 30730 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30731 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30732 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, }, 30733 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30734 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30735 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, }, 30736 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30737 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30738 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, }, 30739 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30740 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30741 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, }, 30742 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30743 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 30744 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 30745 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, }, 30746 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 30747 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30748 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 30749 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, }, 30750 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 30751 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 30752 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, }, 30753 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 30754 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32 }, }, 30755 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30756 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30757 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 30758 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30759 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30760 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 30761 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30762 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30763 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 30764 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30765 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30766 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 30767 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30768 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30769 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 30770 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30771 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30772 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 30773 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 30774 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 30775 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 30776 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 30777 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 30778 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 30779 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30780 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 30781 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 30782 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, }, 30783 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, }, 30784 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30785 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 30786 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR64 }, }, 30787 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 30788 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 30789 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR64 }, }, 30790 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 30791 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 30792 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, }, 30793 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30794 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 30795 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, }, 30796 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30797 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 30798 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, }, 30799 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30800 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 30801 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, }, 30802 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30803 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 30804 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, }, 30805 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30806 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 30807 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, }, 30808 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30809 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 30810 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 30811 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, }, 30812 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 30813 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR256, MCK_Mem16 }, }, 30814 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, }, 30815 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 30816 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, }, 30817 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, }, 30818 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 30819 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR256X, MCK_Mem16 }, }, 30820 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, }, 30821 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 30822 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR512, MCK_Mem16 }, }, 30823 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30824 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30825 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, }, 30826 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30827 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30828 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, }, 30829 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, }, 30830 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 30831 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, }, 30832 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30833 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30834 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, }, 30835 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30836 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30837 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, }, 30838 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, }, 30839 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 30840 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, }, 30841 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30842 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30843 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30844 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30845 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30846 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30847 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30848 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30849 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30850 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30851 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30852 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30853 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30854 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30855 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30856 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30857 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30858 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30859 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30860 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30861 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30862 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30863 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30864 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30865 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30866 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30867 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30868 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30869 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30870 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30871 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30872 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30873 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30874 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30875 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 30876 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 30877 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 30878 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 30879 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 30880 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 30881 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 30882 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30883 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 30884 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30885 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30886 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30887 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30888 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30889 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30890 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30891 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30892 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30893 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 30894 { 12564 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30895 { 12564 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30896 { 12564 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, }, 30897 { 12571 /* vpcmpb */, X86::VPCMPBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30898 { 12571 /* vpcmpb */, X86::VPCMPBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30899 { 12571 /* vpcmpb */, X86::VPCMPBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30900 { 12571 /* vpcmpb */, X86::VPCMPBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30901 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30902 { 12571 /* vpcmpb */, X86::VPCMPBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30903 { 12571 /* vpcmpb */, X86::VPCMPBZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30904 { 12571 /* vpcmpb */, X86::VPCMPBZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30905 { 12571 /* vpcmpb */, X86::VPCMPBZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30906 { 12571 /* vpcmpb */, X86::VPCMPBZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30907 { 12571 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30908 { 12571 /* vpcmpb */, X86::VPCMPBZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30909 { 12578 /* vpcmpd */, X86::VPCMPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30910 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30911 { 12578 /* vpcmpd */, X86::VPCMPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30912 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30913 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30914 { 12578 /* vpcmpd */, X86::VPCMPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30915 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 30916 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 30917 { 12578 /* vpcmpd */, X86::VPCMPDZrmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 30918 { 12578 /* vpcmpd */, X86::VPCMPDZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 30919 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 30920 { 12578 /* vpcmpd */, X86::VPCMPDZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 30921 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 30922 { 12578 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 30923 { 12578 /* vpcmpd */, X86::VPCMPDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 30924 { 12578 /* vpcmpd */, X86::VPCMPDZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 30925 { 12578 /* vpcmpd */, X86::VPCMPDZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 30926 { 12578 /* vpcmpd */, X86::VPCMPDZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 30927 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 30928 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 30929 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 30930 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 30931 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 30932 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 30933 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30934 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30935 { 12585 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30936 { 12585 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30937 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30938 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30939 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30940 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30941 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30942 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30943 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 30944 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 30945 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 30946 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 30947 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 30948 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 30949 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30950 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30951 { 12594 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30952 { 12594 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30953 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30954 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30955 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30956 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30957 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30958 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30959 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30960 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30961 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30962 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 30963 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 30964 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 30965 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 30966 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 30967 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 30968 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 30969 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 30970 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 30971 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30972 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30973 { 12603 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30974 { 12603 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30975 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30976 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30977 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30978 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30979 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30980 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 30981 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 30982 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 30983 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 30984 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 30985 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 30986 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 30987 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 30988 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 30989 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 30990 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 30991 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 30992 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 30993 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 30994 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 30995 { 12612 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 30996 { 12612 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 30997 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 30998 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 30999 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31000 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31001 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31002 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31003 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31004 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31005 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31006 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31007 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 31008 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 31009 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 31010 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 31011 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 31012 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 31013 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 31014 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 31015 { 12643 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31016 { 12643 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31017 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31018 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31019 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31020 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31021 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31022 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31023 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 31024 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 31025 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 31026 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 31027 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 31028 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 31029 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 31030 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 31031 { 12652 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31032 { 12652 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31033 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31034 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31035 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31036 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31037 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31038 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31039 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31040 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31041 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31042 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31043 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31044 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31045 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 31046 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 31047 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 31048 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 31049 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 31050 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 31051 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 31052 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 31053 { 12661 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31054 { 12661 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31055 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31056 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31057 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31058 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31059 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31060 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31061 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31062 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31063 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31064 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31065 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31066 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31067 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 31068 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 31069 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 31070 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 31071 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 31072 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 31073 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 31074 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 31075 { 12670 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31076 { 12670 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31077 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31078 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31079 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31080 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31081 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31082 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31083 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31084 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31085 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31086 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31087 { 12701 /* vpcmpq */, X86::VPCMPQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31088 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31089 { 12701 /* vpcmpq */, X86::VPCMPQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31090 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31091 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31092 { 12701 /* vpcmpq */, X86::VPCMPQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31093 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31094 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31095 { 12701 /* vpcmpq */, X86::VPCMPQZrmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31096 { 12701 /* vpcmpq */, X86::VPCMPQZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31097 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31098 { 12701 /* vpcmpq */, X86::VPCMPQZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31099 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31100 { 12701 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31101 { 12701 /* vpcmpq */, X86::VPCMPQZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31102 { 12701 /* vpcmpq */, X86::VPCMPQZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31103 { 12701 /* vpcmpq */, X86::VPCMPQZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31104 { 12701 /* vpcmpq */, X86::VPCMPQZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31105 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31106 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31107 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31108 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31109 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31110 { 12708 /* vpcmpub */, X86::VPCMPUBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31111 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31112 { 12708 /* vpcmpub */, X86::VPCMPUBZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31113 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31114 { 12708 /* vpcmpub */, X86::VPCMPUBZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31115 { 12708 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31116 { 12708 /* vpcmpub */, X86::VPCMPUBZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31117 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31118 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31119 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31120 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31121 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31122 { 12716 /* vpcmpud */, X86::VPCMPUDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31123 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31124 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31125 { 12716 /* vpcmpud */, X86::VPCMPUDZrmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 31126 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31127 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31128 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31129 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31130 { 12716 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31131 { 12716 /* vpcmpud */, X86::VPCMPUDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31132 { 12716 /* vpcmpud */, X86::VPCMPUDZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31133 { 12716 /* vpcmpud */, X86::VPCMPUDZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31134 { 12716 /* vpcmpud */, X86::VPCMPUDZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 31135 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31136 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31137 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31138 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31139 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31140 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31141 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31142 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31143 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31144 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31145 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31146 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31147 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31148 { 12724 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31149 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31150 { 12724 /* vpcmpuq */, X86::VPCMPUQZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31151 { 12724 /* vpcmpuq */, X86::VPCMPUQZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31152 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31153 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31154 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31155 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31156 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31157 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31158 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31159 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31160 { 12732 /* vpcmpuw */, X86::VPCMPUWZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31161 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31162 { 12732 /* vpcmpuw */, X86::VPCMPUWZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31163 { 12732 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31164 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31165 { 12740 /* vpcmpw */, X86::VPCMPWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31166 { 12740 /* vpcmpw */, X86::VPCMPWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31167 { 12740 /* vpcmpw */, X86::VPCMPWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31168 { 12740 /* vpcmpw */, X86::VPCMPWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31169 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31170 { 12740 /* vpcmpw */, X86::VPCMPWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31171 { 12740 /* vpcmpw */, X86::VPCMPWZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31172 { 12740 /* vpcmpw */, X86::VPCMPWZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31173 { 12740 /* vpcmpw */, X86::VPCMPWZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31174 { 12740 /* vpcmpw */, X86::VPCMPWZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31175 { 12740 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31176 { 12740 /* vpcmpw */, X86::VPCMPWZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31177 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31178 { 12747 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31179 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31180 { 12754 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31181 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31182 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31183 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 31184 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 31185 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 31186 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 31187 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31188 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31189 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31190 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31191 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31192 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31193 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 31194 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 31195 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 31196 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31197 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31198 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 31199 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 31200 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 31201 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 31202 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31203 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31204 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31205 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31206 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31207 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31208 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 31209 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 31210 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 31211 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31212 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31213 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 31214 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 31215 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 31216 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 31217 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31218 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31219 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31220 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31221 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31222 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31223 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 31224 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 31225 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 31226 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31227 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31228 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 31229 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, }, 31230 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, }, 31231 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, }, 31232 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31233 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31234 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31235 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31236 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31237 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31238 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 31239 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 31240 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 31241 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31242 { 12809 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31243 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31244 { 12816 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31245 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31246 { 12824 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31247 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31248 { 12832 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31249 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31250 { 12840 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31251 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31252 { 12848 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31253 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31254 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 31255 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31256 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 31257 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 31258 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 31259 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31260 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31261 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31262 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31263 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 31264 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31265 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 31266 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31267 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 31268 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 31269 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 31270 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 31271 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 31272 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 31273 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 31274 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 31275 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 31276 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 31277 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 31278 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 31279 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 31280 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31281 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 31282 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31283 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 31284 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 31285 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 31286 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31287 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31288 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31289 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 31290 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 31291 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 31292 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 31293 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 31294 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 31295 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 31296 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 31297 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 31298 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 31299 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 31300 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 31301 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 31302 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 31303 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 31304 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 31305 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 31306 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 31307 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31308 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31309 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31310 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31311 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31312 { 12879 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31313 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31314 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31315 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31316 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31317 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31318 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31319 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31320 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31321 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31322 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31323 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31324 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31325 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31326 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31327 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31328 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31329 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31330 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31331 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31332 { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31333 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31334 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31335 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31336 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31337 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31338 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31339 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31340 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31341 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31342 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31343 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31344 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31345 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31346 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31347 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31348 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31349 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31350 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31351 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31352 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31353 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31354 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31355 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31356 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31357 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31358 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31359 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31360 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31361 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31362 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31363 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31364 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31365 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31366 { 12898 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31367 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31368 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31369 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31370 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31371 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31372 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31373 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31374 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31375 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31376 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31377 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31378 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31379 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31380 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31381 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31382 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31383 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31384 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31385 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31386 { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31387 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31388 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31389 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31390 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31391 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31392 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31393 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31394 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31395 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31396 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31397 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31398 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31399 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31400 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31401 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31402 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31403 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31404 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31405 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31406 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31407 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31408 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31409 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31410 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31411 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31412 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31413 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31414 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31415 { 12917 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 31416 { 12917 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31417 { 12928 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 31418 { 12928 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31419 { 12939 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31420 { 12939 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31421 { 12939 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31422 { 12939 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31423 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31424 { 12939 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31425 { 12939 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31426 { 12939 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31427 { 12939 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31428 { 12939 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31429 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31430 { 12939 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31431 { 12939 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31432 { 12939 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31433 { 12939 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31434 { 12939 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31435 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31436 { 12939 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31437 { 12946 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31438 { 12946 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31439 { 12946 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31440 { 12946 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31441 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31442 { 12946 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31443 { 12946 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31444 { 12946 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31445 { 12946 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31446 { 12946 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31447 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31448 { 12946 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31449 { 12946 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31450 { 12946 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31451 { 12946 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31452 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31453 { 12946 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31454 { 12946 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31455 { 12946 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31456 { 12946 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31457 { 12953 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31458 { 12953 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31459 { 12953 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31460 { 12953 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31461 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31462 { 12953 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31463 { 12953 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31464 { 12953 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31465 { 12953 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31466 { 12953 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31467 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31468 { 12953 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31469 { 12953 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31470 { 12953 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31471 { 12953 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31472 { 12953 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31473 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31474 { 12953 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31475 { 12962 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31476 { 12962 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31477 { 12962 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31478 { 12962 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31479 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31480 { 12962 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31481 { 12962 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31482 { 12962 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31483 { 12962 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31484 { 12962 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31485 { 12962 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31486 { 12962 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31487 { 12962 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31488 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31489 { 12962 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31490 { 12962 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31491 { 12962 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31492 { 12962 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31493 { 12962 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31494 { 12962 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31495 { 12962 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31496 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31497 { 12962 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31498 { 12962 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31499 { 12962 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31500 { 12962 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31501 { 12962 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31502 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31503 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31504 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31505 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31506 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31507 { 12971 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31508 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31509 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31510 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31511 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31512 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31513 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31514 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31515 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31516 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31517 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31518 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31519 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31520 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31521 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31522 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31523 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31524 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31525 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31526 { 12971 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31527 { 12971 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31528 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31529 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31530 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31531 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31532 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31533 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31534 { 12981 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31535 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31536 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31537 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31538 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31539 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31540 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31541 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31542 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31543 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31544 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31545 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31546 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31547 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31548 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31549 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31550 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31551 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31552 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31553 { 12981 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31554 { 12981 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31555 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31556 { 12991 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31557 { 12991 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31558 { 12991 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31559 { 12991 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31560 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31561 { 12991 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31562 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31563 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31564 { 12991 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31565 { 12991 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31566 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31567 { 12991 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31568 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31569 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31570 { 12991 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31571 { 12991 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31572 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31573 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31574 { 12991 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31575 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31576 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31577 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31578 { 12991 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31579 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31580 { 12991 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31581 { 12991 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31582 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31583 { 13000 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31584 { 13000 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31585 { 13000 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31586 { 13000 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31587 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31588 { 13000 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31589 { 13000 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31590 { 13000 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31591 { 13000 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31592 { 13000 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31593 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31594 { 13000 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31595 { 13000 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31596 { 13000 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31597 { 13000 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31598 { 13000 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31599 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31600 { 13000 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31601 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, }, 31602 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, }, 31603 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, }, 31604 { 13009 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi4 }, }, 31605 { 13009 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi4 }, }, 31606 { 13009 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi4 }, }, 31607 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, }, 31608 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, }, 31609 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, }, 31610 { 13020 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi4 }, }, 31611 { 13020 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi4 }, }, 31612 { 13020 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi4 }, }, 31613 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 31614 { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31615 { 13031 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 31616 { 13031 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31617 { 13031 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31618 { 13031 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 31619 { 13031 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31620 { 13031 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31621 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31622 { 13031 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31623 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31624 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31625 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31626 { 13031 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31627 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31628 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31629 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31630 { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31631 { 13031 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31632 { 13031 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31633 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31634 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31635 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31636 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31637 { 13031 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31638 { 13031 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31639 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31640 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31641 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31642 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31643 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31644 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31645 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31646 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31647 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31648 { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31649 { 13031 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31650 { 13031 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31651 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31652 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31653 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31654 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31655 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31656 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31657 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31658 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31659 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31660 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31661 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31662 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31663 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31664 { 13031 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31665 { 13031 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31666 { 13031 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31667 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31668 { 13031 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31669 { 13031 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31670 { 13031 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 31671 { 13031 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31672 { 13031 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31673 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31674 { 13031 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31675 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 31676 { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 31677 { 13041 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 31678 { 13041 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31679 { 13041 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31680 { 13041 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 31681 { 13041 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31682 { 13041 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31683 { 13041 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31684 { 13041 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31685 { 13041 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31686 { 13041 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31687 { 13041 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31688 { 13041 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31689 { 13041 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31690 { 13041 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31691 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31692 { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31693 { 13041 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31694 { 13041 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31695 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31696 { 13041 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31697 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31698 { 13041 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31699 { 13041 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31700 { 13041 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 31701 { 13041 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31702 { 13041 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31703 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31704 { 13041 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31705 { 13041 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31706 { 13041 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31707 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31708 { 13041 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31709 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31710 { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31711 { 13041 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31712 { 13041 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31713 { 13041 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31714 { 13041 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 31715 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31716 { 13041 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 31717 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31718 { 13041 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31719 { 13041 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31720 { 13041 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31721 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31722 { 13041 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31723 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31724 { 13041 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31725 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31726 { 13041 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31727 { 13041 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31728 { 13041 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31729 { 13041 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31730 { 13041 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 31731 { 13041 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31732 { 13041 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31733 { 13041 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31734 { 13041 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31735 { 13041 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31736 { 13041 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 31737 { 13051 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 31738 { 13051 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31739 { 13051 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31740 { 13051 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31741 { 13051 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31742 { 13051 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31743 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31744 { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31745 { 13051 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31746 { 13051 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31747 { 13051 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31748 { 13051 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31749 { 13051 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31750 { 13051 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31751 { 13051 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31752 { 13051 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31753 { 13051 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31754 { 13051 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31755 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31756 { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31757 { 13051 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31758 { 13051 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31759 { 13051 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31760 { 13051 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31761 { 13051 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31762 { 13051 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31763 { 13051 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31764 { 13051 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31765 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31766 { 13051 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31767 { 13051 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31768 { 13051 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31769 { 13051 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31770 { 13051 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31771 { 13051 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31772 { 13051 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31773 { 13051 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31774 { 13051 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31775 { 13059 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 31776 { 13059 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 31777 { 13059 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31778 { 13059 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31779 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31780 { 13059 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31781 { 13059 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31782 { 13059 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31783 { 13059 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31784 { 13059 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31785 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31786 { 13059 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31787 { 13059 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31788 { 13059 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31789 { 13059 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31790 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31791 { 13059 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31792 { 13059 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31793 { 13059 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31794 { 13059 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31795 { 13067 /* vpermq */, X86::VPERMQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 31796 { 13067 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31797 { 13067 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31798 { 13067 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31799 { 13067 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31800 { 13067 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31801 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31802 { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31803 { 13067 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31804 { 13067 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31805 { 13067 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31806 { 13067 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31807 { 13067 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31808 { 13067 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31809 { 13067 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31810 { 13067 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31811 { 13067 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31812 { 13067 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31813 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31814 { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31815 { 13067 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31816 { 13067 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31817 { 13067 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31818 { 13067 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 31819 { 13067 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31820 { 13067 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 31821 { 13067 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31822 { 13067 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31823 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31824 { 13067 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 31825 { 13067 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31826 { 13067 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 31827 { 13067 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31828 { 13067 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31829 { 13067 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31830 { 13067 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 31831 { 13067 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31832 { 13067 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 31833 { 13074 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31834 { 13074 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31835 { 13074 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31836 { 13074 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31837 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31838 { 13074 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31839 { 13074 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31840 { 13074 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31841 { 13074 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31842 { 13074 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31843 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31844 { 13074 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31845 { 13074 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31846 { 13074 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31847 { 13074 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31848 { 13074 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31849 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31850 { 13074 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31851 { 13083 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31852 { 13083 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31853 { 13083 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31854 { 13083 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31855 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31856 { 13083 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31857 { 13083 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31858 { 13083 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31859 { 13083 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31860 { 13083 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31861 { 13083 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31862 { 13083 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31863 { 13083 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31864 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31865 { 13083 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31866 { 13083 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31867 { 13083 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31868 { 13083 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31869 { 13083 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31870 { 13083 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31871 { 13083 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31872 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31873 { 13083 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31874 { 13083 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31875 { 13083 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31876 { 13083 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31877 { 13083 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31878 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31879 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31880 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31881 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31882 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31883 { 13092 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31884 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31885 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31886 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31887 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31888 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31889 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31890 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31891 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31892 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31893 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31894 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31895 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31896 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31897 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31898 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31899 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31900 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31901 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31902 { 13092 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31903 { 13092 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31904 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31905 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31906 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31907 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31908 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31909 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31910 { 13102 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31911 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31912 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31913 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31914 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31915 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31916 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31917 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31918 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31919 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31920 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31921 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31922 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31923 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31924 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31925 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31926 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31927 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31928 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31929 { 13102 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 31930 { 13102 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 31931 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 31932 { 13112 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31933 { 13112 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31934 { 13112 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31935 { 13112 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31936 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31937 { 13112 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31938 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31939 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31940 { 13112 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31941 { 13112 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31942 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31943 { 13112 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31944 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31945 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31946 { 13112 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31947 { 13112 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31948 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31949 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31950 { 13112 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31951 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31952 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31953 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31954 { 13112 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31955 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31956 { 13112 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 31957 { 13112 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 31958 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 31959 { 13121 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31960 { 13121 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31961 { 13121 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31962 { 13121 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31963 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31964 { 13121 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31965 { 13121 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31966 { 13121 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31967 { 13121 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31968 { 13121 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31969 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31970 { 13121 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31971 { 13121 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31972 { 13121 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31973 { 13121 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31974 { 13121 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31975 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31976 { 13121 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31977 { 13130 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 31978 { 13130 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 31979 { 13130 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 31980 { 13130 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 31981 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 31982 { 13130 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 31983 { 13130 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 31984 { 13130 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 31985 { 13130 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 31986 { 13130 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 31987 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 31988 { 13130 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 31989 { 13130 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 31990 { 13130 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 31991 { 13130 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 31992 { 13130 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 31993 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 31994 { 13130 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 31995 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 31996 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 31997 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 31998 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 31999 { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 32000 { 13137 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 32001 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32002 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32003 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32004 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 32005 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32006 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 32007 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32008 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32009 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32010 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 32011 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32012 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 32013 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32014 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 32015 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 32016 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 32017 { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 32018 { 13147 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 32019 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32020 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32021 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32022 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 32023 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32024 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 32025 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32026 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32027 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32028 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 32029 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32030 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 32031 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32032 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 32033 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 32034 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 32035 { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 32036 { 13157 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 32037 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32038 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32039 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32040 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 32041 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32042 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 32043 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32044 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32045 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32046 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 32047 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32048 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 32049 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32050 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 32051 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 32052 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 32053 { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 32054 { 13167 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 32055 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32056 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32057 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32058 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 32059 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32060 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 32061 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32062 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32063 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32064 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 32065 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32066 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 32067 { 13177 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32068 { 13177 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32069 { 13177 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32070 { 13177 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32071 { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32072 { 13185 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32073 { 13185 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32074 { 13185 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32075 { 13193 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32076 { 13193 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32077 { 13193 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32078 { 13193 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32079 { 13201 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32080 { 13201 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32081 { 13201 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, }, 32082 { 13201 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 32083 { 13209 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 32084 { 13209 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 32085 { 13209 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, }, 32086 { 13209 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, }, 32087 { 13209 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 32088 { 13220 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 32089 { 13220 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, }, 32090 { 13220 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, }, 32091 { 13220 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, }, 32092 { 13220 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, }, 32093 { 13231 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, }, 32094 { 13231 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, }, 32095 { 13231 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, }, 32096 { 13231 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, }, 32097 { 13231 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, }, 32098 { 13242 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, }, 32099 { 13242 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, }, 32100 { 13242 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, }, 32101 { 13242 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, }, 32102 { 13242 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 32103 { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32104 { 13253 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32105 { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32106 { 13262 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32107 { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32108 { 13271 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32109 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32110 { 13280 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32111 { 13280 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32112 { 13280 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32113 { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32114 { 13288 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32115 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32116 { 13297 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32117 { 13297 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32118 { 13297 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32119 { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32120 { 13306 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32121 { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32122 { 13316 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32123 { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32124 { 13326 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32125 { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32126 { 13336 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32127 { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32128 { 13346 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32129 { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32130 { 13356 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32131 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32132 { 13366 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32133 { 13366 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32134 { 13366 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32135 { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32136 { 13374 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32137 { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32138 { 13383 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32139 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32140 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32141 { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32142 { 13404 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32143 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32144 { 13413 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32145 { 13413 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32146 { 13413 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32147 { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32148 { 13421 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32149 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32150 { 13430 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32151 { 13430 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32152 { 13430 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32153 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32154 { 13439 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32155 { 13439 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32156 { 13439 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32157 { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32158 { 13447 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 32159 { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 32160 { 13456 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, }, 32161 { 13456 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 32162 { 13456 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK_ImmUnsignedi8 }, }, 32163 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, }, 32164 { 13464 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 32165 { 13464 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, }, 32166 { 13464 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 32167 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, }, 32168 { 13472 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 32169 { 13472 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, }, 32170 { 13472 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 32171 { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 32172 { 13480 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, }, 32173 { 13480 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, }, 32174 { 13480 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem16, MCK_ImmUnsignedi8 }, }, 32175 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32176 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 32177 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 32178 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 32179 { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 32180 { 13488 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 32181 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32182 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32183 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32184 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32185 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32186 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32187 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 32188 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32189 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 32190 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32191 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32192 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 32193 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32194 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 32195 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 32196 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32197 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 32198 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 32199 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 32200 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 32201 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 32202 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32203 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 32204 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 32205 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 32206 { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 32207 { 13497 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 32208 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32209 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32210 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32211 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32212 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32213 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32214 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 32215 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32216 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 32217 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32218 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32219 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 32220 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32221 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 32222 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 32223 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32224 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 32225 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 32226 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 32227 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 32228 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 32229 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32230 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32231 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32232 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32233 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32234 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32235 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32236 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32237 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32238 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32239 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32240 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32241 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32242 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32243 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32244 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32245 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32246 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32247 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32248 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32249 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32250 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32251 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32252 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 32253 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32254 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32255 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32256 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32257 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32258 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32259 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32260 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32261 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32262 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32263 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32264 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32265 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32266 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32267 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32268 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32269 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32270 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32271 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32272 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32273 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32274 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32275 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32276 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32277 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32278 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32279 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32280 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32281 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32282 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32283 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32284 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32285 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32286 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32287 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32288 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32289 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32290 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32291 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32292 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32293 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32294 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32295 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32296 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32297 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32298 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32299 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32300 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32301 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32302 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32303 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32304 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32305 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32306 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32307 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32308 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32309 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32310 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32311 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32312 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32313 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32314 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32315 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32316 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32317 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32318 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32319 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32320 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32321 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32322 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32323 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32324 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32325 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32326 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32327 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32328 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32329 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32330 { 13661 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32331 { 13661 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32332 { 13661 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32333 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32334 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32335 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32336 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32337 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32338 { 13661 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32339 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32340 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32341 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32342 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32343 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32344 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32345 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32346 { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32347 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32348 { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32349 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32350 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32351 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32352 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32353 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 32354 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 32355 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32356 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32357 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, }, 32358 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, }, 32359 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32360 { 13692 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32361 { 13692 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32362 { 13692 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32363 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32364 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32365 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32366 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32367 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32368 { 13692 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32369 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32370 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32371 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32372 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32373 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32374 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32375 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32376 { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32377 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32378 { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32379 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32380 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32381 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32382 { 13700 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32383 { 13700 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32384 { 13700 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32385 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32386 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32387 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32388 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32389 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32390 { 13700 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32391 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32392 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32393 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32394 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32395 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32396 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32397 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32398 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32399 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32400 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32401 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32402 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32403 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32404 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32405 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32406 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32407 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32408 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32409 { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32410 { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32411 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32412 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32413 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32414 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32415 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32416 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32417 { 13708 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32418 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32419 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32420 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32421 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32422 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32423 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32424 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32425 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32426 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32427 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32428 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32429 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32430 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32431 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32432 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32433 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32434 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32435 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32436 { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32437 { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32438 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32439 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32440 { 13716 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32441 { 13716 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32442 { 13716 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32443 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32444 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32445 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32446 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32447 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32448 { 13716 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32449 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32450 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32451 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32452 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32453 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32454 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32455 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32456 { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32457 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32458 { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32459 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32460 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32461 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32462 { 13724 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32463 { 13724 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32464 { 13724 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32465 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32466 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32467 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32468 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32469 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32470 { 13724 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32471 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32472 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32473 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32474 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32475 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32476 { 13724 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32477 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32478 { 13724 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32479 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32480 { 13724 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32481 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32482 { 13724 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32483 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32484 { 13732 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32485 { 13732 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32486 { 13732 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32487 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32488 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32489 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32490 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32491 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32492 { 13732 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32493 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32494 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32495 { 13732 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32496 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32497 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32498 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32499 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32500 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32501 { 13732 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32502 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32503 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32504 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32505 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32506 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32507 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32508 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32509 { 13732 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32510 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32511 { 13732 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32512 { 13732 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32513 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32514 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32515 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32516 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32517 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32518 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32519 { 13740 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32520 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32521 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32522 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32523 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32524 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32525 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32526 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32527 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32528 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32529 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32530 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32531 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32532 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32533 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32534 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32535 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32536 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32537 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32538 { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32539 { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32540 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32541 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32542 { 13748 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32543 { 13748 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32544 { 13748 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32545 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32546 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32547 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32548 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32549 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32550 { 13748 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32551 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32552 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32553 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32554 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32555 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32556 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32557 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32558 { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32559 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32560 { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32561 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32562 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32563 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32564 { 13756 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32565 { 13756 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32566 { 13756 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32567 { 13756 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32568 { 13756 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32569 { 13756 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32570 { 13756 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32571 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32572 { 13756 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32573 { 13756 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32574 { 13756 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32575 { 13756 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32576 { 13756 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32577 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32578 { 13756 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32579 { 13756 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32580 { 13756 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32581 { 13756 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32582 { 13756 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32583 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32584 { 13756 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32585 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32586 { 13764 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32587 { 13764 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32588 { 13764 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32589 { 13764 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32590 { 13764 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32591 { 13764 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32592 { 13764 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32593 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32594 { 13764 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32595 { 13764 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32596 { 13764 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32597 { 13764 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32598 { 13764 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32599 { 13764 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32600 { 13764 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32601 { 13764 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32602 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32603 { 13764 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32604 { 13764 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32605 { 13764 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32606 { 13764 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32607 { 13764 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32608 { 13764 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32609 { 13764 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32610 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32611 { 13764 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32612 { 13764 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32613 { 13764 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32614 { 13764 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32615 { 13764 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32616 { 13772 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32617 { 13772 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32618 { 13772 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32619 { 13772 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32620 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32621 { 13772 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32622 { 13772 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32623 { 13772 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32624 { 13772 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32625 { 13772 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32626 { 13772 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32627 { 13772 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32628 { 13772 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32629 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32630 { 13772 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32631 { 13772 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32632 { 13772 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32633 { 13772 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32634 { 13772 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32635 { 13772 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32636 { 13772 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32637 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32638 { 13772 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32639 { 13772 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32640 { 13772 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32641 { 13772 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32642 { 13772 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32643 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32644 { 13780 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32645 { 13780 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32646 { 13780 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32647 { 13780 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32648 { 13780 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32649 { 13780 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32650 { 13780 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32651 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32652 { 13780 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32653 { 13780 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32654 { 13780 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32655 { 13780 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32656 { 13780 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32657 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32658 { 13780 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32659 { 13780 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32660 { 13780 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32661 { 13780 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32662 { 13780 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32663 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32664 { 13780 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32665 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32666 { 13788 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32667 { 13788 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32668 { 13788 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32669 { 13788 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32670 { 13788 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32671 { 13788 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32672 { 13788 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32673 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32674 { 13788 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32675 { 13788 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32676 { 13788 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32677 { 13788 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32678 { 13788 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32679 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32680 { 13788 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32681 { 13788 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32682 { 13788 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32683 { 13788 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32684 { 13788 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32685 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32686 { 13788 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32687 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32688 { 13796 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32689 { 13796 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32690 { 13796 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32691 { 13796 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32692 { 13796 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32693 { 13796 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32694 { 13796 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32695 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32696 { 13796 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32697 { 13796 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32698 { 13796 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32699 { 13796 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32700 { 13796 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32701 { 13796 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32702 { 13796 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32703 { 13796 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32704 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32705 { 13796 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32706 { 13796 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32707 { 13796 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32708 { 13796 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32709 { 13796 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32710 { 13796 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32711 { 13796 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32712 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32713 { 13796 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32714 { 13796 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32715 { 13796 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 32716 { 13796 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 32717 { 13796 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 32718 { 13804 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32719 { 13804 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32720 { 13804 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32721 { 13804 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32722 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32723 { 13804 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32724 { 13804 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32725 { 13804 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32726 { 13804 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32727 { 13804 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32728 { 13804 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32729 { 13804 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32730 { 13804 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32731 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32732 { 13804 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32733 { 13804 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32734 { 13804 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32735 { 13804 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32736 { 13804 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32737 { 13804 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32738 { 13804 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32739 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32740 { 13804 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32741 { 13804 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32742 { 13804 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 32743 { 13804 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 32744 { 13804 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 32745 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 32746 { 13812 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 32747 { 13812 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 32748 { 13812 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 32749 { 13812 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 32750 { 13812 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 32751 { 13812 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 32752 { 13812 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 32753 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 32754 { 13812 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 32755 { 13812 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 32756 { 13812 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 32757 { 13812 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 32758 { 13812 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 32759 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 32760 { 13812 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 32761 { 13812 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 32762 { 13812 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 32763 { 13812 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 32764 { 13812 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 32765 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 32766 { 13812 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 32767 { 13820 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 32768 { 13820 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 32769 { 13820 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 32770 { 13829 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 32771 { 13829 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 32772 { 13829 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 32773 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32774 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32775 { 13838 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 32776 { 13838 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 32777 { 13838 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 32778 { 13838 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 32779 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32780 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32781 { 13838 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32782 { 13838 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32783 { 13838 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32784 { 13838 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32785 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32786 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32787 { 13838 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32788 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32789 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32790 { 13846 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 32791 { 13846 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 32792 { 13846 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 32793 { 13846 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 32794 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32795 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32796 { 13846 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32797 { 13846 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32798 { 13846 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32799 { 13846 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32800 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32801 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32802 { 13846 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32803 { 13854 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 32804 { 13854 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 32805 { 13854 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 32806 { 13863 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 32807 { 13863 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 32808 { 13863 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 32809 { 13872 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 32810 { 13872 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 32811 { 13872 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 32812 { 13881 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, }, 32813 { 13881 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, }, 32814 { 13881 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, }, 32815 { 13890 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, }, 32816 { 13890 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, }, 32817 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 32818 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 32819 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 32820 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32821 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32822 { 13909 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 32823 { 13909 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_FR32X }, }, 32824 { 13909 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 32825 { 13909 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 32826 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32827 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32828 { 13909 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32829 { 13909 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32830 { 13909 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32831 { 13909 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32832 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32833 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32834 { 13909 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32835 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32836 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32837 { 13917 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 32838 { 13917 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 32839 { 13917 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 32840 { 13917 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 32841 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32842 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32843 { 13917 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32844 { 13917 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32845 { 13917 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32846 { 13917 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32847 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32848 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32849 { 13917 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32850 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32851 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32852 { 13925 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 32853 { 13925 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 32854 { 13925 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 32855 { 13925 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 32856 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32857 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32858 { 13925 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32859 { 13925 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32860 { 13925 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32861 { 13925 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32862 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32863 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32864 { 13925 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32865 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32866 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32867 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 32868 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 32869 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 32870 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 32871 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32872 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32873 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32874 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32875 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32876 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32877 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32878 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32879 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32880 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32881 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32882 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 32883 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 32884 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 32885 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 32886 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32887 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32888 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32889 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32890 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32891 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32892 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32893 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32894 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32895 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32896 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32897 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 32898 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_FR32X }, }, 32899 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 32900 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 32901 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32902 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32903 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32904 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32905 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32906 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32907 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32908 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32909 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32910 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32911 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32912 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 32913 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 32914 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 32915 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 32916 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32917 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32918 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32919 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32920 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32921 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32922 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32923 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32924 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32925 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32926 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32927 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 32928 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 32929 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 32930 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 32931 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32932 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32933 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32934 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32935 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32936 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32937 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32938 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32939 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32940 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32941 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 32942 { 13978 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 32943 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 32944 { 13978 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 32945 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 32946 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32947 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32948 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32949 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 32950 { 13978 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 32951 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32952 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32953 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 32954 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 32955 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32956 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 32957 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 32958 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, }, 32959 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32960 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 32961 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 32962 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 32963 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 32964 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 32965 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32966 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 32967 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32968 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 32969 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32970 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 32971 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32972 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 32973 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32974 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 32975 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32976 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 32977 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 32978 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, }, 32979 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 32980 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, }, 32981 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 32982 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, }, 32983 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 32984 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 32985 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 32986 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 32987 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32988 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, }, 32989 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32990 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 32991 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 32992 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 32993 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32994 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, }, 32995 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32996 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 32997 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 32998 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 32999 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33000 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 33001 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33002 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 33003 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33004 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 33005 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33006 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 33007 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 33008 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 33009 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33010 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33011 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33012 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33013 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33014 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33015 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33016 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33017 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33018 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33019 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33020 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33021 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33022 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 33023 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33024 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 33025 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33026 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 33027 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33028 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 33029 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 33030 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 33031 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33032 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33033 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33034 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33035 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33036 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33037 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33038 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33039 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33040 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33041 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33042 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33043 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33044 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 33045 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33046 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 33047 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33048 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 33049 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33050 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 33051 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 33052 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 33053 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33054 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33055 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33056 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33057 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33058 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33059 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33060 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33061 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33062 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33063 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33064 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33065 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33066 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 33067 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33068 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, }, 33069 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33070 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 33071 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33072 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 33073 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 33074 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 33075 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33076 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 33077 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33078 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33079 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33080 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33081 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33082 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 33083 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33084 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33085 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33086 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33087 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33088 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33089 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 33090 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 33091 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 33092 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 33093 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33094 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33095 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33096 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33097 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33098 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33099 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33100 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33101 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33102 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33103 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33104 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 33105 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 33106 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 33107 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 33108 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33109 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33110 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33111 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33112 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33113 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33114 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33115 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33116 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33117 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33118 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33119 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 33120 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_FR32X }, }, 33121 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR256X }, }, 33122 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, }, 33123 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33124 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33125 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33126 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33127 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33128 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33129 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33130 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33131 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33132 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33133 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33134 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 33135 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 33136 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 33137 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 33138 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33139 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33140 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33141 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33142 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33143 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33144 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33145 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33146 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33147 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33148 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33149 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, }, 33150 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, }, 33151 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, }, 33152 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, }, 33153 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33154 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33155 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33156 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33157 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33158 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33159 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33160 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33161 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33162 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33163 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33164 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 33165 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 33166 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 33167 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 33168 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33169 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33170 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33171 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33172 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33173 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33174 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33175 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33176 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33177 { 14107 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, }, 33178 { 14107 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, }, 33179 { 14107 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, }, 33180 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33181 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, }, 33182 { 14116 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, }, 33183 { 14116 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, }, 33184 { 14116 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, }, 33185 { 14116 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, }, 33186 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33187 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33188 { 14116 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33189 { 14116 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33190 { 14116 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33191 { 14116 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33192 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33193 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33194 { 14116 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33195 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33196 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 33197 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33198 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, }, 33199 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33200 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 33201 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33202 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 33203 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 33204 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 33205 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33206 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 33207 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33208 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33209 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33210 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33211 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33212 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 33213 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33214 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33215 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33216 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33217 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33218 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, }, 33219 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33220 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, }, 33221 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33222 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, }, 33223 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33224 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, }, 33225 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 33226 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, }, 33227 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33228 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, }, 33229 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33230 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 33231 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33232 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33233 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33234 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, }, 33235 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33236 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 33237 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33238 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33239 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33240 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 33241 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33242 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 33243 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33244 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 33245 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33246 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 33247 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 33248 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 33249 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33250 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33251 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33252 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33253 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33254 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33255 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33256 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33257 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33258 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33259 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33260 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33261 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33262 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 33263 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33264 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 33265 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33266 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 33267 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33268 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 33269 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 33270 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 33271 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33272 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33273 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33274 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33275 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33276 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33277 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33278 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33279 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33280 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33281 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33282 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33283 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33284 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 33285 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33286 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, }, 33287 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33288 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 33289 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33290 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, }, 33291 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, }, 33292 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, }, 33293 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33294 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33295 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33296 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33297 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33298 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33299 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33300 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33301 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33302 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33303 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33304 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33305 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 33306 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 33307 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, }, 33308 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, }, 33309 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33310 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 33311 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, }, 33312 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, }, 33313 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, }, 33314 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, }, 33315 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33316 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, }, 33317 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33318 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, }, 33319 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33320 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33321 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33322 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, }, 33323 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33324 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, }, 33325 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33326 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33327 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33328 { 14184 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33329 { 14184 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33330 { 14184 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33331 { 14184 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33332 { 14184 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33333 { 14184 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33334 { 14184 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33335 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33336 { 14184 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33337 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33338 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33339 { 14184 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33340 { 14184 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33341 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33342 { 14184 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33343 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33344 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33345 { 14184 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33346 { 14184 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33347 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33348 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33349 { 14184 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33350 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33351 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33352 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33353 { 14184 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33354 { 14184 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33355 { 14184 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33356 { 14184 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33357 { 14184 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33358 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33359 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33360 { 14192 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33361 { 14192 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33362 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33363 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33364 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33365 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33366 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33367 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33368 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33369 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33370 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33371 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33372 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33373 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33374 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33375 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33376 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33377 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33378 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33379 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33380 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33381 { 14202 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33382 { 14202 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33383 { 14202 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33384 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33385 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33386 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33387 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33388 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33389 { 14202 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33390 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33391 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33392 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33393 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33394 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33395 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33396 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33397 { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33398 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33399 { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33400 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33401 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33402 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33403 { 14211 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33404 { 14211 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33405 { 14211 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33406 { 14211 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33407 { 14211 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33408 { 14211 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33409 { 14211 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33410 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33411 { 14211 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33412 { 14211 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33413 { 14211 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33414 { 14211 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33415 { 14211 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33416 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33417 { 14211 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33418 { 14211 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33419 { 14211 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33420 { 14211 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33421 { 14211 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33422 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33423 { 14211 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33424 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33425 { 14219 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33426 { 14219 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33427 { 14219 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33428 { 14219 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33429 { 14219 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33430 { 14219 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33431 { 14219 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33432 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33433 { 14219 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33434 { 14219 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33435 { 14219 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33436 { 14219 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33437 { 14219 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33438 { 14219 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33439 { 14219 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33440 { 14219 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33441 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33442 { 14219 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33443 { 14219 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33444 { 14219 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33445 { 14219 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33446 { 14219 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33447 { 14219 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33448 { 14219 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33449 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33450 { 14219 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33451 { 14219 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33452 { 14219 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33453 { 14219 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33454 { 14219 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33455 { 14227 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33456 { 14227 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33457 { 14227 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33458 { 14227 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33459 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33460 { 14227 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33461 { 14227 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33462 { 14227 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33463 { 14227 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33464 { 14227 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33465 { 14227 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33466 { 14227 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33467 { 14227 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33468 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33469 { 14227 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33470 { 14227 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33471 { 14227 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33472 { 14227 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33473 { 14227 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33474 { 14227 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33475 { 14227 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33476 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33477 { 14227 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33478 { 14227 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33479 { 14227 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33480 { 14227 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33481 { 14227 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33482 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33483 { 14235 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33484 { 14235 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33485 { 14235 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33486 { 14235 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33487 { 14235 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33488 { 14235 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33489 { 14235 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33490 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33491 { 14235 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33492 { 14235 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33493 { 14235 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33494 { 14235 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33495 { 14235 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33496 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33497 { 14235 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33498 { 14235 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33499 { 14235 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33500 { 14235 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33501 { 14235 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33502 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33503 { 14235 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33504 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33505 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33506 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33507 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33508 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33509 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33510 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33511 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33512 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33513 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33514 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33515 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33516 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33517 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33518 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33519 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33520 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33521 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33522 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33523 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33524 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33525 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33526 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33527 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33528 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33529 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33530 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33531 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33532 { 14258 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33533 { 14258 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33534 { 14258 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33535 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33536 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33537 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33538 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33539 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33540 { 14258 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33541 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33542 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33543 { 14258 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33544 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33545 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33546 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33547 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33548 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33549 { 14258 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33550 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33551 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33552 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33553 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33554 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33555 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33556 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33557 { 14258 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33558 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33559 { 14258 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33560 { 14258 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33561 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33562 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33563 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 33564 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 33565 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 33566 { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 33567 { 14267 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 33568 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33569 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33570 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33571 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33572 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33573 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 33574 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33575 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33576 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33577 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33578 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33579 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 33580 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33581 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 33582 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 33583 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 33584 { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 33585 { 14276 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 33586 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33587 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33588 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33589 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33590 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33591 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33592 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33593 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33594 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 33595 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33596 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33597 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 33598 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33599 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33600 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 33601 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33602 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 33603 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 33604 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 33605 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 33606 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 33607 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33608 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 33609 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 33610 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 33611 { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 33612 { 14285 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 33613 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33614 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33615 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33616 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33617 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33618 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33619 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33620 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33621 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 33622 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33623 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33624 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 33625 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33626 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33627 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 33628 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33629 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 33630 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 33631 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 33632 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 33633 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 33634 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 33635 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 33636 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 33637 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 33638 { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 33639 { 14294 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 33640 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33641 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 33642 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33643 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 33644 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33645 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 33646 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 33647 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 33648 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 33649 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 33650 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 33651 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 33652 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33653 { 14303 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33654 { 14303 /* vpor */, X86::VPORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33655 { 14303 /* vpor */, X86::VPORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33656 { 14308 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33657 { 14308 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33658 { 14308 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33659 { 14308 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33660 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33661 { 14308 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33662 { 14308 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33663 { 14308 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33664 { 14308 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33665 { 14308 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33666 { 14308 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33667 { 14308 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33668 { 14308 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33669 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33670 { 14308 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33671 { 14308 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33672 { 14308 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33673 { 14308 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33674 { 14308 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33675 { 14308 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33676 { 14308 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33677 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33678 { 14308 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33679 { 14308 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33680 { 14308 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33681 { 14308 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33682 { 14308 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33683 { 14314 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33684 { 14314 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33685 { 14314 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33686 { 14314 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33687 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33688 { 14314 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33689 { 14314 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33690 { 14314 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33691 { 14314 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33692 { 14314 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33693 { 14314 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33694 { 14314 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33695 { 14314 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33696 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33697 { 14314 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33698 { 14314 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33699 { 14314 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33700 { 14314 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33701 { 14314 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33702 { 14314 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33703 { 14314 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33704 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33705 { 14314 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33706 { 14314 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33707 { 14314 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33708 { 14314 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33709 { 14314 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33710 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33711 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33712 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33713 { 14327 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33714 { 14327 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33715 { 14327 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33716 { 14327 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33717 { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33718 { 14327 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33719 { 14327 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33720 { 14327 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33721 { 14327 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33722 { 14327 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33723 { 14327 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33724 { 14327 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33725 { 14327 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33726 { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33727 { 14327 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33728 { 14327 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33729 { 14327 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33730 { 14327 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33731 { 14327 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33732 { 14327 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33733 { 14327 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33734 { 14327 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33735 { 14327 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33736 { 14327 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33737 { 14327 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33738 { 14327 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33739 { 14327 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33740 { 14334 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33741 { 14334 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33742 { 14334 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33743 { 14334 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33744 { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33745 { 14334 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33746 { 14334 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 33747 { 14334 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33748 { 14334 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33749 { 14334 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33750 { 14334 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33751 { 14334 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33752 { 14334 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33753 { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33754 { 14334 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33755 { 14334 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33756 { 14334 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33757 { 14334 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 33758 { 14334 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33759 { 14334 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33760 { 14334 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33761 { 14334 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33762 { 14334 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33763 { 14334 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33764 { 14334 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 33765 { 14334 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33766 { 14334 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33767 { 14341 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33768 { 14341 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33769 { 14341 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33770 { 14341 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33771 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33772 { 14341 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33773 { 14341 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33774 { 14341 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33775 { 14341 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33776 { 14341 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33777 { 14341 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33778 { 14341 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33779 { 14341 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33780 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33781 { 14341 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33782 { 14341 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33783 { 14341 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33784 { 14341 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33785 { 14341 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33786 { 14341 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33787 { 14341 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33788 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33789 { 14341 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33790 { 14341 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33791 { 14341 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33792 { 14341 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33793 { 14341 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33794 { 14349 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33795 { 14349 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33796 { 14349 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33797 { 14349 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33798 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33799 { 14349 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33800 { 14349 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33801 { 14349 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33802 { 14349 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33803 { 14349 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33804 { 14349 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33805 { 14349 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33806 { 14349 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33807 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33808 { 14349 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33809 { 14349 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33810 { 14349 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33811 { 14349 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33812 { 14349 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33813 { 14349 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33814 { 14349 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33815 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33816 { 14349 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33817 { 14349 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33818 { 14349 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33819 { 14349 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33820 { 14349 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33821 { 14357 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33822 { 14357 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33823 { 14357 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33824 { 14357 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33825 { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33826 { 14357 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33827 { 14357 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33828 { 14357 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33829 { 14357 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33830 { 14357 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33831 { 14357 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33832 { 14357 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33833 { 14357 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33834 { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33835 { 14357 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33836 { 14357 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33837 { 14357 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33838 { 14357 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33839 { 14357 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33840 { 14357 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33841 { 14357 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33842 { 14357 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33843 { 14357 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33844 { 14357 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33845 { 14357 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33846 { 14357 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33847 { 14357 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33848 { 14364 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33849 { 14364 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33850 { 14364 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33851 { 14364 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33852 { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33853 { 14364 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33854 { 14364 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 33855 { 14364 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33856 { 14364 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33857 { 14364 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33858 { 14364 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33859 { 14364 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33860 { 14364 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33861 { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33862 { 14364 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33863 { 14364 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33864 { 14364 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33865 { 14364 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 33866 { 14364 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33867 { 14364 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33868 { 14364 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33869 { 14364 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33870 { 14364 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33871 { 14364 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33872 { 14364 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 33873 { 14364 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33874 { 14364 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33875 { 14371 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33876 { 14371 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33877 { 14371 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33878 { 14371 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33879 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33880 { 14371 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33881 { 14371 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33882 { 14371 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33883 { 14371 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33884 { 14371 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33885 { 14371 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33886 { 14371 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33887 { 14371 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33888 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33889 { 14371 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33890 { 14371 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33891 { 14371 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33892 { 14371 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33893 { 14371 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33894 { 14371 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33895 { 14371 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33896 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33897 { 14371 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33898 { 14371 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33899 { 14371 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 33900 { 14371 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 33901 { 14371 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 33902 { 14379 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33903 { 14379 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33904 { 14379 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33905 { 14379 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33906 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33907 { 14379 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33908 { 14379 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33909 { 14379 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33910 { 14379 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33911 { 14379 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 33912 { 14379 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 33913 { 14379 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 33914 { 14379 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 33915 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 33916 { 14379 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 33917 { 14379 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 33918 { 14379 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 33919 { 14379 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33920 { 14379 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 33921 { 14379 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 33922 { 14379 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33923 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 33924 { 14379 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 33925 { 14379 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33926 { 14379 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 33927 { 14379 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 33928 { 14379 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 33929 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33930 { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 33931 { 14387 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33932 { 14387 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33933 { 14387 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33934 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33935 { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 33936 { 14394 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33937 { 14394 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33938 { 14394 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33939 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33940 { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 33941 { 14401 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33942 { 14401 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33943 { 14401 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33944 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33945 { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 33946 { 14408 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33947 { 14408 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33948 { 14408 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33949 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33950 { 14415 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33951 { 14415 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 33952 { 14415 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 33953 { 14415 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 33954 { 14415 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 33955 { 14415 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 33956 { 14415 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 33957 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 33958 { 14415 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 33959 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33960 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33961 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33962 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33963 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33964 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33965 { 14447 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33966 { 14447 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33967 { 14447 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33968 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 33969 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 33970 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 33971 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33972 { 14471 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33973 { 14471 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33974 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33975 { 14478 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33976 { 14478 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33977 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33978 { 14485 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33979 { 14485 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33980 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33981 { 14492 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33982 { 14492 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33983 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33984 { 14499 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33985 { 14499 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33986 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 33987 { 14506 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 33988 { 14506 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 33989 { 14513 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33990 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 33991 { 14513 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 33992 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 33993 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 33994 { 14513 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 33995 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 33996 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 33997 { 14513 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 33998 { 14513 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 33999 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34000 { 14513 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34001 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34002 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34003 { 14513 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34004 { 14513 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34005 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34006 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34007 { 14513 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34008 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34009 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34010 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34011 { 14513 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34012 { 14513 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34013 { 14513 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34014 { 14513 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34015 { 14513 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34016 { 14521 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34017 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34018 { 14521 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34019 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34020 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34021 { 14521 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34022 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34023 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34024 { 14521 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34025 { 14521 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34026 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34027 { 14521 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34028 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34029 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34030 { 14521 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34031 { 14521 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34032 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34033 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34034 { 14521 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34035 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34036 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34037 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34038 { 14521 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34039 { 14521 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34040 { 14521 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34041 { 14521 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34042 { 14521 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34043 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34044 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34045 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34046 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34047 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34048 { 14529 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34049 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34050 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34051 { 14529 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34052 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34053 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34054 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34055 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34056 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34057 { 14529 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34058 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34059 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34060 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34061 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34062 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34063 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34064 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34065 { 14529 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34066 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34067 { 14529 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34068 { 14529 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34069 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34070 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34071 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34072 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34073 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34074 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34075 { 14538 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34076 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34077 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34078 { 14538 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34079 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34080 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34081 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34082 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34083 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34084 { 14538 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34085 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34086 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34087 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34088 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34089 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34090 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34091 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34092 { 14538 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34093 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34094 { 14538 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34095 { 14538 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34096 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34097 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34098 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34099 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34100 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34101 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34102 { 14547 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34103 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34104 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34105 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34106 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34107 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34108 { 14547 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34109 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34110 { 14547 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34111 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34112 { 14547 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34113 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34114 { 14547 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34115 { 14556 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34116 { 14556 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34117 { 14556 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34118 { 14556 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34119 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34120 { 14556 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34121 { 14556 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34122 { 14556 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34123 { 14556 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34124 { 14556 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34125 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34126 { 14556 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34127 { 14556 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34128 { 14556 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34129 { 14556 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34130 { 14556 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34131 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34132 { 14556 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34133 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34134 { 14564 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34135 { 14564 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 34136 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34137 { 14571 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34138 { 14571 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, }, 34139 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34140 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34141 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34142 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34143 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34144 { 14578 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34145 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34146 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34147 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34148 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34149 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34150 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34151 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34152 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34153 { 14578 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34154 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34155 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34156 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34157 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34158 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34159 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34160 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34161 { 14578 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34162 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34163 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34164 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34165 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34166 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34167 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34168 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34169 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34170 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34171 { 14586 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34172 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34173 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34174 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34175 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34176 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34177 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34178 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34179 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34180 { 14586 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34181 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34182 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34183 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34184 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34185 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34186 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34187 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34188 { 14586 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34189 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34190 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34191 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34192 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34193 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34194 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34195 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34196 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34197 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34198 { 14594 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34199 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34200 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34201 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34202 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34203 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34204 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34205 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34206 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34207 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34208 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34209 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34210 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34211 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34212 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34213 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34214 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34215 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34216 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34217 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34218 { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34219 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34220 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34221 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34222 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34223 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34224 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34225 { 14603 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34226 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34227 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34228 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34229 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34230 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34231 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34232 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34233 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34234 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34235 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34236 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34237 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34238 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34239 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34240 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34241 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34242 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34243 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34244 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34245 { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34246 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34247 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34248 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34249 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34250 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34251 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34252 { 14612 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34253 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34254 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34255 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34256 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34257 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34258 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34259 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34260 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34261 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34262 { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34263 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34264 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34265 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34266 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34267 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34268 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34269 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34270 { 14621 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34271 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34272 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34273 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34274 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34275 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34276 { 14621 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34277 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34278 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34279 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34280 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34281 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34282 { 14621 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34283 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34284 { 14629 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34285 { 14629 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34286 { 14629 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34287 { 14629 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34288 { 14629 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34289 { 14629 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34290 { 14629 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34291 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34292 { 14629 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34293 { 14629 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34294 { 14629 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34295 { 14629 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34296 { 14629 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34297 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34298 { 14629 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34299 { 14629 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34300 { 14629 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34301 { 14629 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34302 { 14629 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34303 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34304 { 14629 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34305 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 34306 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 34307 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 34308 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 34309 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 34310 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 34311 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34312 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34313 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34314 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34315 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34316 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34317 { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34318 { 14650 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34319 { 14650 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34320 { 14650 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34321 { 14650 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34322 { 14650 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34323 { 14650 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34324 { 14650 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34325 { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34326 { 14650 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34327 { 14650 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34328 { 14650 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34329 { 14650 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34330 { 14650 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34331 { 14650 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34332 { 14650 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34333 { 14650 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34334 { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34335 { 14650 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34336 { 14650 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34337 { 14650 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34338 { 14650 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34339 { 14650 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34340 { 14650 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34341 { 14650 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34342 { 14650 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34343 { 14650 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34344 { 14650 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34345 { 14650 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34346 { 14650 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34347 { 14650 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34348 { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34349 { 14658 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34350 { 14658 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34351 { 14658 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34352 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34353 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34354 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34355 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34356 { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34357 { 14658 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34358 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34359 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34360 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34361 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34362 { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34363 { 14658 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34364 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34365 { 14658 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34366 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34367 { 14658 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34368 { 14658 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34369 { 14658 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34370 { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34371 { 14667 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34372 { 14667 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34373 { 14667 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34374 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34375 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34376 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34377 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34378 { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34379 { 14667 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34380 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34381 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34382 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34383 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34384 { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34385 { 14667 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34386 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34387 { 14667 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34388 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34389 { 14667 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34390 { 14667 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34391 { 14667 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34392 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34393 { 14676 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34394 { 14676 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34395 { 14676 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34396 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34397 { 14684 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34398 { 14684 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34399 { 14684 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34400 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34401 { 14692 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34402 { 14692 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34403 { 14692 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34404 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34405 { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34406 { 14700 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34407 { 14700 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34408 { 14700 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34409 { 14700 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34410 { 14700 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34411 { 14700 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34412 { 14700 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34413 { 14700 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34414 { 14700 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34415 { 14700 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34416 { 14700 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34417 { 14700 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34418 { 14700 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34419 { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34420 { 14700 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34421 { 14700 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34422 { 14700 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34423 { 14700 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34424 { 14700 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34425 { 14700 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34426 { 14700 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34427 { 14700 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34428 { 14700 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34429 { 14700 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34430 { 14700 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34431 { 14700 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34432 { 14700 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34433 { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34434 { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34435 { 14700 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34436 { 14700 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34437 { 14700 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34438 { 14700 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34439 { 14700 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34440 { 14700 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34441 { 14700 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34442 { 14700 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34443 { 14700 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34444 { 14700 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34445 { 14700 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34446 { 14700 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34447 { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34448 { 14700 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34449 { 14700 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34450 { 14700 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34451 { 14700 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34452 { 14700 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34453 { 14700 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34454 { 14700 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34455 { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34456 { 14707 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34457 { 14707 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34458 { 14707 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34459 { 14707 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34460 { 14707 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34461 { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34462 { 14707 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34463 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34464 { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34465 { 14715 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34466 { 14715 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34467 { 14715 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34468 { 14715 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34469 { 14715 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34470 { 14715 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34471 { 14715 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34472 { 14715 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34473 { 14715 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34474 { 14715 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34475 { 14715 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34476 { 14715 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34477 { 14715 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34478 { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34479 { 14715 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34480 { 14715 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34481 { 14715 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34482 { 14715 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34483 { 14715 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34484 { 14715 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34485 { 14715 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34486 { 14715 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34487 { 14715 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34488 { 14715 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34489 { 14715 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34490 { 14715 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34491 { 14715 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34492 { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34493 { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34494 { 14715 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34495 { 14715 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34496 { 14715 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34497 { 14715 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34498 { 14715 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34499 { 14715 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34500 { 14715 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34501 { 14715 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34502 { 14715 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34503 { 14715 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34504 { 14715 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34505 { 14715 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34506 { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34507 { 14715 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34508 { 14715 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34509 { 14715 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34510 { 14715 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34511 { 14715 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34512 { 14715 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34513 { 14715 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34514 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34515 { 14722 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34516 { 14722 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34517 { 14722 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34518 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34519 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34520 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34521 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34522 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34523 { 14722 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34524 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34525 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34526 { 14722 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34527 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34528 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34529 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34530 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34531 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34532 { 14722 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34533 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34534 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34535 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34536 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34537 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34538 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34539 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34540 { 14722 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34541 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34542 { 14722 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34543 { 14722 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34544 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34545 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34546 { 14730 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34547 { 14730 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34548 { 14730 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34549 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34550 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34551 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34552 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34553 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34554 { 14730 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34555 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34556 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34557 { 14730 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34558 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34559 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34560 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34561 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34562 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34563 { 14730 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34564 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34565 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34566 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34567 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34568 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34569 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34570 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34571 { 14730 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34572 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34573 { 14730 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34574 { 14730 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34575 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34576 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34577 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34578 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34579 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34580 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34581 { 14738 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34582 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34583 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34584 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34585 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34586 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34587 { 14738 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34588 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34589 { 14738 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34590 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34591 { 14738 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34592 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34593 { 14738 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34594 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34595 { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34596 { 14746 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34597 { 14746 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34598 { 14746 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34599 { 14746 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34600 { 14746 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34601 { 14746 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34602 { 14746 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34603 { 14746 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34604 { 14746 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34605 { 14746 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34606 { 14746 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34607 { 14746 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34608 { 14746 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34609 { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34610 { 14746 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34611 { 14746 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34612 { 14746 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34613 { 14746 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34614 { 14746 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34615 { 14746 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34616 { 14746 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34617 { 14746 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34618 { 14746 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34619 { 14746 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34620 { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34621 { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34622 { 14746 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34623 { 14746 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34624 { 14746 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34625 { 14746 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34626 { 14746 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34627 { 14746 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34628 { 14746 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34629 { 14746 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34630 { 14746 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34631 { 14746 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34632 { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34633 { 14746 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34634 { 14746 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34635 { 14746 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34636 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34637 { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34638 { 14753 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34639 { 14753 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34640 { 14753 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34641 { 14753 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34642 { 14753 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34643 { 14753 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34644 { 14753 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34645 { 14753 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34646 { 14753 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34647 { 14753 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34648 { 14753 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34649 { 14753 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34650 { 14753 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34651 { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34652 { 14753 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34653 { 14753 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34654 { 14753 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34655 { 14753 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34656 { 14753 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34657 { 14753 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34658 { 14753 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34659 { 14753 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34660 { 14753 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34661 { 14753 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34662 { 14753 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34663 { 14753 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34664 { 14753 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34665 { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34666 { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34667 { 14753 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34668 { 14753 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34669 { 14753 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34670 { 14753 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34671 { 14753 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34672 { 14753 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34673 { 14753 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34674 { 14753 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34675 { 14753 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34676 { 14753 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34677 { 14753 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34678 { 14753 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34679 { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34680 { 14753 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34681 { 14753 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34682 { 14753 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34683 { 14753 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34684 { 14753 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34685 { 14753 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34686 { 14753 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34687 { 14760 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34688 { 14760 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34689 { 14760 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34690 { 14760 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34691 { 14760 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34692 { 14760 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34693 { 14760 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34694 { 14760 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34695 { 14760 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34696 { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34697 { 14760 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34698 { 14760 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34699 { 14760 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34700 { 14760 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34701 { 14760 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34702 { 14760 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34703 { 14760 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34704 { 14760 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34705 { 14760 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34706 { 14760 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34707 { 14760 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34708 { 14760 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34709 { 14760 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34710 { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34711 { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34712 { 14760 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34713 { 14760 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34714 { 14760 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34715 { 14760 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34716 { 14760 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34717 { 14760 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34718 { 14760 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34719 { 14760 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34720 { 14760 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34721 { 14760 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34722 { 14760 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34723 { 14760 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34724 { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34725 { 14760 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34726 { 14760 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34727 { 14760 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34728 { 14760 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34729 { 14760 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34730 { 14760 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34731 { 14760 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34732 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34733 { 14767 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34734 { 14767 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34735 { 14767 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34736 { 14767 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34737 { 14767 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34738 { 14767 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34739 { 14767 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34740 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34741 { 14767 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34742 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34743 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34744 { 14767 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34745 { 14767 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34746 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34747 { 14767 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34748 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34749 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34750 { 14767 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34751 { 14767 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34752 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34753 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34754 { 14767 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34755 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34756 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34757 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34758 { 14767 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34759 { 14767 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34760 { 14767 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34761 { 14767 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34762 { 14767 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34763 { 14775 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34764 { 14775 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34765 { 14775 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34766 { 14775 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34767 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34768 { 14775 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34769 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34770 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34771 { 14775 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34772 { 14775 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34773 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34774 { 14775 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34775 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34776 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34777 { 14775 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34778 { 14775 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34779 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34780 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34781 { 14775 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34782 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34783 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34784 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34785 { 14775 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34786 { 14775 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34787 { 14775 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 34788 { 14775 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 34789 { 14775 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 34790 { 14783 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34791 { 14783 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34792 { 14783 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34793 { 14783 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34794 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34795 { 14783 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34796 { 14783 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34797 { 14783 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34798 { 14783 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34799 { 14783 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34800 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34801 { 14783 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34802 { 14783 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34803 { 14783 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34804 { 14783 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34805 { 14783 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34806 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34807 { 14783 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34808 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34809 { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34810 { 14791 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34811 { 14791 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34812 { 14791 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34813 { 14791 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34814 { 14791 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34815 { 14791 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34816 { 14791 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34817 { 14791 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34818 { 14791 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34819 { 14791 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34820 { 14791 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34821 { 14791 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34822 { 14791 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34823 { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34824 { 14791 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34825 { 14791 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34826 { 14791 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34827 { 14791 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34828 { 14791 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34829 { 14791 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34830 { 14791 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34831 { 14791 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34832 { 14791 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34833 { 14791 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34834 { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34835 { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34836 { 14791 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34837 { 14791 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34838 { 14791 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34839 { 14791 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34840 { 14791 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34841 { 14791 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34842 { 14791 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34843 { 14791 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34844 { 14791 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34845 { 14791 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34846 { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34847 { 14791 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34848 { 14791 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34849 { 14791 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34850 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34851 { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34852 { 14798 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34853 { 14798 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34854 { 14798 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34855 { 14798 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34856 { 14798 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34857 { 14798 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34858 { 14798 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34859 { 14798 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34860 { 14798 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34861 { 14798 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34862 { 14798 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34863 { 14798 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34864 { 14798 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34865 { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34866 { 14798 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34867 { 14798 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34868 { 14798 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34869 { 14798 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34870 { 14798 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34871 { 14798 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34872 { 14798 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34873 { 14798 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34874 { 14798 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34875 { 14798 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34876 { 14798 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34877 { 14798 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34878 { 14798 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34879 { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34880 { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34881 { 14798 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34882 { 14798 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34883 { 14798 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34884 { 14798 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34885 { 14798 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34886 { 14798 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34887 { 14798 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34888 { 14798 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34889 { 14798 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34890 { 14798 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34891 { 14798 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34892 { 14798 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34893 { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34894 { 14798 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34895 { 14798 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34896 { 14798 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34897 { 14798 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34898 { 14798 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34899 { 14798 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34900 { 14798 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 34901 { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34902 { 14805 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34903 { 14805 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34904 { 14805 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34905 { 14805 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34906 { 14805 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34907 { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34908 { 14805 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34909 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34910 { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 34911 { 14813 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34912 { 14813 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 34913 { 14813 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 34914 { 14813 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 34915 { 14813 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34916 { 14813 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34917 { 14813 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34918 { 14813 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34919 { 14813 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 34920 { 14813 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34921 { 14813 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 34922 { 14813 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34923 { 14813 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 34924 { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34925 { 14813 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 34926 { 14813 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34927 { 14813 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34928 { 14813 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34929 { 14813 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34930 { 14813 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34931 { 14813 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34932 { 14813 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34933 { 14813 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34934 { 14813 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 34935 { 14813 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34936 { 14813 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 34937 { 14813 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34938 { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 34939 { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34940 { 14813 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 34941 { 14813 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34942 { 14813 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34943 { 14813 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 34944 { 14813 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34945 { 14813 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 34946 { 14813 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34947 { 14813 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 34948 { 14813 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 34949 { 14813 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 34950 { 14813 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 34951 { 14813 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34952 { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 34953 { 14813 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 34954 { 14813 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 34955 { 14813 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 34956 { 14813 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34957 { 14813 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 34958 { 14813 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 34959 { 14813 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 34960 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34961 { 14820 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34962 { 14820 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34963 { 14820 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34964 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34965 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34966 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34967 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34968 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 34969 { 14820 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 34970 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34971 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34972 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34973 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 34974 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 34975 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 34976 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 34977 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 34978 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 34979 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 34980 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 34981 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34982 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 34983 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 34984 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34985 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 34986 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 34987 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34988 { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 34989 { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 34990 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 34991 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 34992 { 14828 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 34993 { 14828 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 34994 { 14828 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 34995 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 34996 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 34997 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 34998 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 34999 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35000 { 14828 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35001 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35002 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35003 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35004 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35005 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35006 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35007 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35008 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35009 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35010 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35011 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35012 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35013 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35014 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35015 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35016 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35017 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35018 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35019 { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35020 { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35021 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35022 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35023 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35024 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35025 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35026 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35027 { 14836 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35028 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35029 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35030 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35031 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35032 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35033 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35034 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35035 { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35036 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35037 { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35038 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35039 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35040 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35041 { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 35042 { 14844 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35043 { 14844 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, }, 35044 { 14844 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 35045 { 14844 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, }, 35046 { 14844 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35047 { 14844 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35048 { 14844 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35049 { 14844 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35050 { 14844 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, }, 35051 { 14844 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35052 { 14844 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, }, 35053 { 14844 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35054 { 14844 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, }, 35055 { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35056 { 14844 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, }, 35057 { 14844 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35058 { 14844 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35059 { 14844 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35060 { 14844 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35061 { 14844 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35062 { 14844 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, }, 35063 { 14844 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35064 { 14844 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, }, 35065 { 14844 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35066 { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, }, 35067 { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35068 { 14844 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, }, 35069 { 14844 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35070 { 14844 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35071 { 14844 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35072 { 14844 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35073 { 14844 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35074 { 14844 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, }, 35075 { 14844 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35076 { 14844 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, }, 35077 { 14844 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35078 { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, }, 35079 { 14844 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35080 { 14844 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, }, 35081 { 14844 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35082 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35083 { 14851 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35084 { 14851 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35085 { 14851 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35086 { 14851 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35087 { 14851 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35088 { 14851 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35089 { 14851 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35090 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35091 { 14851 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35092 { 14851 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35093 { 14851 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35094 { 14851 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35095 { 14851 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35096 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35097 { 14851 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35098 { 14851 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35099 { 14851 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35100 { 14851 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35101 { 14851 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35102 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35103 { 14851 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35104 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35105 { 14858 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35106 { 14858 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35107 { 14858 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35108 { 14858 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35109 { 14858 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35110 { 14858 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35111 { 14858 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35112 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35113 { 14858 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35114 { 14858 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35115 { 14858 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35116 { 14858 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35117 { 14858 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35118 { 14858 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35119 { 14858 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35120 { 14858 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35121 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35122 { 14858 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35123 { 14858 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35124 { 14858 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35125 { 14858 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35126 { 14858 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35127 { 14858 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35128 { 14858 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35129 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35130 { 14858 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35131 { 14858 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35132 { 14858 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35133 { 14858 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35134 { 14858 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35135 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35136 { 14865 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35137 { 14865 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35138 { 14865 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35139 { 14865 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35140 { 14865 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35141 { 14865 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35142 { 14865 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35143 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35144 { 14865 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35145 { 14865 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35146 { 14865 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35147 { 14865 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35148 { 14865 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35149 { 14865 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35150 { 14865 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35151 { 14865 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35152 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35153 { 14865 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35154 { 14865 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35155 { 14865 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35156 { 14865 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35157 { 14865 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35158 { 14865 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35159 { 14865 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35160 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35161 { 14865 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35162 { 14865 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35163 { 14865 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35164 { 14865 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35165 { 14865 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35166 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35167 { 14872 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35168 { 14872 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35169 { 14872 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35170 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35171 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35172 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35173 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35174 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35175 { 14872 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35176 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35177 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35178 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35179 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35180 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35181 { 14872 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35182 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35183 { 14872 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35184 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35185 { 14872 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35186 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35187 { 14872 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35188 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35189 { 14880 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35190 { 14880 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35191 { 14880 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35192 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35193 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35194 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35195 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35196 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35197 { 14880 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35198 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35199 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35200 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35201 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35202 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35203 { 14880 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35204 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35205 { 14880 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35206 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35207 { 14880 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35208 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35209 { 14880 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35210 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35211 { 14888 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35212 { 14888 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35213 { 14888 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35214 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35215 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35216 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35217 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35218 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35219 { 14888 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35220 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35221 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35222 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35223 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35224 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35225 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35226 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35227 { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35228 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35229 { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35230 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35231 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35232 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35233 { 14897 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35234 { 14897 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35235 { 14897 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35236 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35237 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35238 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35239 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35240 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35241 { 14897 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35242 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35243 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35244 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35245 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35246 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35247 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35248 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35249 { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35250 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35251 { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35252 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35253 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35254 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35255 { 14906 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35256 { 14906 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35257 { 14906 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35258 { 14906 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35259 { 14906 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35260 { 14906 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35261 { 14906 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35262 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35263 { 14906 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35264 { 14906 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35265 { 14906 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35266 { 14906 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35267 { 14906 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35268 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35269 { 14906 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35270 { 14906 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35271 { 14906 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35272 { 14906 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35273 { 14906 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35274 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35275 { 14906 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35276 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35277 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35278 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35279 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35280 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35281 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35282 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35283 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35284 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35285 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35286 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35287 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35288 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35289 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35290 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35291 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35292 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35293 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35294 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35295 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35296 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35297 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35298 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35299 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35300 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35301 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35302 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35303 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35304 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35305 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35306 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35307 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35308 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35309 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35310 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35311 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35312 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35313 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35314 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35315 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35316 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35317 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35318 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35319 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35320 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35321 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35322 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35323 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35324 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35325 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35326 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35327 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35328 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35329 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35330 { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 35331 { 14935 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 35332 { 14935 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 35333 { 14935 /* vptest */, X86::VPTESTYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 35334 { 14942 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35335 { 14942 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35336 { 14942 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35337 { 14942 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35338 { 14942 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35339 { 14942 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35340 { 14942 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35341 { 14942 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35342 { 14942 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35343 { 14942 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35344 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35345 { 14942 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35346 { 14951 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35347 { 14951 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35348 { 14951 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35349 { 14951 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35350 { 14951 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35351 { 14951 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35352 { 14951 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35353 { 14951 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35354 { 14951 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35355 { 14951 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35356 { 14951 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35357 { 14951 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35358 { 14951 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35359 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35360 { 14951 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35361 { 14951 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35362 { 14951 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35363 { 14951 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35364 { 14960 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35365 { 14960 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35366 { 14960 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35367 { 14960 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35368 { 14960 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35369 { 14960 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35370 { 14960 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35371 { 14960 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35372 { 14960 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35373 { 14960 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35374 { 14960 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35375 { 14960 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35376 { 14960 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35377 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35378 { 14960 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35379 { 14960 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35380 { 14960 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35381 { 14960 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35382 { 14969 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35383 { 14969 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35384 { 14969 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35385 { 14969 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35386 { 14969 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35387 { 14969 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35388 { 14969 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35389 { 14969 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35390 { 14969 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35391 { 14969 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35392 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35393 { 14969 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35394 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35395 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35396 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35397 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35398 { 14978 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35399 { 14978 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35400 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35401 { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35402 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35403 { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35404 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35405 { 14978 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35406 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35407 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35408 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35409 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35410 { 14988 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35411 { 14988 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35412 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35413 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35414 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35415 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35416 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35417 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35418 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35419 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35420 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35421 { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35422 { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35423 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35424 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35425 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35426 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35427 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35428 { 14998 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35429 { 14998 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35430 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35431 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35432 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35433 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35434 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35435 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35436 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35437 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35438 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35439 { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35440 { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35441 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35442 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, }, 35443 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, }, 35444 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, }, 35445 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, }, 35446 { 15008 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, }, 35447 { 15008 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, }, 35448 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35449 { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35450 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35451 { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35452 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35453 { 15008 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35454 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35455 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35456 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35457 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35458 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35459 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35460 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35461 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35462 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35463 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35464 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35465 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35466 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35467 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35468 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35469 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35470 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35471 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35472 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35473 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35474 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35475 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35476 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35477 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35478 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35479 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35480 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35481 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35482 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35483 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35484 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35485 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35486 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35487 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35488 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35489 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35490 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35491 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35492 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35493 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35494 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35495 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35496 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35497 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35498 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35499 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35500 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35501 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35502 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35503 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35504 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35505 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35506 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35507 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35508 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35509 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35510 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35511 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35512 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35513 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35514 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35515 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35516 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35517 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35518 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35519 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35520 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35521 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35522 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35523 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35524 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35525 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35526 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35527 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35528 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35529 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35530 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35531 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35532 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35533 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35534 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35535 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35536 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35537 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35538 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35539 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35540 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35541 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35542 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35543 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35544 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35545 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35546 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35547 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35548 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35549 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35550 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35551 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35552 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35553 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35554 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35555 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35556 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35557 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35558 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35559 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35560 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35561 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35562 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35563 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35564 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35565 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35566 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35567 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35568 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35569 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35570 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35571 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35572 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35573 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35574 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35575 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35576 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35577 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35578 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35579 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35580 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35581 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35582 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35583 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35584 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35585 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35586 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35587 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35588 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35589 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35590 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35591 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35592 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35593 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35594 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35595 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35596 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35597 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35598 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35599 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35600 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35601 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35602 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35603 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35604 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35605 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35606 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35607 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35608 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35609 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35610 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35611 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35612 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35613 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35614 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35615 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35616 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35617 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35618 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35619 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35620 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35621 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35622 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35623 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35624 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35625 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35626 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35627 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35628 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35629 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35630 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35631 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35632 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35633 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35634 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35635 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35636 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35637 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35638 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35639 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35640 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35641 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35642 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35643 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35644 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35645 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35646 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35647 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35648 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35649 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35650 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35651 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35652 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35653 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35654 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35655 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35656 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35657 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35658 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35659 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35660 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35661 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35662 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35663 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35664 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35665 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35666 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35667 { 15108 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 35668 { 15108 /* vpxor */, X86::VPXORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 35669 { 15108 /* vpxor */, X86::VPXORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 35670 { 15114 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35671 { 15114 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35672 { 15114 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35673 { 15114 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35674 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35675 { 15114 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35676 { 15114 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35677 { 15114 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35678 { 15114 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35679 { 15114 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35680 { 15114 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35681 { 15114 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35682 { 15114 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35683 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35684 { 15114 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35685 { 15114 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35686 { 15114 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35687 { 15114 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35688 { 15114 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35689 { 15114 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35690 { 15114 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35691 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35692 { 15114 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35693 { 15114 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35694 { 15114 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35695 { 15114 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35696 { 15114 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35697 { 15121 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35698 { 15121 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 35699 { 15121 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 35700 { 15121 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 35701 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 35702 { 15121 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 35703 { 15121 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35704 { 15121 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35705 { 15121 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35706 { 15121 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35707 { 15121 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 35708 { 15121 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 35709 { 15121 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 35710 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 35711 { 15121 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 35712 { 15121 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35713 { 15121 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 35714 { 15121 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35715 { 15121 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 35716 { 15121 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 35717 { 15121 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35718 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 35719 { 15121 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 35720 { 15121 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35721 { 15121 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35722 { 15121 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35723 { 15121 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35724 { 15128 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35725 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35726 { 15128 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35727 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35728 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35729 { 15128 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35730 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35731 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35732 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35733 { 15128 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35734 { 15128 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35735 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35736 { 15128 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35737 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35738 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35739 { 15128 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35740 { 15128 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35741 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35742 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35743 { 15128 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35744 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35745 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35746 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35747 { 15128 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35748 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35749 { 15128 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35750 { 15128 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35751 { 15128 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35752 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35753 { 15128 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35754 { 15137 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35755 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35756 { 15137 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35757 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35758 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35759 { 15137 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35760 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35761 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35762 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35763 { 15137 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35764 { 15137 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35765 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35766 { 15137 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35767 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35768 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35769 { 15137 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35770 { 15137 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35771 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35772 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35773 { 15137 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35774 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35775 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35776 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35777 { 15137 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35778 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35779 { 15137 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35780 { 15137 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35781 { 15137 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35782 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35783 { 15137 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35784 { 15146 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35785 { 15146 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 35786 { 15146 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35787 { 15146 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35788 { 15146 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 35789 { 15146 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35790 { 15146 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 35791 { 15146 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35792 { 15146 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35793 { 15155 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35794 { 15155 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 35795 { 15155 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35796 { 15155 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35797 { 15155 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 35798 { 15155 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35799 { 15155 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 35800 { 15155 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35801 { 15155 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35802 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 35803 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 35804 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 35805 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 35806 { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 35807 { 15164 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 35808 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 35809 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 35810 { 15164 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35811 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 35812 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 35813 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 35814 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 35815 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 35816 { 15164 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 35817 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 35818 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 35819 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 35820 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 35821 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 35822 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 35823 { 15164 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 35824 { 15164 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 35825 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 35826 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 35827 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 35828 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 35829 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 35830 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 35831 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 35832 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 35833 { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 35834 { 15173 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 35835 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 35836 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 35837 { 15173 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35838 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 35839 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 35840 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 35841 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 35842 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 35843 { 15173 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 35844 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 35845 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 35846 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 35847 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 35848 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 35849 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 35850 { 15173 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 35851 { 15173 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 35852 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 35853 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 35854 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 35855 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 35856 { 15182 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35857 { 15182 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 35858 { 15182 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35859 { 15182 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 35860 { 15182 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35861 { 15182 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 35862 { 15191 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35863 { 15191 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 35864 { 15191 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35865 { 15191 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 35866 { 15191 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35867 { 15191 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 35868 { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 35869 { 15200 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 35870 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 35871 { 15200 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 35872 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 35873 { 15200 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 35874 { 15200 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 35875 { 15200 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 35876 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 35877 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 35878 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 35879 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 35880 { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 35881 { 15209 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 35882 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 35883 { 15209 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 35884 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 35885 { 15209 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 35886 { 15209 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 35887 { 15209 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 35888 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 35889 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 35890 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 35891 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 35892 { 15218 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35893 { 15218 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 35894 { 15218 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 35895 { 15218 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35896 { 15218 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 35897 { 15218 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35898 { 15218 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 35899 { 15218 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 35900 { 15218 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 35901 { 15227 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 35902 { 15227 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 35903 { 15227 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 35904 { 15227 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 35905 { 15227 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 35906 { 15227 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 35907 { 15227 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 35908 { 15227 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 35909 { 15227 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 35910 { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 35911 { 15236 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 35912 { 15236 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 35913 { 15236 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 35914 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 35915 { 15243 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 35916 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35917 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35918 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35919 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35920 { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35921 { 15250 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35922 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35923 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35924 { 15250 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35925 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35926 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35927 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35928 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35929 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35930 { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35931 { 15250 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35932 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35933 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35934 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35935 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35936 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35937 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35938 { 15250 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35939 { 15250 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35940 { 15250 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35941 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35942 { 15250 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 35943 { 15250 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35944 { 15250 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35945 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35946 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35947 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35948 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35949 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35950 { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35951 { 15260 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35952 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35953 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35954 { 15260 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35955 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35956 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35957 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35958 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35959 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35960 { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35961 { 15260 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35962 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35963 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35964 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35965 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35966 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35967 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35968 { 15260 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35969 { 15260 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 35970 { 15260 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35971 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35972 { 15260 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 35973 { 15260 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 35974 { 15260 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35975 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 35976 { 15270 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35977 { 15270 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 35978 { 15270 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35979 { 15270 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35980 { 15270 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 35981 { 15270 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35982 { 15270 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 35983 { 15270 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35984 { 15270 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35985 { 15280 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35986 { 15280 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 35987 { 15280 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35988 { 15280 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35989 { 15280 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 35990 { 15280 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35991 { 15280 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 35992 { 15280 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35993 { 15280 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 35994 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 35995 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 35996 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 35997 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 35998 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 35999 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36000 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 36001 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36002 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36003 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36004 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36005 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36006 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36007 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36008 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36009 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36010 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36011 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36012 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 36013 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36014 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36015 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36016 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36017 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36018 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36019 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36020 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 36021 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36022 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36023 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36024 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36025 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36026 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36027 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36028 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36029 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36030 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36031 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36032 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36033 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36034 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36035 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36036 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36037 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36038 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36039 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36040 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36041 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36042 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36043 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36044 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36045 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36046 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36047 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36048 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36049 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36050 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36051 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36052 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36053 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36054 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36055 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 36056 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36057 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36058 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 36059 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36060 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 36061 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36062 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36063 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36064 { 15326 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 36065 { 15326 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36066 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36067 { 15326 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 36068 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36069 { 15326 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 36070 { 15326 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36071 { 15326 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, }, 36072 { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 36073 { 15338 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36074 { 15338 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 36075 { 15338 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36076 { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 36077 { 15347 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36078 { 15347 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 36079 { 15347 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36080 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 36081 { 15356 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, }, 36082 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 36083 { 15365 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, }, 36084 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 36085 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 36086 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 36087 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 36088 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 36089 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 36090 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36091 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36092 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36093 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36094 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 36095 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36096 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 36097 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36098 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 36099 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 36100 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 36101 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 36102 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 36103 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 36104 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 36105 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 36106 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 36107 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 36108 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 36109 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 36110 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 36111 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 36112 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 36113 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 36114 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 36115 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 36116 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 36117 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36118 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36119 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36120 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36121 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 36122 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36123 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 36124 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36125 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 36126 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 36127 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 36128 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 36129 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 36130 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 36131 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 36132 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 36133 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 36134 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 36135 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 36136 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 36137 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 36138 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36139 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 36140 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36141 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 36142 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36143 { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 36144 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36145 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 36146 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36147 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 36148 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36149 { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 36150 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 36151 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 36152 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 36153 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36154 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36155 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 36156 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 36157 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 36158 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 36159 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 36160 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 36161 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 36162 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 36163 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 36164 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, }, 36165 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36166 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36167 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 36168 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 36169 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 36170 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, }, 36171 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 36172 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, }, 36173 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 36174 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36175 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 36176 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36177 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36178 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 36179 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36180 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 36181 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36182 { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36183 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36184 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 36185 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36186 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36187 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 36188 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36189 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 36190 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36191 { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36192 { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36193 { 15462 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36194 { 15462 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 36195 { 15462 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 36196 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36197 { 15471 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 36198 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36199 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36200 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36201 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36202 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36203 { 15480 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36204 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36205 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36206 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36207 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36208 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36209 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36210 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36211 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36212 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36213 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36214 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36215 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36216 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36217 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36218 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36219 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36220 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36221 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36222 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36223 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36224 { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36225 { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36226 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36227 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36228 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36229 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36230 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36231 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36232 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36233 { 15490 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36234 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36235 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36236 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36237 { 15490 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36238 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36239 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36240 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36241 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36242 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36243 { 15490 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36244 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36245 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36246 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36247 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36248 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36249 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36250 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36251 { 15490 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36252 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36253 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36254 { 15490 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36255 { 15490 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36256 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36257 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36258 { 15500 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36259 { 15500 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 36260 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36261 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36262 { 15500 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 36263 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36264 { 15500 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 36265 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36266 { 15500 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36267 { 15510 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36268 { 15510 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 36269 { 15510 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36270 { 15510 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36271 { 15510 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 36272 { 15510 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36273 { 15510 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 36274 { 15510 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36275 { 15510 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36276 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36277 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36278 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36279 { 15532 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36280 { 15532 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36281 { 15532 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36282 { 15544 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, }, 36283 { 15559 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 36284 { 15574 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 36285 { 15589 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, }, 36286 { 15604 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, }, 36287 { 15619 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 36288 { 15634 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, }, 36289 { 15649 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, }, 36290 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36291 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36292 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36293 { 15676 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36294 { 15676 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36295 { 15676 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36296 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36297 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36298 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36299 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36300 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36301 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36302 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36303 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36304 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36305 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36306 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36307 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36308 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36309 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36310 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36311 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36312 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36313 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36314 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36315 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36316 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36317 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36318 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36319 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36320 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36321 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36322 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36323 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36324 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36325 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36326 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36327 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36328 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36329 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36330 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36331 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36332 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36333 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36334 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36335 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36336 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36337 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36338 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36339 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36340 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36341 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36342 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36343 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36344 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36345 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36346 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36347 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36348 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36349 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36350 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36351 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36352 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36353 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36354 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36355 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36356 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36357 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36358 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36359 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36360 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36361 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36362 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36363 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36364 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36365 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36366 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36367 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36368 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 36369 { 15732 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36370 { 15732 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 36371 { 15732 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36372 { 15732 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36373 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36374 { 15732 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36375 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36376 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36377 { 15732 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36378 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 36379 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36380 { 15732 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36381 { 15732 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36382 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36383 { 15732 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36384 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36385 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36386 { 15732 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36387 { 15732 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36388 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36389 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 36390 { 15732 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36391 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36392 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36393 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36394 { 15732 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36395 { 15732 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36396 { 15732 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, }, 36397 { 15732 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36398 { 15732 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36399 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, }, 36400 { 15740 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36401 { 15740 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, }, 36402 { 15740 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36403 { 15740 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36404 { 15740 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36405 { 15740 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36406 { 15740 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36407 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36408 { 15740 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36409 { 15740 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36410 { 15740 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36411 { 15740 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36412 { 15740 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36413 { 15740 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36414 { 15740 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36415 { 15740 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36416 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36417 { 15740 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36418 { 15740 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, }, 36419 { 15740 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, }, 36420 { 15740 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36421 { 15740 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, }, 36422 { 15740 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, }, 36423 { 15740 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36424 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, }, 36425 { 15740 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, }, 36426 { 15740 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36427 { 15740 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, }, 36428 { 15740 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, }, 36429 { 15740 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, }, 36430 { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36431 { 15748 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36432 { 15748 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 36433 { 15748 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 36434 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 36435 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 36436 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 36437 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 36438 { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 36439 { 15748 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 36440 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36441 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36442 { 15748 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36443 { 15748 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36444 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36445 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 36446 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36447 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 36448 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36449 { 15748 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 36450 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 36451 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 36452 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 36453 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 36454 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 36455 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 36456 { 15748 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 36457 { 15748 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 36458 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 36459 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 36460 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, }, 36461 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, }, 36462 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 36463 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, }, 36464 { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36465 { 15756 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36466 { 15756 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 36467 { 15756 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 36468 { 15756 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 36469 { 15756 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, }, 36470 { 15756 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, }, 36471 { 15756 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, }, 36472 { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, }, 36473 { 15756 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, }, 36474 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36475 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36476 { 15756 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36477 { 15756 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36478 { 15756 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, }, 36479 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, }, 36480 { 15756 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, }, 36481 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, }, 36482 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, }, 36483 { 15756 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, }, 36484 { 15756 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, }, 36485 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, }, 36486 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 36487 { 15756 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, }, 36488 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, }, 36489 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 36490 { 15756 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, }, 36491 { 15756 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, }, 36492 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, }, 36493 { 15756 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 36494 { 15756 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, }, 36495 { 15756 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, }, 36496 { 15756 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, }, 36497 { 15756 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, }, 36498 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36499 { 15764 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 36500 { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36501 { 15764 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 36502 { 15764 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36503 { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36504 { 15764 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 36505 { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36506 { 15764 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 36507 { 15764 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36508 { 15764 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36509 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36510 { 15772 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 36511 { 15772 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36512 { 15772 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 36513 { 15772 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36514 { 15772 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36515 { 15772 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 36516 { 15772 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36517 { 15772 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 36518 { 15772 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36519 { 15772 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36520 { 15780 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, }, 36521 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36522 { 15789 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36523 { 15789 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36524 { 15789 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36525 { 15789 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36526 { 15789 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36527 { 15789 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36528 { 15789 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36529 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36530 { 15789 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36531 { 15789 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36532 { 15789 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36533 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36534 { 15789 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36535 { 15789 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36536 { 15789 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36537 { 15789 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36538 { 15789 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36539 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36540 { 15789 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36541 { 15789 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36542 { 15789 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36543 { 15789 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36544 { 15789 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36545 { 15789 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36546 { 15789 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36547 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36548 { 15789 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36549 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36550 { 15789 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36551 { 15789 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36552 { 15789 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36553 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36554 { 15789 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36555 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36556 { 15796 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36557 { 15796 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36558 { 15796 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36559 { 15796 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36560 { 15796 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36561 { 15796 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36562 { 15796 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36563 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36564 { 15796 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36565 { 15796 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36566 { 15796 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36567 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36568 { 15796 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36569 { 15796 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36570 { 15796 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36571 { 15796 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36572 { 15796 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36573 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36574 { 15796 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36575 { 15796 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36576 { 15796 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36577 { 15796 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36578 { 15796 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36579 { 15796 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36580 { 15796 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36581 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36582 { 15796 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36583 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36584 { 15796 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36585 { 15796 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36586 { 15796 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36587 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, }, 36588 { 15796 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36589 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36590 { 15803 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, }, 36591 { 15803 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36592 { 15803 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, }, 36593 { 15803 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36594 { 15803 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36595 { 15803 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, }, 36596 { 15803 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36597 { 15803 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, }, 36598 { 15803 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36599 { 15803 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36600 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36601 { 15810 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, }, 36602 { 15810 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36603 { 15810 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, }, 36604 { 15810 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36605 { 15810 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36606 { 15810 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, }, 36607 { 15810 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36608 { 15810 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, }, 36609 { 15810 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36610 { 15810 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, }, 36611 { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36612 { 15817 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36613 { 15817 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 36614 { 15817 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 36615 { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36616 { 15825 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36617 { 15825 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, }, 36618 { 15825 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, }, 36619 { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36620 { 15833 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, }, 36621 { 15833 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 36622 { 15833 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, }, 36623 { 15833 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36624 { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36625 { 15842 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, }, 36626 { 15842 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, }, 36627 { 15842 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, }, 36628 { 15842 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, }, 36629 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36630 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36631 { 15851 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36632 { 15851 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36633 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36634 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36635 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36636 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36637 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36638 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36639 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36640 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36641 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36642 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36643 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36644 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36645 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36646 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36647 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36648 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36649 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36650 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36651 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36652 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36653 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36654 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36655 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36656 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36657 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36658 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36659 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36660 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36661 { 15861 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36662 { 15861 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36663 { 15861 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36664 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36665 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36666 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36667 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36668 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36669 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36670 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36671 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36672 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36673 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36674 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36675 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36676 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36677 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36678 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36679 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36680 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36681 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36682 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36683 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36684 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36685 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36686 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36687 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36688 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36689 { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36690 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36691 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36692 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36693 { 15871 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36694 { 15871 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36695 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36696 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36697 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36698 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36699 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36700 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36701 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36702 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36703 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36704 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36705 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36706 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36707 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36708 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36709 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36710 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36711 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36712 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36713 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36714 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36715 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36716 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36717 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36718 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36719 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36720 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36721 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36722 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36723 { 15881 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36724 { 15881 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36725 { 15881 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36726 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36727 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36728 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36729 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36730 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36731 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36732 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36733 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36734 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36735 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36736 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36737 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36738 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36739 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36740 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36741 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36742 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36743 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36744 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36745 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36746 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36747 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36748 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36749 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36750 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36751 { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36752 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36753 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36754 { 15891 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36755 { 15891 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36756 { 15891 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36757 { 15891 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36758 { 15891 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36759 { 15891 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36760 { 15891 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36761 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36762 { 15891 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36763 { 15891 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36764 { 15891 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36765 { 15891 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36766 { 15891 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36767 { 15891 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36768 { 15891 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36769 { 15891 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36770 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36771 { 15891 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36772 { 15891 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36773 { 15891 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36774 { 15891 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36775 { 15891 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36776 { 15891 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36777 { 15891 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36778 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36779 { 15891 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36780 { 15891 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36781 { 15891 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, }, 36782 { 15891 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, }, 36783 { 15891 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, }, 36784 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, }, 36785 { 15898 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, }, 36786 { 15898 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, }, 36787 { 15898 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, }, 36788 { 15898 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 36789 { 15898 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, }, 36790 { 15898 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 36791 { 15898 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, }, 36792 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, }, 36793 { 15898 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, }, 36794 { 15898 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36795 { 15898 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36796 { 15898 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36797 { 15898 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, }, 36798 { 15898 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, }, 36799 { 15898 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, }, 36800 { 15898 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, }, 36801 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, }, 36802 { 15898 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, }, 36803 { 15898 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, }, 36804 { 15898 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, }, 36805 { 15898 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36806 { 15898 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, }, 36807 { 15898 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, }, 36808 { 15898 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36809 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, }, 36810 { 15898 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, }, 36811 { 15898 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36812 { 15898 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, }, 36813 { 15898 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, }, 36814 { 15898 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, }, 36815 { 15905 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, AMFBS_None, { }, }, 36816 { 15914 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, AMFBS_None, { }, }, 36817 { 15925 /* wait */, X86::WAIT, Convert_NoOperands, AMFBS_None, { }, }, 36818 { 15930 /* wbinvd */, X86::WBINVD, Convert_NoOperands, AMFBS_None, { }, }, 36819 { 15937 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, AMFBS_None, { }, }, 36820 { 15946 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 36821 { 15946 /* wrfsbase */, X86::WRFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 36822 { 15975 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, }, 36823 { 15975 /* wrgsbase */, X86::WRGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, }, 36824 { 16004 /* wrmsr */, X86::WRMSR, Convert_NoOperands, AMFBS_None, { }, }, 36825 { 16010 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, AMFBS_None, { }, }, 36826 { 16017 /* wrssd */, X86::WRSSD, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 36827 { 16023 /* wrssq */, X86::WRSSQ, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 36828 { 16029 /* wrussd */, X86::WRUSSD, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 36829 { 16036 /* wrussq */, X86::WRUSSQ, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 36830 { 16043 /* xabort */, X86::XABORT, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, }, 36831 { 16050 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 36832 { 16059 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 36833 { 16059 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 36834 { 16059 /* xadd */, X86::XADD64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 36835 { 16059 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 36836 { 16059 /* xadd */, X86::XADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 36837 { 16059 /* xadd */, X86::XADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 36838 { 16059 /* xadd */, X86::XADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 36839 { 16059 /* xadd */, X86::XADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 36840 { 16088 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, AMFBS_None, { MCK_AbsMem16 }, }, 36841 { 16088 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, }, 36842 { 16095 /* xchg */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_AX, MCK_GR16 }, }, 36843 { 16095 /* xchg */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, AMFBS_In64BitMode, { MCK_EAX, MCK_EAX }, }, 36844 { 16095 /* xchg */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_EAX, MCK_GR32 }, }, 36845 { 16095 /* xchg */, X86::NOOP, Convert_NoOperands, AMFBS_None, { MCK_RAX, MCK_RAX }, }, 36846 { 16095 /* xchg */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_RAX, MCK_GR64 }, }, 36847 { 16095 /* xchg */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, }, 36848 { 16095 /* xchg */, X86::XCHG16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 36849 { 16095 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 36850 { 16095 /* xchg */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, }, 36851 { 16095 /* xchg */, X86::XCHG32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 36852 { 16095 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 36853 { 16095 /* xchg */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_RAX }, }, 36854 { 16095 /* xchg */, X86::XCHG64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 36855 { 16095 /* xchg */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 36856 { 16095 /* xchg */, X86::XCHG8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 36857 { 16095 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 36858 { 16095 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 36859 { 16095 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 36860 { 16095 /* xchg */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 36861 { 16095 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 36862 { 16124 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, AMFBS_None, { }, }, 36863 { 16134 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, AMFBS_None, { }, }, 36864 { 16144 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, AMFBS_None, { }, }, 36865 { 16154 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, AMFBS_None, { }, }, 36866 { 16164 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, AMFBS_None, { }, }, 36867 { 16174 /* xend */, X86::XEND, Convert_NoOperands, AMFBS_None, { }, }, 36868 { 16179 /* xgetbv */, X86::XGETBV, Convert_NoOperands, AMFBS_None, { }, }, 36869 { 16186 /* xlatb */, X86::XLAT, Convert_NoOperands, AMFBS_None, { }, }, 36870 { 16192 /* xor */, X86::XOR8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, }, 36871 { 16192 /* xor */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, }, 36872 { 16192 /* xor */, X86::XOR16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, }, 36873 { 16192 /* xor */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, }, 36874 { 16192 /* xor */, X86::XOR32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, }, 36875 { 16192 /* xor */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, }, 36876 { 16192 /* xor */, X86::XOR64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, }, 36877 { 16192 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, }, 36878 { 16192 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, }, 36879 { 16192 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, }, 36880 { 16192 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, }, 36881 { 16192 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, }, 36882 { 16192 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, }, 36883 { 16192 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, }, 36884 { 16192 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, }, 36885 { 16192 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, }, 36886 { 16192 /* xor */, X86::XOR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, }, 36887 { 16192 /* xor */, X86::XOR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, }, 36888 { 16192 /* xor */, X86::XOR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, }, 36889 { 16192 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, }, 36890 { 16192 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, }, 36891 { 16192 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, }, 36892 { 16192 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, }, 36893 { 16192 /* xor */, X86::XOR16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, }, 36894 { 16192 /* xor */, X86::XOR16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, }, 36895 { 16192 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, }, 36896 { 16192 /* xor */, X86::XOR32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, }, 36897 { 16192 /* xor */, X86::XOR32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, }, 36898 { 16192 /* xor */, X86::XOR64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, }, 36899 { 16192 /* xor */, X86::XOR64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, }, 36900 { 16192 /* xor */, X86::XOR64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, }, 36901 { 16192 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, }, 36902 { 16192 /* xor */, X86::XOR8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, }, 36903 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36904 { 16206 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36905 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, }, 36906 { 16212 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, }, 36907 { 16228 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, AMFBS_None, { }, }, 36908 { 16237 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 36909 { 16244 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 36910 { 16253 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 36911 { 16261 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 36912 { 16271 /* xsave */, X86::XSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 36913 { 16277 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 36914 { 16285 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 36915 { 16292 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 36916 { 16301 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 36917 { 16310 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 36918 { 16321 /* xsaves */, X86::XSAVES, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, }, 36919 { 16328 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, }, 36920 { 16337 /* xsetbv */, X86::XSETBV, Convert_NoOperands, AMFBS_None, { }, }, 36921 { 16344 /* xsha1 */, X86::XSHA1, Convert_NoOperands, AMFBS_None, { }, }, 36922 { 16350 /* xsha256 */, X86::XSHA256, Convert_NoOperands, AMFBS_None, { }, }, 36923 { 16358 /* xstore */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, }, 36924 { 16365 /* xstorerng */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, }, 36925 { 16375 /* xtest */, X86::XTEST, Convert_NoOperands, AMFBS_None, { }, }, 36926}; 36927 36928#include "llvm/Support/Debug.h" 36929#include "llvm/Support/Format.h" 36930 36931unsigned X86AsmParser:: 36932MatchInstructionImpl(const OperandVector &Operands, 36933 MCInst &Inst, 36934 uint64_t &ErrorInfo, 36935 FeatureBitset &MissingFeatures, 36936 bool matchingInlineAsm, unsigned VariantID) { 36937 // Eliminate obvious mismatches. 36938 if (Operands.size() > 10) { 36939 ErrorInfo = 10; 36940 return Match_InvalidOperand; 36941 } 36942 36943 // Get the current feature set. 36944 const FeatureBitset &AvailableFeatures = getAvailableFeatures(); 36945 36946 // Get the instruction mnemonic, which is the first token. 36947 StringRef Mnemonic = ((X86Operand&)*Operands[0]).getToken(); 36948 36949 // Process all MnemonicAliases to remap the mnemonic. 36950 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID); 36951 36952 // Some state to try to produce better error messages. 36953 bool HadMatchOtherThanFeatures = false; 36954 bool HadMatchOtherThanPredicate = false; 36955 unsigned RetCode = Match_InvalidOperand; 36956 MissingFeatures.set(); 36957 // Set ErrorInfo to the operand that mismatches if it is 36958 // wrong for all instances of the instruction. 36959 ErrorInfo = ~0ULL; 36960 // Find the appropriate table for this asm variant. 36961 const MatchEntry *Start, *End; 36962 switch (VariantID) { 36963 default: llvm_unreachable("invalid variant!"); 36964 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; 36965 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break; 36966 } 36967 // Search the table. 36968 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); 36969 36970 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " << 36971 std::distance(MnemonicRange.first, MnemonicRange.second) << 36972 " encodings with mnemonic '" << Mnemonic << "'\n"); 36973 36974 // Return a more specific error code if no mnemonics match. 36975 if (MnemonicRange.first == MnemonicRange.second) 36976 return Match_MnemonicFail; 36977 36978 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; 36979 it != ie; ++it) { 36980 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; 36981 bool HasRequiredFeatures = 36982 (AvailableFeatures & RequiredFeatures) == RequiredFeatures; 36983 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode " 36984 << MII.getName(it->Opcode) << "\n"); 36985 // equal_range guarantees that instruction mnemonic matches. 36986 assert(Mnemonic == it->getMnemonic()); 36987 bool OperandsValid = true; 36988 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 9; ++FormalIdx) { 36989 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); 36990 DEBUG_WITH_TYPE("asm-matcher", 36991 dbgs() << " Matching formal operand class " << getMatchClassName(Formal) 36992 << " against actual operand at index " << ActualIdx); 36993 if (ActualIdx < Operands.size()) 36994 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " ("; 36995 Operands[ActualIdx]->print(dbgs()); dbgs() << "): "); 36996 else 36997 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": "); 36998 if (ActualIdx >= Operands.size()) { 36999 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range "); 37000 OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass); 37001 if (!OperandsValid) ErrorInfo = ActualIdx; 37002 break; 37003 } 37004 MCParsedAsmOperand &Actual = *Operands[ActualIdx]; 37005 unsigned Diag = validateOperandClass(Actual, Formal); 37006 if (Diag == Match_Success) { 37007 DEBUG_WITH_TYPE("asm-matcher", 37008 dbgs() << "match success using generic matcher\n"); 37009 ++ActualIdx; 37010 continue; 37011 } 37012 // If the generic handler indicates an invalid operand 37013 // failure, check for a special case. 37014 if (Diag != Match_Success) { 37015 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); 37016 if (TargetDiag == Match_Success) { 37017 DEBUG_WITH_TYPE("asm-matcher", 37018 dbgs() << "match success using target matcher\n"); 37019 ++ActualIdx; 37020 continue; 37021 } 37022 // If the target matcher returned a specific error code use 37023 // that, else use the one from the generic matcher. 37024 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) 37025 Diag = TargetDiag; 37026 } 37027 // If current formal operand wasn't matched and it is optional 37028 // then try to match next formal operand 37029 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { 37030 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n"); 37031 continue; 37032 } 37033 // If this operand is broken for all of the instances of this 37034 // mnemonic, keep track of it so we can report loc info. 37035 // If we already had a match that only failed due to a 37036 // target predicate, that diagnostic is preferred. 37037 if (!HadMatchOtherThanPredicate && 37038 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { 37039 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) 37040 RetCode = Diag; 37041 ErrorInfo = ActualIdx; 37042 } 37043 // Otherwise, just reject this instance of the mnemonic. 37044 OperandsValid = false; 37045 break; 37046 } 37047 37048 if (!OperandsValid) { 37049 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple " 37050 "operand mismatches, ignoring " 37051 "this opcode\n"); 37052 continue; 37053 } 37054 if (!HasRequiredFeatures) { 37055 HadMatchOtherThanFeatures = true; 37056 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; 37057 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:"; 37058 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) 37059 if (NewMissingFeatures[I]) 37060 dbgs() << ' ' << I; 37061 dbgs() << "\n"); 37062 if (NewMissingFeatures.count() <= 37063 MissingFeatures.count()) 37064 MissingFeatures = NewMissingFeatures; 37065 continue; 37066 } 37067 37068 Inst.clear(); 37069 37070 Inst.setOpcode(it->Opcode); 37071 // We have a potential match but have not rendered the operands. 37072 // Check the target predicate to handle any context sensitive 37073 // constraints. 37074 // For example, Ties that are referenced multiple times must be 37075 // checked here to ensure the input is the same for each match 37076 // constraints. If we leave it any later the ties will have been 37077 // canonicalized 37078 unsigned MatchResult; 37079 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { 37080 Inst.clear(); 37081 DEBUG_WITH_TYPE( 37082 "asm-matcher", 37083 dbgs() << "Early target match predicate failed with diag code " 37084 << MatchResult << "\n"); 37085 RetCode = MatchResult; 37086 HadMatchOtherThanPredicate = true; 37087 continue; 37088 } 37089 37090 if (matchingInlineAsm) { 37091 convertToMapAndConstraints(it->ConvertFn, Operands); 37092 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) 37093 return Match_InvalidTiedOperand; 37094 37095 return Match_Success; 37096 } 37097 37098 // We have selected a definite instruction, convert the parsed 37099 // operands into the appropriate MCInst. 37100 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); 37101 37102 // We have a potential match. Check the target predicate to 37103 // handle any context sensitive constraints. 37104 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { 37105 DEBUG_WITH_TYPE("asm-matcher", 37106 dbgs() << "Target match predicate failed with diag code " 37107 << MatchResult << "\n"); 37108 Inst.clear(); 37109 RetCode = MatchResult; 37110 HadMatchOtherThanPredicate = true; 37111 continue; 37112 } 37113 37114 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) 37115 return Match_InvalidTiedOperand; 37116 37117 DEBUG_WITH_TYPE( 37118 "asm-matcher", 37119 dbgs() << "Opcode result: complete match, selecting this opcode\n"); 37120 return Match_Success; 37121 } 37122 37123 // Okay, we had no match. Try to return a useful error code. 37124 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) 37125 return RetCode; 37126 37127 ErrorInfo = 0; 37128 return Match_MissingFeature; 37129} 37130 37131#endif // GET_MATCHER_IMPLEMENTATION 37132 37133 37134#ifdef GET_MNEMONIC_SPELL_CHECKER 37135#undef GET_MNEMONIC_SPELL_CHECKER 37136 37137static std::string X86MnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { 37138 const unsigned MaxEditDist = 2; 37139 std::vector<StringRef> Candidates; 37140 StringRef Prev = ""; 37141 37142 // Find the appropriate table for this asm variant. 37143 const MatchEntry *Start, *End; 37144 switch (VariantID) { 37145 default: llvm_unreachable("invalid variant!"); 37146 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; 37147 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break; 37148 } 37149 37150 for (auto I = Start; I < End; I++) { 37151 // Ignore unsupported instructions. 37152 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; 37153 if ((FBS & RequiredFeatures) != RequiredFeatures) 37154 continue; 37155 37156 StringRef T = I->getMnemonic(); 37157 // Avoid recomputing the edit distance for the same string. 37158 if (T.equals(Prev)) 37159 continue; 37160 37161 Prev = T; 37162 unsigned Dist = S.edit_distance(T, false, MaxEditDist); 37163 if (Dist <= MaxEditDist) 37164 Candidates.push_back(T); 37165 } 37166 37167 if (Candidates.empty()) 37168 return ""; 37169 37170 std::string Res = ", did you mean: "; 37171 unsigned i = 0; 37172 for( ; i < Candidates.size() - 1; i++) 37173 Res += Candidates[i].str() + ", "; 37174 return Res + Candidates[i].str() + "?"; 37175} 37176 37177#endif // GET_MNEMONIC_SPELL_CHECKER 37178 37179