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1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 /* AXI to M-Bridge decoding unit driver for Marvell Armada 8K and 8K+ SoCs */
9 
10 #include <common/debug.h>
11 #include <lib/mmio.h>
12 
13 #include <armada_common.h>
14 #include <mvebu.h>
15 #include <mvebu_def.h>
16 
17 #if LOG_LEVEL >= LOG_LEVEL_INFO
18 #define DEBUG_ADDR_MAP
19 #endif
20 
21 /* common defines */
22 #define WIN_ENABLE_BIT			(0x1)
23 
24 #define MVEBU_AMB_ADEC_OFFSET		(0x70ff00)
25 
26 #define AMB_WIN_CR_OFFSET(win)		(amb_base + 0x0 + (0x8 * win))
27 #define AMB_ATTR_OFFSET			8
28 #define AMB_ATTR_MASK			0xFF
29 #define AMB_SIZE_OFFSET			16
30 #define AMB_SIZE_MASK			0xFF
31 
32 #define AMB_WIN_BASE_OFFSET(win)	(amb_base + 0x4 + (0x8 * win))
33 #define AMB_BASE_OFFSET			16
34 #define AMB_BASE_ADDR_MASK		((1 << (32 - AMB_BASE_OFFSET)) - 1)
35 
36 #define AMB_WIN_ALIGNMENT_64K		(0x10000)
37 #define AMB_WIN_ALIGNMENT_1M		(0x100000)
38 
39 uintptr_t amb_base;
40 
amb_check_win(struct addr_map_win * win,uint32_t win_num)41 static void amb_check_win(struct addr_map_win *win, uint32_t win_num)
42 {
43 	uint32_t base_addr;
44 
45 	/* make sure the base address is in 16-bit range */
46 	if (win->base_addr > AMB_BASE_ADDR_MASK) {
47 		WARN("Window %d: base address is too big 0x%llx\n",
48 		       win_num, win->base_addr);
49 		win->base_addr = AMB_BASE_ADDR_MASK;
50 		WARN("Set the base address to 0x%llx\n", win->base_addr);
51 	}
52 
53 	base_addr  = win->base_addr << AMB_BASE_OFFSET;
54 	/* for AMB The base is always 1M aligned */
55 	/* check if address is aligned to 1M */
56 	if (IS_NOT_ALIGN(base_addr, AMB_WIN_ALIGNMENT_1M)) {
57 		win->base_addr = ALIGN_UP(base_addr, AMB_WIN_ALIGNMENT_1M);
58 		WARN("Window %d: base address unaligned to 0x%x\n",
59 		       win_num, AMB_WIN_ALIGNMENT_1M);
60 		WARN("Align up the base address to 0x%llx\n", win->base_addr);
61 	}
62 
63 	/* size parameter validity check */
64 	if (!IS_POWER_OF_2(win->win_size)) {
65 		WARN("Window %d: window size is not power of 2 (0x%llx)\n",
66 		       win_num, win->win_size);
67 		win->win_size = ROUND_UP_TO_POW_OF_2(win->win_size);
68 		WARN("Rounding size to 0x%llx\n", win->win_size);
69 	}
70 }
71 
amb_enable_win(struct addr_map_win * win,uint32_t win_num)72 static void amb_enable_win(struct addr_map_win *win, uint32_t win_num)
73 {
74 	uint32_t ctrl, base, size;
75 
76 	/*
77 	 * size is 64KB granularity.
78 	 * The number of ones specifies the size of the
79 	 * window in 64 KB granularity. 0 is 64KB
80 	 */
81 	size = (win->win_size / AMB_WIN_ALIGNMENT_64K) - 1;
82 	ctrl = (size << AMB_SIZE_OFFSET) | (win->target_id << AMB_ATTR_OFFSET);
83 	base = win->base_addr << AMB_BASE_OFFSET;
84 
85 	mmio_write_32(AMB_WIN_BASE_OFFSET(win_num), base);
86 	mmio_write_32(AMB_WIN_CR_OFFSET(win_num), ctrl);
87 
88 	/* enable window after configuring window size (and attributes) */
89 	ctrl |= WIN_ENABLE_BIT;
90 	mmio_write_32(AMB_WIN_CR_OFFSET(win_num), ctrl);
91 }
92 
93 #ifdef DEBUG_ADDR_MAP
dump_amb_adec(void)94 static void dump_amb_adec(void)
95 {
96 	uint32_t ctrl, base, win_id, attr;
97 	uint32_t size, size_count;
98 
99 	/* Dump all AMB windows */
100 	printf("bank  attribute     base          size\n");
101 	printf("--------------------------------------------\n");
102 	for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
103 		ctrl = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
104 		if (ctrl & WIN_ENABLE_BIT) {
105 			base = mmio_read_32(AMB_WIN_BASE_OFFSET(win_id));
106 			attr = (ctrl >> AMB_ATTR_OFFSET) & AMB_ATTR_MASK;
107 			size_count = (ctrl >> AMB_SIZE_OFFSET) & AMB_SIZE_MASK;
108 			size = (size_count + 1) * AMB_WIN_ALIGNMENT_64K;
109 			printf("amb   0x%04x        0x%08x    0x%08x\n",
110 			       attr, base, size);
111 		}
112 	}
113 }
114 #endif
115 
init_amb_adec(uintptr_t base)116 int init_amb_adec(uintptr_t base)
117 {
118 	struct addr_map_win *win;
119 	uint32_t win_id, win_reg;
120 	uint32_t win_count;
121 
122 	INFO("Initializing AXI to MBus Bridge Address decoding\n");
123 
124 	/* Get the base address of the AMB address decoding */
125 	amb_base = base + MVEBU_AMB_ADEC_OFFSET;
126 
127 	/* Get the array of the windows and its size */
128 	marvell_get_amb_memory_map(&win, &win_count, base);
129 	if (win_count <= 0)
130 		INFO("no windows configurations found\n");
131 
132 	if (win_count > AMB_MAX_WIN_ID) {
133 		INFO("number of windows is bigger than %d\n", AMB_MAX_WIN_ID);
134 		return 0;
135 	}
136 
137 	/* disable all AMB windows */
138 	for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
139 		win_reg = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
140 		win_reg &= ~WIN_ENABLE_BIT;
141 		mmio_write_32(AMB_WIN_CR_OFFSET(win_id), win_reg);
142 	}
143 
144 	/* enable relevant windows */
145 	for (win_id = 0; win_id < win_count; win_id++, win++) {
146 		amb_check_win(win, win_id);
147 		amb_enable_win(win, win_id);
148 	}
149 
150 #ifdef DEBUG_ADDR_MAP
151 	dump_amb_adec();
152 #endif
153 
154 	INFO("Done AXI to MBus Bridge Address decoding Initializing\n");
155 
156 	return 0;
157 }
158