1 /* 2 * Copyright © 2013 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 /** 25 * \file brw_vec4_tcs.h 26 * 27 * The vec4-mode tessellation control shader compiler backend. 28 */ 29 30 #ifndef BRW_VEC4_TCS_H 31 #define BRW_VEC4_TCS_H 32 33 #include "brw_compiler.h" 34 #include "brw_vec4.h" 35 36 #ifdef __cplusplus 37 namespace brw { 38 39 class vec4_tcs_visitor : public vec4_visitor 40 { 41 public: 42 vec4_tcs_visitor(const struct brw_compiler *compiler, 43 void *log_data, 44 const struct brw_tcs_prog_key *key, 45 struct brw_tcs_prog_data *prog_data, 46 const nir_shader *nir, 47 void *mem_ctx, 48 int shader_time_index, 49 const struct brw_vue_map *input_vue_map); 50 51 protected: 52 virtual void setup_payload(); 53 virtual void emit_prolog(); 54 virtual void emit_thread_end(); 55 56 virtual void nir_emit_intrinsic(nir_intrinsic_instr *instr); 57 58 void emit_input_urb_read(const dst_reg &dst, 59 const src_reg &vertex_index, 60 unsigned base_offset, 61 unsigned first_component, 62 const src_reg &indirect_offset); 63 void emit_output_urb_read(const dst_reg &dst, 64 unsigned base_offset, 65 unsigned first_component, 66 const src_reg &indirect_offset); 67 68 void emit_urb_write(const src_reg &value, unsigned writemask, 69 unsigned base_offset, const src_reg &indirect_offset); 70 71 /* we do not use the normal end-of-shader URB write mechanism -- but every 72 * vec4 stage must provide implementations of these: 73 */ emit_urb_write_header(int)74 virtual void emit_urb_write_header(int /* mrf */) {} emit_urb_write_opcode(bool)75 virtual vec4_instruction *emit_urb_write_opcode(bool /* complete */) { return NULL; } 76 77 const struct brw_vue_map *input_vue_map; 78 79 const struct brw_tcs_prog_key *key; 80 src_reg invocation_id; 81 }; 82 83 } /* namespace brw */ 84 #endif /* __cplusplus */ 85 86 #endif /* BRW_VEC4_TCS_H */ 87