1 // Copyright 2017 Google LLC 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #ifndef CPU_FEATURES_INCLUDE_CPUINFO_ARM_H_ 16 #define CPU_FEATURES_INCLUDE_CPUINFO_ARM_H_ 17 18 #include <stdint.h> // uint32_t 19 20 #include "cpu_features_cache_info.h" 21 #include "cpu_features_macros.h" 22 23 CPU_FEATURES_START_CPP_NAMESPACE 24 25 typedef struct { 26 int swp : 1; // SWP instruction (atomic read-modify-write) 27 int half : 1; // Half-word loads and stores 28 int thumb : 1; // Thumb (16-bit instruction set) 29 int _26bit : 1; // "26 Bit" Model (Processor status register folded into 30 // program counter) 31 int fastmult : 1; // 32x32->64-bit multiplication 32 int fpa : 1; // Floating point accelerator 33 int vfp : 1; // Vector Floating Point. 34 int edsp : 1; // DSP extensions (the 'e' variant of the ARM9 CPUs, and all 35 // others above) 36 int java : 1; // Jazelle (Java bytecode accelerator) 37 int iwmmxt : 1; // Intel Wireless MMX Technology. 38 int crunch : 1; // MaverickCrunch coprocessor 39 int thumbee : 1; // ThumbEE 40 int neon : 1; // Advanced SIMD. 41 int vfpv3 : 1; // VFP version 3 42 int vfpv3d16 : 1; // VFP version 3 with 16 D-registers 43 int tls : 1; // TLS register 44 int vfpv4 : 1; // VFP version 4 with fast context switching 45 int idiva : 1; // SDIV and UDIV hardware division in ARM mode. 46 int idivt : 1; // SDIV and UDIV hardware division in Thumb mode. 47 int vfpd32 : 1; // VFP with 32 D-registers 48 int lpae : 1; // Large Physical Address Extension (>4GB physical memory on 49 // 32-bit architecture) 50 int evtstrm : 1; // kernel event stream using generic architected timer 51 int aes : 1; // Hardware-accelerated Advanced Encryption Standard. 52 int pmull : 1; // Polynomial multiply long. 53 int sha1 : 1; // Hardware-accelerated SHA1. 54 int sha2 : 1; // Hardware-accelerated SHA2-256. 55 int crc32 : 1; // Hardware-accelerated CRC-32. 56 57 // Make sure to update ArmFeaturesEnum below if you add a field here. 58 } ArmFeatures; 59 60 typedef struct { 61 ArmFeatures features; 62 int implementer; 63 int architecture; 64 int variant; 65 int part; 66 int revision; 67 } ArmInfo; 68 69 // TODO(user): Add macros to know which features are present at compile 70 // time. 71 72 ArmInfo GetArmInfo(void); 73 74 // Compute CpuId from ArmInfo. 75 uint32_t GetArmCpuId(const ArmInfo* const info); 76 77 //////////////////////////////////////////////////////////////////////////////// 78 // Introspection functions 79 80 typedef enum { 81 ARM_SWP, 82 ARM_HALF, 83 ARM_THUMB, 84 ARM_26BIT, 85 ARM_FASTMULT, 86 ARM_FPA, 87 ARM_VFP, 88 ARM_EDSP, 89 ARM_JAVA, 90 ARM_IWMMXT, 91 ARM_CRUNCH, 92 ARM_THUMBEE, 93 ARM_NEON, 94 ARM_VFPV3, 95 ARM_VFPV3D16, 96 ARM_TLS, 97 ARM_VFPV4, 98 ARM_IDIVA, 99 ARM_IDIVT, 100 ARM_VFPD32, 101 ARM_LPAE, 102 ARM_EVTSTRM, 103 ARM_AES, 104 ARM_PMULL, 105 ARM_SHA1, 106 ARM_SHA2, 107 ARM_CRC32, 108 ARM_LAST_, 109 } ArmFeaturesEnum; 110 111 int GetArmFeaturesEnumValue(const ArmFeatures* features, ArmFeaturesEnum value); 112 113 const char* GetArmFeaturesEnumName(ArmFeaturesEnum); 114 115 CPU_FEATURES_END_CPP_NAMESPACE 116 117 #if !defined(CPU_FEATURES_ARCH_ARM) 118 #error "Including cpuinfo_arm.h from a non-arm target." 119 #endif 120 121 #endif // CPU_FEATURES_INCLUDE_CPUINFO_ARM_H_ 122