1 /*
2 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef TZC400_H
8 #define TZC400_H
9
10 #include <drivers/arm/tzc_common.h>
11 #include <lib/utils_def.h>
12
13 #define BUILD_CONFIG_OFF U(0x000)
14 #define GATE_KEEPER_OFF U(0x008)
15 #define SPECULATION_CTRL_OFF U(0x00c)
16 #define INT_STATUS U(0x010)
17 #define INT_CLEAR U(0x014)
18
19 #define FAIL_ADDRESS_LOW_OFF U(0x020)
20 #define FAIL_ADDRESS_HIGH_OFF U(0x024)
21 #define FAIL_CONTROL_OFF U(0x028)
22 #define FAIL_ID U(0x02c)
23
24 /* ID registers not common across different varieties of TZC */
25 #define PID5 U(0xFD4)
26 #define PID6 U(0xFD8)
27 #define PID7 U(0xFDC)
28
29 #define BUILD_CONFIG_NF_SHIFT 24
30 #define BUILD_CONFIG_NF_MASK U(0x3)
31 #define BUILD_CONFIG_AW_SHIFT 8
32 #define BUILD_CONFIG_AW_MASK U(0x3f)
33 #define BUILD_CONFIG_NR_SHIFT 0
34 #define BUILD_CONFIG_NR_MASK U(0x1f)
35
36 /*
37 * Number of gate keepers is implementation defined. But we know the max for
38 * this device is 4. Get implementation details from BUILD_CONFIG.
39 */
40 #define GATE_KEEPER_OS_SHIFT 16
41 #define GATE_KEEPER_OS_MASK U(0xf)
42 #define GATE_KEEPER_OR_SHIFT 0
43 #define GATE_KEEPER_OR_MASK U(0xf)
44 #define GATE_KEEPER_FILTER_MASK U(0x1)
45
46 /* Speculation is enabled by default. */
47 #define SPECULATION_CTRL_WRITE_DISABLE BIT_32(1)
48 #define SPECULATION_CTRL_READ_DISABLE BIT_32(0)
49
50 /* Max number of filters allowed is 4. */
51 #define INT_STATUS_OVERLAP_SHIFT 16
52 #define INT_STATUS_OVERLAP_MASK U(0xf)
53 #define INT_STATUS_OVERRUN_SHIFT 8
54 #define INT_STATUS_OVERRUN_MASK U(0xf)
55 #define INT_STATUS_STATUS_SHIFT 0
56 #define INT_STATUS_STATUS_MASK U(0xf)
57
58 #define INT_CLEAR_CLEAR_SHIFT 0
59 #define INT_CLEAR_CLEAR_MASK U(0xf)
60
61 #define FAIL_CONTROL_DIR_SHIFT 24
62 #define FAIL_CONTROL_DIR_READ U(0)
63 #define FAIL_CONTROL_DIR_WRITE U(1)
64 #define FAIL_CONTROL_NS_SHIFT 21
65 #define FAIL_CONTROL_NS_SECURE U(0)
66 #define FAIL_CONTROL_NS_NONSECURE U(1)
67 #define FAIL_CONTROL_PRIV_SHIFT 20
68 #define FAIL_CONTROL_PRIV_PRIV U(0)
69 #define FAIL_CONTROL_PRIV_UNPRIV U(1)
70
71 /*
72 * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.
73 * Platform should provide the value on initialisation.
74 */
75 #define FAIL_ID_VNET_SHIFT 24
76 #define FAIL_ID_VNET_MASK U(0xf)
77 #define FAIL_ID_ID_SHIFT 0
78
79 #define TZC_400_PERIPHERAL_ID U(0x460)
80
81 /* Filter enable bits in a TZC */
82 #define TZC_400_REGION_ATTR_F_EN_MASK U(0xf)
83 #define TZC_400_REGION_ATTR_FILTER_BIT(x) \
84 ((U(1) << (x)) << TZC_REGION_ATTR_F_EN_SHIFT)
85 #define TZC_400_REGION_ATTR_FILTER_BIT_ALL \
86 (TZC_400_REGION_ATTR_F_EN_MASK << \
87 TZC_REGION_ATTR_F_EN_SHIFT)
88
89 /*
90 * All TZC region configuration registers are placed one after another. It
91 * depicts size of block of registers for programming each region.
92 */
93 #define TZC_400_REGION_SIZE U(0x20)
94 #define TZC_400_ACTION_OFF U(0x4)
95
96 #ifndef __ASSEMBLER__
97
98 #include <cdefs.h>
99 #include <stdint.h>
100
101 /*******************************************************************************
102 * Function & variable prototypes
103 ******************************************************************************/
104 void tzc400_init(uintptr_t base);
105 void tzc400_configure_region0(unsigned int sec_attr,
106 unsigned int ns_device_access);
107 void tzc400_configure_region(unsigned int filters,
108 unsigned int region,
109 unsigned long long region_base,
110 unsigned long long region_top,
111 unsigned int sec_attr,
112 unsigned int nsaid_permissions);
113 void tzc400_set_action(unsigned int action);
114 void tzc400_enable_filters(void);
115 void tzc400_disable_filters(void);
116
tzc_init(uintptr_t base)117 static inline void tzc_init(uintptr_t base)
118 {
119 tzc400_init(base);
120 }
121
tzc_configure_region0(unsigned int sec_attr,unsigned int ns_device_access)122 static inline void tzc_configure_region0(
123 unsigned int sec_attr,
124 unsigned int ns_device_access)
125 {
126 tzc400_configure_region0(sec_attr, ns_device_access);
127 }
128
tzc_configure_region(unsigned int filters,unsigned int region,unsigned long long region_base,unsigned long long region_top,unsigned int sec_attr,unsigned int ns_device_access)129 static inline void tzc_configure_region(
130 unsigned int filters,
131 unsigned int region,
132 unsigned long long region_base,
133 unsigned long long region_top,
134 unsigned int sec_attr,
135 unsigned int ns_device_access)
136 {
137 tzc400_configure_region(filters, region, region_base,
138 region_top, sec_attr, ns_device_access);
139 }
140
tzc_set_action(unsigned int action)141 static inline void tzc_set_action(unsigned int action)
142 {
143 tzc400_set_action(action);
144 }
145
146
tzc_enable_filters(void)147 static inline void tzc_enable_filters(void)
148 {
149 tzc400_enable_filters();
150 }
151
tzc_disable_filters(void)152 static inline void tzc_disable_filters(void)
153 {
154 tzc400_disable_filters();
155 }
156
157 #endif /* __ASSEMBLER__ */
158
159 #endif /* TZC400_H */
160