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1 /*
2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Rob Clark <robclark@freedesktop.org>
25  */
26 
27 #ifndef FD5_DRAW_H_
28 #define FD5_DRAW_H_
29 
30 #include "pipe/p_context.h"
31 
32 #include "freedreno_draw.h"
33 
34 #include "fd5_context.h"
35 #include "fd5_screen.h"
36 
37 /* some bits in common w/ a4xx: */
38 #include "a4xx/fd4_draw.h"
39 
40 void fd5_draw_init(struct pipe_context *pctx);
41 
42 static inline void
fd5_draw(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,enum pc_di_src_sel src_sel,uint32_t count,uint32_t instances,enum a4xx_index_size idx_type,uint32_t max_indices,uint32_t idx_offset,struct pipe_resource * idx_buffer)43 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
44 		enum pc_di_primtype primtype,
45 		enum pc_di_vis_cull_mode vismode,
46 		enum pc_di_src_sel src_sel, uint32_t count,
47 		uint32_t instances, enum a4xx_index_size idx_type,
48 		uint32_t max_indices, uint32_t idx_offset,
49 		struct pipe_resource *idx_buffer)
50 {
51 	/* for debug after a lock up, write a unique counter value
52 	 * to scratch7 for each draw, to make it easier to match up
53 	 * register dumps to cmdstream.  The combination of IB
54 	 * (scratch6) and DRAW is enough to "triangulate" the
55 	 * particular draw that caused lockup.
56 	 */
57 	emit_marker5(ring, 7);
58 
59 	OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
60 	if (vismode == USE_VISIBILITY) {
61 		/* leave vis mode blank for now, it will be patched up when
62 		 * we know if we are binning or not
63 		 */
64 		OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
65 				&batch->draw_patches);
66 	} else {
67 		OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
68 	}
69 	OUT_RING(ring, instances);         /* NumInstances */
70 	OUT_RING(ring, count);             /* NumIndices */
71 	if (idx_buffer) {
72 		OUT_RING(ring, 0x0);           /* XXX */
73 		OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
74 		OUT_RING (ring, max_indices);
75 	}
76 
77 	emit_marker5(ring, 7);
78 
79 	fd_reset_wfi(batch);
80 }
81 
82 static inline void
fd5_draw_emit(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,const struct pipe_draw_info * info,unsigned index_offset)83 fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
84 		enum pc_di_primtype primtype,
85 		enum pc_di_vis_cull_mode vismode,
86 		const struct pipe_draw_info *info,
87 		unsigned index_offset)
88 {
89 	struct pipe_resource *idx_buffer = NULL;
90 	enum a4xx_index_size idx_type;
91 	enum pc_di_src_sel src_sel;
92 	uint32_t max_indices, idx_offset;
93 
94 	if (info->indirect) {
95 		struct fd_resource *ind = fd_resource(info->indirect->buffer);
96 
97 		emit_marker5(ring, 7);
98 
99 		if (info->index_size) {
100 			struct pipe_resource *idx = info->index.resource;
101 			max_indices = idx->width0 / info->index_size;
102 
103 			OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
104 			OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
105 					fd4_size2indextype(info->index_size), 0),
106 					&batch->draw_patches);
107 			OUT_RELOC(ring, fd_resource(idx)->bo,
108 					index_offset, 0, 0);
109 			OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indices));
110 			OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
111 		} else {
112 			OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
113 			OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
114 					&batch->draw_patches);
115 			OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
116 		}
117 
118 		emit_marker5(ring, 7);
119 		fd_reset_wfi(batch);
120 
121 		return;
122 	}
123 
124 	if (info->index_size) {
125 		assert(!info->has_user_indices);
126 
127 		idx_buffer = info->index.resource;
128 		idx_type = fd4_size2indextype(info->index_size);
129 		max_indices = idx_buffer->width0 / info->index_size;
130 		idx_offset = index_offset + info->start * info->index_size;
131 		src_sel = DI_SRC_SEL_DMA;
132 	} else {
133 		idx_buffer = NULL;
134 		idx_type = INDEX4_SIZE_32_BIT;
135 		max_indices = 0;
136 		idx_offset = 0;
137 		src_sel = DI_SRC_SEL_AUTO_INDEX;
138 	}
139 
140 	fd5_draw(batch, ring, primtype, vismode, src_sel,
141 			info->count, info->instance_count,
142 			idx_type, max_indices, idx_offset, idx_buffer);
143 }
144 
145 #endif /* FD5_DRAW_H_ */
146