1 //===- ROCDLDialect.cpp - ROCDL IR Ops and Dialect registration -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the types and operation details for the ROCDL IR dialect in
10 // MLIR, and the LLVM IR dialect. It also registers the dialect.
11 //
12 // The ROCDL dialect only contains GPU specific additions on top of the general
13 // LLVM dialect.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
18
19 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
20 #include "mlir/IR/Builders.h"
21 #include "mlir/IR/BuiltinTypes.h"
22 #include "mlir/IR/MLIRContext.h"
23 #include "mlir/IR/Operation.h"
24 #include "llvm/AsmParser/Parser.h"
25 #include "llvm/IR/Attributes.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/IR/Type.h"
28 #include "llvm/Support/SourceMgr.h"
29
30 using namespace mlir;
31 using namespace ROCDL;
32
33 //===----------------------------------------------------------------------===//
34 // Parsing for ROCDL ops
35 //===----------------------------------------------------------------------===//
36
37 // <operation> ::=
38 // `llvm.amdgcn.buffer.load.* %rsrc, %vindex, %offset, %glc, %slc :
39 // result_type`
parseROCDLMubufLoadOp(OpAsmParser & parser,OperationState & result)40 static ParseResult parseROCDLMubufLoadOp(OpAsmParser &parser,
41 OperationState &result) {
42 SmallVector<OpAsmParser::OperandType, 8> ops;
43 Type type;
44 if (parser.parseOperandList(ops, 5) || parser.parseColonType(type) ||
45 parser.addTypeToList(type, result.types))
46 return failure();
47
48 MLIRContext *context = parser.getBuilder().getContext();
49 auto int32Ty = LLVM::LLVMType::getInt32Ty(context);
50 auto int1Ty = LLVM::LLVMType::getInt1Ty(context);
51 auto i32x4Ty = LLVM::LLVMType::getVectorTy(int32Ty, 4);
52 return parser.resolveOperands(ops,
53 {i32x4Ty, int32Ty, int32Ty, int1Ty, int1Ty},
54 parser.getNameLoc(), result.operands);
55 }
56
57 // <operation> ::=
58 // `llvm.amdgcn.buffer.store.* %vdata, %rsrc, %vindex, %offset, %glc, %slc :
59 // result_type`
parseROCDLMubufStoreOp(OpAsmParser & parser,OperationState & result)60 static ParseResult parseROCDLMubufStoreOp(OpAsmParser &parser,
61 OperationState &result) {
62 SmallVector<OpAsmParser::OperandType, 8> ops;
63 Type type;
64 if (parser.parseOperandList(ops, 6) || parser.parseColonType(type))
65 return failure();
66
67 MLIRContext *context = parser.getBuilder().getContext();
68 auto int32Ty = LLVM::LLVMType::getInt32Ty(context);
69 auto int1Ty = LLVM::LLVMType::getInt1Ty(context);
70 auto i32x4Ty = LLVM::LLVMType::getVectorTy(int32Ty, 4);
71
72 if (parser.resolveOperands(ops,
73 {type, i32x4Ty, int32Ty, int32Ty, int1Ty, int1Ty},
74 parser.getNameLoc(), result.operands))
75 return failure();
76 return success();
77 }
78
79 //===----------------------------------------------------------------------===//
80 // ROCDLDialect initialization, type parsing, and registration.
81 //===----------------------------------------------------------------------===//
82
83 // TODO: This should be the llvm.rocdl dialect once this is supported.
initialize()84 void ROCDLDialect::initialize() {
85 addOperations<
86 #define GET_OP_LIST
87 #include "mlir/Dialect/LLVMIR/ROCDLOps.cpp.inc"
88 >();
89
90 // Support unknown operations because not all ROCDL operations are registered.
91 allowUnknownOperations();
92 }
93
94 #define GET_OP_CLASSES
95 #include "mlir/Dialect/LLVMIR/ROCDLOps.cpp.inc"
96