1; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope %s 2 3declare i32 @llvm.amdgcn.readfirstlane(i32) #0 4 5; CHECK-LABEL: {{^}}test_readfirstlane: 6; CHECK: v_readfirstlane_b32 s{{[0-9]+}}, v2 7define void @test_readfirstlane(i32 addrspace(1)* %out, i32 %src) #1 { 8 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %src) 9 store i32 %readfirstlane, i32 addrspace(1)* %out, align 4 10 ret void 11} 12 13; CHECK-LABEL: {{^}}test_readfirstlane_imm: 14; CHECK: s_mov_b32 [[SGPR_VAL:s[0-9]]], 32 15; CHECK-NOT: [[SGPR_VAL]] 16; CHECK: ; use [[SGPR_VAL]] 17define amdgpu_kernel void @test_readfirstlane_imm(i32 addrspace(1)* %out) #1 { 18 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 32) 19 call void asm sideeffect "; use $0", "s"(i32 %readfirstlane) 20 ret void 21} 22 23; CHECK-LABEL: {{^}}test_readfirstlane_imm_fold: 24; CHECK: v_mov_b32_e32 [[VVAL:v[0-9]]], 32 25; CHECK-NOT: [[VVAL]] 26; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[VVAL]] 27define amdgpu_kernel void @test_readfirstlane_imm_fold(i32 addrspace(1)* %out) #1 { 28 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 32) 29 store i32 %readfirstlane, i32 addrspace(1)* %out, align 4 30 ret void 31} 32 33; CHECK-LABEL: {{^}}test_readfirstlane_m0: 34; CHECK: s_mov_b32 m0, -1 35; CHECK: v_mov_b32_e32 [[VVAL:v[0-9]]], m0 36; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[VVAL]] 37define amdgpu_kernel void @test_readfirstlane_m0(i32 addrspace(1)* %out) #1 { 38 %m0 = call i32 asm "s_mov_b32 m0, -1", "={m0}"() 39 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %m0) 40 store i32 %readfirstlane, i32 addrspace(1)* %out, align 4 41 ret void 42} 43 44; CHECK-LABEL: {{^}}test_readfirstlane_copy_from_sgpr: 45; CHECK: ;;#ASMSTART 46; CHECK-NEXT: s_mov_b32 [[SGPR:s[0-9]+]] 47; CHECK: ;;#ASMEND 48; CHECK-NOT: [[SGPR]] 49; CHECK-NOT: readfirstlane 50; CHECK: v_mov_b32_e32 [[VCOPY:v[0-9]+]], [[SGPR]] 51; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[VCOPY]] 52define amdgpu_kernel void @test_readfirstlane_copy_from_sgpr(i32 addrspace(1)* %out) #1 { 53 %sgpr = call i32 asm "s_mov_b32 $0, 0", "=s"() 54 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %sgpr) 55 store i32 %readfirstlane, i32 addrspace(1)* %out, align 4 56 ret void 57} 58 59; Make sure this doesn't crash. 60; CHECK-LABEL: {{^}}test_readfirstlane_fi: 61; CHECK: s_mov_b32 [[FIVAL:s[0-9]]], 4 62define amdgpu_kernel void @test_readfirstlane_fi(i32 addrspace(1)* %out) #1 { 63 %alloca = alloca i32, addrspace(5) 64 %int = ptrtoint i32 addrspace(5)* %alloca to i32 65 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %int) 66 call void asm sideeffect "; use $0", "s"(i32 %readfirstlane) 67 ret void 68} 69 70attributes #0 = { nounwind readnone convergent } 71attributes #1 = { nounwind } 72