1 /* 2 * Copyright (C) 2021 Marek Behun <marek.behun@nic.cz> 3 * 4 * Based on plat/marvell/armada/common/marvell_cci.c 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 * https://spdx.org/licenses 8 */ 9 10 #include <drivers/arm/cci.h> 11 #include <lib/mmio.h> 12 13 #include <plat_marvell.h> 14 15 static const int cci_map[] = { 16 PLAT_MARVELL_CCI_CLUSTER0_SL_IFACE_IX, 17 PLAT_MARVELL_CCI_CLUSTER1_SL_IFACE_IX 18 }; 19 20 /* 21 * This redefines the weak definition in 22 * plat/marvell/armada/common/marvell_cci.c 23 */ plat_marvell_interconnect_init(void)24void plat_marvell_interconnect_init(void) 25 { 26 /* 27 * To better utilize the address space, we remap CCI base address from 28 * the default (0xD8000000) to MVEBU_CCI_BASE. 29 * This has to be done here, rather than in cpu_wins_init(), because 30 * cpu_wins_init() is called later. 31 */ 32 mmio_write_32(CPU_DEC_CCI_BASE_REG, MVEBU_CCI_BASE >> 20); 33 34 cci_init(PLAT_MARVELL_CCI_BASE, cci_map, ARRAY_SIZE(cci_map)); 35 } 36