1 /* Copyright 2019 The TensorFlow Authors. All Rights Reserved.
2
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6
7 http://www.apache.org/licenses/LICENSE-2.0
8
9 Unless required by applicable law or agreed to in writing, software
10 distributed under the License is distributed on an "AS IS" BASIS,
11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 See the License for the specific language governing permissions and
13 limitations under the License.
14 ==============================================================================*/
15 #ifndef TENSORFLOW_LITE_KERNELS_INTERNAL_REFERENCE_INTEGER_OPS_CONV_H_
16 #define TENSORFLOW_LITE_KERNELS_INTERNAL_REFERENCE_INTEGER_OPS_CONV_H_
17
18 #include "tensorflow/lite/kernels/internal/common.h"
19
20 namespace tflite {
21 namespace reference_integer_ops {
22
23 // Fixed-point per-channel-quantization convolution reference kernel.
ConvPerChannel(const ConvParams & params,const int32_t * output_multiplier,const int32_t * output_shift,const RuntimeShape & input_shape,const int8_t * input_data,const RuntimeShape & filter_shape,const int8_t * filter_data,const RuntimeShape & bias_shape,const int32_t * bias_data,const RuntimeShape & output_shape,int8_t * output_data)24 inline void ConvPerChannel(
25 const ConvParams& params, const int32_t* output_multiplier,
26 const int32_t* output_shift, const RuntimeShape& input_shape,
27 const int8_t* input_data, const RuntimeShape& filter_shape,
28 const int8_t* filter_data, const RuntimeShape& bias_shape,
29 const int32_t* bias_data, const RuntimeShape& output_shape,
30 int8_t* output_data) {
31 // Get parameters.
32 const int32_t input_offset = params.input_offset; // r = s(q - Z)
33 const int stride_width = params.stride_width;
34 const int stride_height = params.stride_height;
35 const int dilation_width_factor = params.dilation_width_factor;
36 const int dilation_height_factor = params.dilation_height_factor;
37 const int pad_width = params.padding_values.width;
38 const int pad_height = params.padding_values.height;
39 const int32_t output_offset = params.output_offset;
40
41 // Set min and max value of the output.
42 const int32_t output_activation_min = params.quantized_activation_min;
43 const int32_t output_activation_max = params.quantized_activation_max;
44
45 // Consistency check.
46 TFLITE_DCHECK_LE(output_activation_min, output_activation_max);
47 TFLITE_DCHECK_EQ(input_shape.DimensionsCount(), 4);
48 TFLITE_DCHECK_EQ(filter_shape.DimensionsCount(), 4);
49 TFLITE_DCHECK_EQ(output_shape.DimensionsCount(), 4);
50 const int batches = MatchingDim(input_shape, 0, output_shape, 0);
51 const int input_depth = MatchingDim(input_shape, 3, filter_shape, 3);
52 const int output_depth = MatchingDim(filter_shape, 0, output_shape, 3);
53 if (bias_data) {
54 TFLITE_DCHECK_EQ(bias_shape.FlatSize(), output_depth);
55 }
56
57 // Check dimensions of the tensors.
58 const int input_height = input_shape.Dims(1);
59 const int input_width = input_shape.Dims(2);
60 const int filter_height = filter_shape.Dims(1);
61 const int filter_width = filter_shape.Dims(2);
62 const int output_height = output_shape.Dims(1);
63 const int output_width = output_shape.Dims(2);
64 for (int batch = 0; batch < batches; ++batch) {
65 for (int out_y = 0; out_y < output_height; ++out_y) {
66 const int in_y_origin = (out_y * stride_height) - pad_height;
67 for (int out_x = 0; out_x < output_width; ++out_x) {
68 const int in_x_origin = (out_x * stride_width) - pad_width;
69 for (int out_channel = 0; out_channel < output_depth; ++out_channel) {
70 int32_t acc = 0;
71 for (int filter_y = 0; filter_y < filter_height; ++filter_y) {
72 const int in_y = in_y_origin + dilation_height_factor * filter_y;
73 for (int filter_x = 0; filter_x < filter_width; ++filter_x) {
74 const int in_x = in_x_origin + dilation_width_factor * filter_x;
75
76 // Zero padding by omitting the areas outside the image.
77 const bool is_point_inside_image =
78 (in_x >= 0) && (in_x < input_width) && (in_y >= 0) &&
79 (in_y < input_height);
80
81 if (!is_point_inside_image) {
82 continue;
83 }
84
85 for (int in_channel = 0; in_channel < input_depth; ++in_channel) {
86 int32_t input_val = input_data[Offset(input_shape, batch, in_y,
87 in_x, in_channel)];
88 int32_t filter_val = filter_data[Offset(
89 filter_shape, out_channel, filter_y, filter_x, in_channel)];
90 // Accumulate with 32 bits accumulator.
91 // In the nudging process during model quantization, we force
92 // real value of 0.0 be represented by a quantized value. This
93 // guarantees that the input_offset is a int8_t, even though
94 // it is represented using int32_t. int32_t += int8_t *
95 // (int8_t - int8_t) so the highest value we can get from each
96 // accumulation is [-127, 127] * ([-128, 127] -
97 // [-128, 127]), which is [-32512, 32512]. log2(32512)
98 // = 14.98, which means we can accumulate at least 2^16
99 // multiplications without overflow. The accumulator is
100 // applied to a filter so the accumulation logic will hold as
101 // long as the filter size (filter_y * filter_x * in_channel)
102 // does not exceed 2^16, which is the case in all the models
103 // we have seen so far.
104 // TODO(b/174275578): Add a check to make sure the
105 // accumulator depth is smaller than 2^16.
106 acc += filter_val * (input_val + input_offset);
107 }
108 }
109 }
110
111 if (bias_data) {
112 acc += bias_data[out_channel];
113 }
114 acc = MultiplyByQuantizedMultiplier(
115 acc, output_multiplier[out_channel], output_shift[out_channel]);
116 acc += output_offset;
117 acc = std::max(acc, output_activation_min);
118 acc = std::min(acc, output_activation_max);
119 output_data[Offset(output_shape, batch, out_y, out_x, out_channel)] =
120 static_cast<int8_t>(acc);
121 }
122 }
123 }
124 }
125 }
126
127 // Fixed-point per-channel-quantization convolution reference kernel.
128 // 16-bit data and 8-bit filter
ConvPerChannel(const ConvParams & params,const int32_t * output_multiplier,const int32_t * output_shift,const RuntimeShape & input_shape,const int16_t * input_data,const RuntimeShape & filter_shape,const int8_t * filter_data,const RuntimeShape & bias_shape,const std::int64_t * bias_data,const RuntimeShape & output_shape,int16_t * output_data)129 inline void ConvPerChannel(
130 const ConvParams& params, const int32_t* output_multiplier,
131 const int32_t* output_shift, const RuntimeShape& input_shape,
132 const int16_t* input_data, const RuntimeShape& filter_shape,
133 const int8_t* filter_data, const RuntimeShape& bias_shape,
134 const std::int64_t* bias_data, const RuntimeShape& output_shape,
135 int16_t* output_data) {
136 // Get parameters.
137 const int stride_width = params.stride_width;
138 const int stride_height = params.stride_height;
139 const int dilation_width_factor = params.dilation_width_factor;
140 const int dilation_height_factor = params.dilation_height_factor;
141 const int pad_width = params.padding_values.width;
142 const int pad_height = params.padding_values.height;
143
144 // Set min and max value of the output.
145 const int32_t output_activation_min = params.quantized_activation_min;
146 const int32_t output_activation_max = params.quantized_activation_max;
147
148 // Consistency check.
149 TFLITE_DCHECK_LE(output_activation_min, output_activation_max);
150 TFLITE_DCHECK_EQ(input_shape.DimensionsCount(), 4);
151 TFLITE_DCHECK_EQ(filter_shape.DimensionsCount(), 4);
152 TFLITE_DCHECK_EQ(output_shape.DimensionsCount(), 4);
153 const int batches = MatchingDim(input_shape, 0, output_shape, 0);
154 const int input_depth = MatchingDim(input_shape, 3, filter_shape, 3);
155 const int output_depth = MatchingDim(filter_shape, 0, output_shape, 3);
156 if (bias_data) {
157 TFLITE_DCHECK_EQ(bias_shape.FlatSize(), output_depth);
158 }
159
160 // Check dimensions of the tensors.
161 const int input_height = input_shape.Dims(1);
162 const int input_width = input_shape.Dims(2);
163 const int filter_height = filter_shape.Dims(1);
164 const int filter_width = filter_shape.Dims(2);
165 const int output_height = output_shape.Dims(1);
166 const int output_width = output_shape.Dims(2);
167 for (int batch = 0; batch < batches; ++batch) {
168 for (int out_y = 0; out_y < output_height; ++out_y) {
169 const int in_y_origin = (out_y * stride_height) - pad_height;
170 for (int out_x = 0; out_x < output_width; ++out_x) {
171 const int in_x_origin = (out_x * stride_width) - pad_width;
172 for (int out_channel = 0; out_channel < output_depth; ++out_channel) {
173 std::int64_t acc = 0;
174 for (int filter_y = 0; filter_y < filter_height; ++filter_y) {
175 const int in_y = in_y_origin + dilation_height_factor * filter_y;
176 for (int filter_x = 0; filter_x < filter_width; ++filter_x) {
177 const int in_x = in_x_origin + dilation_width_factor * filter_x;
178
179 // Zero padding by omitting the areas outside the image.
180 const bool is_point_inside_image =
181 (in_x >= 0) && (in_x < input_width) && (in_y >= 0) &&
182 (in_y < input_height);
183
184 if (!is_point_inside_image) {
185 continue;
186 }
187
188 for (int in_channel = 0; in_channel < input_depth; ++in_channel) {
189 int32_t input_val = input_data[Offset(input_shape, batch, in_y,
190 in_x, in_channel)];
191 int32_t filter_val = filter_data[Offset(
192 filter_shape, out_channel, filter_y, filter_x, in_channel)];
193 // Accumulate with 64 bits accumulator.
194 // int64_t += int8_t * int16_t so the highest value we can
195 // get from each accumulation is [-127, 127] * ([-32768,
196 // 32767] -
197 // [-32768, 32767]), which is [-8322945, 8322945].
198 // log2(8322945) = 22.99.
199 acc += filter_val * input_val;
200 }
201 }
202 }
203 if (bias_data) {
204 acc += bias_data[out_channel];
205 }
206 int32_t scaled_acc = MultiplyByQuantizedMultiplier(
207 acc, output_multiplier[out_channel], output_shift[out_channel]);
208 scaled_acc = std::max(scaled_acc, output_activation_min);
209 scaled_acc = std::min(scaled_acc, output_activation_max);
210 output_data[Offset(output_shape, batch, out_y, out_x, out_channel)] =
211 static_cast<int16_t>(scaled_acc);
212 }
213 }
214 }
215 }
216 }
217
218 } // namespace reference_integer_ops
219 } // namespace tflite
220
221 #endif // TENSORFLOW_LITE_KERNELS_INTERNAL_REFERENCE_INTEGER_OPS_CONV_H_
222