1 /* 2 * Copyright 2019 The libgav1 Authors 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef LIBGAV1_SRC_DSP_X86_MASK_BLEND_SSE4_H_ 18 #define LIBGAV1_SRC_DSP_X86_MASK_BLEND_SSE4_H_ 19 20 #include "src/dsp/dsp.h" 21 #include "src/utils/cpu.h" 22 23 namespace libgav1 { 24 namespace dsp { 25 26 // Initializes Dsp::mask_blend. This function is not thread-safe. 27 void MaskBlendInit_SSE4_1(); 28 29 } // namespace dsp 30 } // namespace libgav1 31 32 #if LIBGAV1_TARGETING_SSE4_1 33 34 #ifndef LIBGAV1_Dsp8bpp_MaskBlend444 35 #define LIBGAV1_Dsp8bpp_MaskBlend444 LIBGAV1_CPU_SSE4_1 36 #endif 37 38 #ifndef LIBGAV1_Dsp8bpp_MaskBlend422 39 #define LIBGAV1_Dsp8bpp_MaskBlend422 LIBGAV1_CPU_SSE4_1 40 #endif 41 42 #ifndef LIBGAV1_Dsp8bpp_MaskBlend420 43 #define LIBGAV1_Dsp8bpp_MaskBlend420 LIBGAV1_CPU_SSE4_1 44 #endif 45 46 #ifndef LIBGAV1_Dsp8bpp_InterIntraMaskBlend8bpp444 47 #define LIBGAV1_Dsp8bpp_InterIntraMaskBlend8bpp444 LIBGAV1_CPU_SSE4_1 48 #endif 49 50 #ifndef LIBGAV1_Dsp8bpp_InterIntraMaskBlend8bpp422 51 #define LIBGAV1_Dsp8bpp_InterIntraMaskBlend8bpp422 LIBGAV1_CPU_SSE4_1 52 #endif 53 54 #ifndef LIBGAV1_Dsp8bpp_InterIntraMaskBlend8bpp420 55 #define LIBGAV1_Dsp8bpp_InterIntraMaskBlend8bpp420 LIBGAV1_CPU_SSE4_1 56 #endif 57 58 #ifndef LIBGAV1_Dsp10bpp_MaskBlend444 59 #define LIBGAV1_Dsp10bpp_MaskBlend444 LIBGAV1_CPU_SSE4_1 60 #endif 61 62 #ifndef LIBGAV1_Dsp10bpp_MaskBlend422 63 #define LIBGAV1_Dsp10bpp_MaskBlend422 LIBGAV1_CPU_SSE4_1 64 #endif 65 66 #ifndef LIBGAV1_Dsp10bpp_MaskBlend420 67 #define LIBGAV1_Dsp10bpp_MaskBlend420 LIBGAV1_CPU_SSE4_1 68 #endif 69 70 #ifndef LIBGAV1_Dsp10bpp_MaskBlendInterIntra444 71 #define LIBGAV1_Dsp10bpp_MaskBlendInterIntra444 LIBGAV1_CPU_SSE4_1 72 #endif 73 74 #ifndef LIBGAV1_Dsp10bpp_MaskBlendInterIntra422 75 #define LIBGAV1_Dsp10bpp_MaskBlendInterIntra422 LIBGAV1_CPU_SSE4_1 76 #endif 77 78 #ifndef LIBGAV1_Dsp10bpp_MaskBlendInterIntra420 79 #define LIBGAV1_Dsp10bpp_MaskBlendInterIntra420 LIBGAV1_CPU_SSE4_1 80 #endif 81 82 #endif // LIBGAV1_TARGETING_SSE4_1 83 84 #endif // LIBGAV1_SRC_DSP_X86_MASK_BLEND_SSE4_H_ 85