1 // Auto-generated file. Do not edit!
2 // Template: src/f32-prelu/wasmsimd-bitselect.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/math.h>
15 #include <xnnpack/prelu.h>
16
17
xnn_f32_prelu_ukernel__wasmsimd_bitselect_4x4(size_t rows,size_t channels,const float * restrict input,size_t input_stride,const float * restrict weights,float * restrict output,size_t output_stride)18 void xnn_f32_prelu_ukernel__wasmsimd_bitselect_4x4(
19 size_t rows,
20 size_t channels,
21 const float*restrict input,
22 size_t input_stride,
23 const float*restrict weights,
24 float*restrict output,
25 size_t output_stride) XNN_DISABLE_TSAN
26 {
27 assert(rows != 0);
28 assert(channels != 0);
29 assert(channels % sizeof(float) == 0);
30
31 const float* i0 = input;
32 float* o0 = output;
33 const float* i1 = (const float*) ((uintptr_t) i0 + input_stride);
34 float* o1 = (float*) ((uintptr_t) o0 + output_stride);
35 if XNN_UNPREDICTABLE(rows < 2) {
36 i1 = i0;
37 o1 = o0;
38 }
39 const float* i2 = (const float*) ((uintptr_t) i1 + input_stride);
40 float* o2 = (float*) ((uintptr_t) o1 + output_stride);
41 if XNN_UNPREDICTABLE(rows <= 2) {
42 i2 = i1;
43 o2 = o1;
44 }
45 const float* i3 = (const float*) ((uintptr_t) i2 + input_stride);
46 float* o3 = (float*) ((uintptr_t) o2 + output_stride);
47 if XNN_UNPREDICTABLE(rows < 4) {
48 i3 = i2;
49 o3 = o2;
50 }
51
52 const size_t input_increment = input_stride * 4 - channels;
53 const size_t output_increment = output_stride * 4 - channels;
54
55 const v128_t vzero = wasm_i32x4_splat(0);
56 do {
57 const float* w = weights;
58 size_t c = channels;
59 for (; c >= 4 * sizeof(float); c -= 4 * sizeof(float)) {
60 const v128_t vw0123 = wasm_v128_load(w);
61 w += 4;
62
63 const v128_t vi0x0123 = wasm_v128_load(i0);
64 i0 += 4;
65 const v128_t vi1x0123 = wasm_v128_load(i1);
66 i1 += 4;
67 const v128_t vi2x0123 = wasm_v128_load(i2);
68 i2 += 4;
69 const v128_t vi3x0123 = wasm_v128_load(i3);
70 i3 += 4;
71
72 v128_t vacc0x0123 = wasm_f32x4_mul(vi0x0123, vw0123);
73 const v128_t vmask0x0123 = wasm_i32x4_lt(vi0x0123, vzero);
74 v128_t vacc1x0123 = wasm_f32x4_mul(vi1x0123, vw0123);
75 const v128_t vmask1x0123 = wasm_i32x4_lt(vi1x0123, vzero);
76 v128_t vacc2x0123 = wasm_f32x4_mul(vi2x0123, vw0123);
77 const v128_t vmask2x0123 = wasm_i32x4_lt(vi2x0123, vzero);
78 v128_t vacc3x0123 = wasm_f32x4_mul(vi3x0123, vw0123);
79 const v128_t vmask3x0123 = wasm_i32x4_lt(vi3x0123, vzero);
80
81 vacc0x0123 = wasm_v128_bitselect(vacc0x0123, vi0x0123, vmask0x0123);
82 vacc1x0123 = wasm_v128_bitselect(vacc1x0123, vi1x0123, vmask1x0123);
83 vacc2x0123 = wasm_v128_bitselect(vacc2x0123, vi2x0123, vmask2x0123);
84 vacc3x0123 = wasm_v128_bitselect(vacc3x0123, vi3x0123, vmask3x0123);
85
86 wasm_v128_store(o0, vacc0x0123);
87 o0 += 4;
88 wasm_v128_store(o1, vacc1x0123);
89 o1 += 4;
90 wasm_v128_store(o2, vacc2x0123);
91 o2 += 4;
92 wasm_v128_store(o3, vacc3x0123);
93 o3 += 4;
94 }
95 if XNN_UNLIKELY(c != 0) {
96 const v128_t vw0123 = wasm_v128_load(w);
97 w = (const float*) ((uintptr_t) w + c);
98
99 const v128_t vi0x0123 = wasm_v128_load(i0);
100 i0 = (const float*) ((uintptr_t) i0 + c);
101 const v128_t vi1x0123 = wasm_v128_load(i1);
102 i1 = (const float*) ((uintptr_t) i1 + c);
103 const v128_t vi2x0123 = wasm_v128_load(i2);
104 i2 = (const float*) ((uintptr_t) i2 + c);
105 const v128_t vi3x0123 = wasm_v128_load(i3);
106 i3 = (const float*) ((uintptr_t) i3 + c);
107
108 v128_t vacc0x0123 = wasm_f32x4_mul(vi0x0123, vw0123);
109 const v128_t vmask0x0123 = wasm_i32x4_lt(vi0x0123, vzero);
110 v128_t vacc1x0123 = wasm_f32x4_mul(vi1x0123, vw0123);
111 const v128_t vmask1x0123 = wasm_i32x4_lt(vi1x0123, vzero);
112 v128_t vacc2x0123 = wasm_f32x4_mul(vi2x0123, vw0123);
113 const v128_t vmask2x0123 = wasm_i32x4_lt(vi2x0123, vzero);
114 v128_t vacc3x0123 = wasm_f32x4_mul(vi3x0123, vw0123);
115 const v128_t vmask3x0123 = wasm_i32x4_lt(vi3x0123, vzero);
116
117 vacc0x0123 = wasm_v128_bitselect(vacc0x0123, vi0x0123, vmask0x0123);
118 vacc1x0123 = wasm_v128_bitselect(vacc1x0123, vi1x0123, vmask1x0123);
119 vacc2x0123 = wasm_v128_bitselect(vacc2x0123, vi2x0123, vmask2x0123);
120 vacc3x0123 = wasm_v128_bitselect(vacc3x0123, vi3x0123, vmask3x0123);
121
122 if (c & (2 * sizeof(float))) {
123 *((double*) o0) = wasm_f64x2_extract_lane(vacc0x0123, 0);
124 *((double*) o1) = wasm_f64x2_extract_lane(vacc1x0123, 0);
125 *((double*) o2) = wasm_f64x2_extract_lane(vacc2x0123, 0);
126 *((double*) o3) = wasm_f64x2_extract_lane(vacc3x0123, 0);
127
128 vacc0x0123 = wasm_v32x4_shuffle(vacc0x0123, vacc0x0123, 2, 3, 2, 3);
129 vacc1x0123 = wasm_v32x4_shuffle(vacc1x0123, vacc1x0123, 2, 3, 2, 3);
130 vacc2x0123 = wasm_v32x4_shuffle(vacc2x0123, vacc2x0123, 2, 3, 2, 3);
131 vacc3x0123 = wasm_v32x4_shuffle(vacc3x0123, vacc3x0123, 2, 3, 2, 3);
132
133 o0 += 2;
134 o1 += 2;
135 o2 += 2;
136 o3 += 2;
137 }
138 if (c & (1 * sizeof(float))) {
139 *o0 = wasm_f32x4_extract_lane(vacc0x0123, 0);
140 *o1 = wasm_f32x4_extract_lane(vacc1x0123, 0);
141 *o2 = wasm_f32x4_extract_lane(vacc2x0123, 0);
142 *o3 = wasm_f32x4_extract_lane(vacc3x0123, 0);
143
144 o0 += 1;
145 o1 += 1;
146 o2 += 1;
147 o3 += 1;
148 }
149 }
150 i0 = (const float*) ((uintptr_t) i0 + input_increment);
151 o0 = (float*) ((uintptr_t) o0 + output_increment);
152 i1 = (const float*) ((uintptr_t) i1 + input_increment);
153 o1 = (float*) ((uintptr_t) o1 + output_increment);
154 if XNN_UNPREDICTABLE(rows < 6) {
155 i1 = i0;
156 o1 = o0;
157 }
158 i2 = (const float*) ((uintptr_t) i2 + input_increment);
159 o2 = (float*) ((uintptr_t) o2 + output_increment);
160 if XNN_UNPREDICTABLE(rows <= 6) {
161 i2 = i1;
162 o2 = o1;
163 }
164 i3 = (const float*) ((uintptr_t) i3 + input_increment);
165 o3 = (float*) ((uintptr_t) o3 + output_increment);
166 if XNN_UNPREDICTABLE(rows < 8) {
167 i3 = i2;
168 o3 = o2;
169 }
170 rows = doz(rows, 4);
171 } while (rows != 0);
172 }
173