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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-velu/avx2-rr1-lut16-p3-gather.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16 
17 
18 extern XNN_INTERNAL const int xnn_table_exp2minus_k_over_16[16];
19 
20 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
21 
xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])22 void xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48(
23     size_t n,
24     const float* x,
25     float* y,
26     const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
27 {
28   assert(n % sizeof(float) == 0);
29 
30   const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
31   const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
32   const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
33 
34   const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
35   const __m256 vmagic_bias = _mm256_set1_ps(0x1.800000p19f);
36   const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
37   const __m256i vindex_mask = _mm256_set1_epi32(0xF);
38   const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f);
39   const __m256 vc3 = _mm256_set1_ps(0x1.55561Cp-3f);
40   const __m256 vc2 = _mm256_set1_ps(0x1.0001ECp-1f);
41 
42   for (; n >= 48 * sizeof(float); n -= 48 * sizeof(float)) {
43     __m256 vx0 = _mm256_loadu_ps(x);
44     __m256 vx1 = _mm256_loadu_ps(x + 8);
45     __m256 vx2 = _mm256_loadu_ps(x + 16);
46     __m256 vx3 = _mm256_loadu_ps(x + 24);
47     __m256 vx4 = _mm256_loadu_ps(x + 32);
48     __m256 vx5 = _mm256_loadu_ps(x + 40);
49     x += 48;
50 
51     const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
52     const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
53     const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
54     const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
55     const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
56     const __m256 vz5 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx5, vprescale));
57 
58     __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
59     __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
60     __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
61     __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
62     __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
63     __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
64 
65     const __m256i vidx0 = _mm256_and_si256(_mm256_castps_si256(vn0), vindex_mask);
66     const __m256i vl0 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx0, sizeof(float));
67     const __m256i vidx1 = _mm256_and_si256(_mm256_castps_si256(vn1), vindex_mask);
68     const __m256i vl1 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx1, sizeof(float));
69     const __m256i vidx2 = _mm256_and_si256(_mm256_castps_si256(vn2), vindex_mask);
70     const __m256i vl2 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx2, sizeof(float));
71     const __m256i vidx3 = _mm256_and_si256(_mm256_castps_si256(vn3), vindex_mask);
72     const __m256i vl3 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx3, sizeof(float));
73     const __m256i vidx4 = _mm256_and_si256(_mm256_castps_si256(vn4), vindex_mask);
74     const __m256i vl4 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx4, sizeof(float));
75     const __m256i vidx5 = _mm256_and_si256(_mm256_castps_si256(vn5), vindex_mask);
76     const __m256i vl5 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx5, sizeof(float));
77 
78     const __m256i ven0 = _mm256_slli_epi32(_mm256_castps_si256(vn0), 19);
79     vn0 = _mm256_sub_ps(vn0, vmagic_bias);
80     const __m256i ven1 = _mm256_slli_epi32(_mm256_castps_si256(vn1), 19);
81     vn1 = _mm256_sub_ps(vn1, vmagic_bias);
82     const __m256i ven2 = _mm256_slli_epi32(_mm256_castps_si256(vn2), 19);
83     vn2 = _mm256_sub_ps(vn2, vmagic_bias);
84     const __m256i ven3 = _mm256_slli_epi32(_mm256_castps_si256(vn3), 19);
85     vn3 = _mm256_sub_ps(vn3, vmagic_bias);
86     const __m256i ven4 = _mm256_slli_epi32(_mm256_castps_si256(vn4), 19);
87     vn4 = _mm256_sub_ps(vn4, vmagic_bias);
88     const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19);
89     vn5 = _mm256_sub_ps(vn5, vmagic_bias);
90 
91     __m256 vs0 = _mm256_castsi256_ps(_mm256_add_epi32(vl0, ven0));
92     __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
93     __m256 vs1 = _mm256_castsi256_ps(_mm256_add_epi32(vl1, ven1));
94     __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
95     __m256 vs2 = _mm256_castsi256_ps(_mm256_add_epi32(vl2, ven2));
96     __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
97     __m256 vs3 = _mm256_castsi256_ps(_mm256_add_epi32(vl3, ven3));
98     __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
99     __m256 vs4 = _mm256_castsi256_ps(_mm256_add_epi32(vl4, ven4));
100     __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
101     __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5));
102     __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
103 
104     __m256 vp0 = _mm256_fmadd_ps(vc3, vt0, vc2);
105     __m256 vp1 = _mm256_fmadd_ps(vc3, vt1, vc2);
106     __m256 vp2 = _mm256_fmadd_ps(vc3, vt2, vc2);
107     __m256 vp3 = _mm256_fmadd_ps(vc3, vt3, vc2);
108     __m256 vp4 = _mm256_fmadd_ps(vc3, vt4, vc2);
109     __m256 vp5 = _mm256_fmadd_ps(vc3, vt5, vc2);
110 
111     vp0 = _mm256_mul_ps(vp0, vt0);
112     vt0 = _mm256_mul_ps(vt0, vs0);
113     vp1 = _mm256_mul_ps(vp1, vt1);
114     vt1 = _mm256_mul_ps(vt1, vs1);
115     vp2 = _mm256_mul_ps(vp2, vt2);
116     vt2 = _mm256_mul_ps(vt2, vs2);
117     vp3 = _mm256_mul_ps(vp3, vt3);
118     vt3 = _mm256_mul_ps(vt3, vs3);
119     vp4 = _mm256_mul_ps(vp4, vt4);
120     vt4 = _mm256_mul_ps(vt4, vs4);
121     vp5 = _mm256_mul_ps(vp5, vt5);
122     vt5 = _mm256_mul_ps(vt5, vs5);
123 
124     vs0 = _mm256_fmsub_ps(vs0, valpha, valpha);
125     vp0 = _mm256_fmadd_ps(vp0, vt0, vt0);
126     vs1 = _mm256_fmsub_ps(vs1, valpha, valpha);
127     vp1 = _mm256_fmadd_ps(vp1, vt1, vt1);
128     vs2 = _mm256_fmsub_ps(vs2, valpha, valpha);
129     vp2 = _mm256_fmadd_ps(vp2, vt2, vt2);
130     vs3 = _mm256_fmsub_ps(vs3, valpha, valpha);
131     vp3 = _mm256_fmadd_ps(vp3, vt3, vt3);
132     vs4 = _mm256_fmsub_ps(vs4, valpha, valpha);
133     vp4 = _mm256_fmadd_ps(vp4, vt4, vt4);
134     vs5 = _mm256_fmsub_ps(vs5, valpha, valpha);
135     vp5 = _mm256_fmadd_ps(vp5, vt5, vt5);
136 
137     const __m256 ve0 = _mm256_fmadd_ps(vp0, valpha, vs0);
138     vx0 = _mm256_mul_ps(vx0, vbeta);
139     const __m256 ve1 = _mm256_fmadd_ps(vp1, valpha, vs1);
140     vx1 = _mm256_mul_ps(vx1, vbeta);
141     const __m256 ve2 = _mm256_fmadd_ps(vp2, valpha, vs2);
142     vx2 = _mm256_mul_ps(vx2, vbeta);
143     const __m256 ve3 = _mm256_fmadd_ps(vp3, valpha, vs3);
144     vx3 = _mm256_mul_ps(vx3, vbeta);
145     const __m256 ve4 = _mm256_fmadd_ps(vp4, valpha, vs4);
146     vx4 = _mm256_mul_ps(vx4, vbeta);
147     const __m256 ve5 = _mm256_fmadd_ps(vp5, valpha, vs5);
148     vx5 = _mm256_mul_ps(vx5, vbeta);
149 
150     const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
151     const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
152     const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
153     const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
154     const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
155     const __m256 vy5 = _mm256_blendv_ps(vx5, ve5, vx5);
156 
157     _mm256_storeu_ps(y, vy0);
158     _mm256_storeu_ps(y + 8, vy1);
159     _mm256_storeu_ps(y + 16, vy2);
160     _mm256_storeu_ps(y + 24, vy3);
161     _mm256_storeu_ps(y + 32, vy4);
162     _mm256_storeu_ps(y + 40, vy5);
163     y += 48;
164   }
165   for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
166     __m256 vx = _mm256_loadu_ps(x);
167     x += 8;
168 
169     const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
170 
171     __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
172     const __m256i vidx = _mm256_and_si256(_mm256_castps_si256(vn), vindex_mask);
173     const __m256i vl = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx, sizeof(float));
174 
175     const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 19);
176     vn = _mm256_sub_ps(vn, vmagic_bias);
177 
178     __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
179     __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
180 
181     __m256 vp = _mm256_fmadd_ps(vc3, vt, vc2);
182     vp = _mm256_mul_ps(vp, vt);
183 
184     vt = _mm256_mul_ps(vt, vs);
185     vs = _mm256_fmsub_ps(vs, valpha, valpha);
186     vp = _mm256_fmadd_ps(vp, vt, vt);
187     const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
188 
189     vx = _mm256_mul_ps(vx, vbeta);
190     const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
191 
192     _mm256_storeu_ps(y, vy);
193     y += 8;
194   }
195   if XNN_UNLIKELY(n != 0) {
196     assert(n >= 1 * sizeof(float));
197     assert(n <= 7 * sizeof(float));
198     __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
199 
200     __m256 vx = _mm256_maskload_ps(x, vmask);
201 
202     const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
203 
204     __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
205     const __m256i vidx = _mm256_and_si256(_mm256_castps_si256(vn), vindex_mask);
206     const __m256i vl = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx, sizeof(float));
207 
208     const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 19);
209     vn = _mm256_sub_ps(vn, vmagic_bias);
210 
211     __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
212     __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
213 
214     __m256 vp = _mm256_fmadd_ps(vc3, vt, vc2);
215     vp = _mm256_mul_ps(vp, vt);
216 
217     vt = _mm256_mul_ps(vt, vs);
218     vs = _mm256_fmsub_ps(vs, valpha, valpha);
219     vp = _mm256_fmadd_ps(vp, vt, vt);
220     const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
221 
222     vx = _mm256_mul_ps(vx, vbeta);
223     const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
224 
225     // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
226     __m128 vy_lo = _mm256_castps256_ps128(vy);
227     if (n & (4 * sizeof(float))) {
228       _mm_storeu_ps(y, vy_lo);
229       vy_lo = _mm256_extractf128_ps(vy, 1);
230       y += 4;
231     }
232     if (n & (2 * sizeof(float))) {
233       _mm_storel_pi((__m64*) y, vy_lo);
234       vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
235       y += 2;
236     }
237     if (n & (1 * sizeof(float))) {
238       _mm_store_ss(y, vy_lo);
239     }
240   }
241 }
242