1 /**************************************************************************
2 *
3 * Copyright 2007-2008 VMware, Inc.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #ifndef TGSI_EXEC_H
30 #define TGSI_EXEC_H
31
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
35
36 #if defined __cplusplus
37 extern "C" {
38 #endif
39
40 #define TGSI_CHAN_X 0
41 #define TGSI_CHAN_Y 1
42 #define TGSI_CHAN_Z 2
43 #define TGSI_CHAN_W 3
44
45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
47
48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
50
51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
53
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
56
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
60
61 #define TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
62 ((INST)->Dst[1].Register.WriteMask & (1 << (CHAN)))
63
64 #define TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
65 if (TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN ))
66
67 #define TGSI_FOR_EACH_DST1_ENABLED_CHANNEL( INST, CHAN )\
68 TGSI_FOR_EACH_CHANNEL( CHAN )\
69 TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )
70
71 /**
72 * Registers may be treated as float, signed int or unsigned int.
73 */
74 union tgsi_exec_channel
75 {
76 float f[TGSI_QUAD_SIZE];
77 int i[TGSI_QUAD_SIZE];
78 unsigned u[TGSI_QUAD_SIZE];
79 };
80
81 /**
82 * A vector[RGBA] of channels[4 pixels]
83 */
84 struct tgsi_exec_vector
85 {
86 union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
87 };
88
89 /**
90 * For fragment programs, information for computing fragment input
91 * values from plane equation of the triangle/line.
92 */
93 struct tgsi_interp_coef
94 {
95 float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
96 float dadx[TGSI_NUM_CHANNELS];
97 float dady[TGSI_NUM_CHANNELS];
98 };
99
100 enum tgsi_sampler_control
101 {
102 TGSI_SAMPLER_LOD_NONE,
103 TGSI_SAMPLER_LOD_BIAS,
104 TGSI_SAMPLER_LOD_EXPLICIT,
105 TGSI_SAMPLER_LOD_ZERO,
106 TGSI_SAMPLER_DERIVS_EXPLICIT,
107 TGSI_SAMPLER_GATHER,
108 };
109
110 struct tgsi_image_params {
111 unsigned unit;
112 unsigned tgsi_tex_instr;
113 enum pipe_format format;
114 unsigned execmask;
115 };
116
117 struct tgsi_image {
118 /* image interfaces */
119 void (*load)(const struct tgsi_image *image,
120 const struct tgsi_image_params *params,
121 const int s[TGSI_QUAD_SIZE],
122 const int t[TGSI_QUAD_SIZE],
123 const int r[TGSI_QUAD_SIZE],
124 const int sample[TGSI_QUAD_SIZE],
125 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
126
127 void (*store)(const struct tgsi_image *image,
128 const struct tgsi_image_params *params,
129 const int s[TGSI_QUAD_SIZE],
130 const int t[TGSI_QUAD_SIZE],
131 const int r[TGSI_QUAD_SIZE],
132 const int sample[TGSI_QUAD_SIZE],
133 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
134
135 void (*op)(const struct tgsi_image *image,
136 const struct tgsi_image_params *params,
137 enum tgsi_opcode opcode,
138 const int s[TGSI_QUAD_SIZE],
139 const int t[TGSI_QUAD_SIZE],
140 const int r[TGSI_QUAD_SIZE],
141 const int sample[TGSI_QUAD_SIZE],
142 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
143 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
144
145 void (*get_dims)(const struct tgsi_image *image,
146 const struct tgsi_image_params *params,
147 int dims[4]);
148 };
149
150 struct tgsi_buffer_params {
151 unsigned unit;
152 unsigned execmask;
153 unsigned writemask;
154 };
155
156 struct tgsi_buffer {
157 /* buffer interfaces */
158 void (*load)(const struct tgsi_buffer *buffer,
159 const struct tgsi_buffer_params *params,
160 const int s[TGSI_QUAD_SIZE],
161 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
162
163 void (*store)(const struct tgsi_buffer *buffer,
164 const struct tgsi_buffer_params *params,
165 const int s[TGSI_QUAD_SIZE],
166 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
167
168 void (*op)(const struct tgsi_buffer *buffer,
169 const struct tgsi_buffer_params *params,
170 enum tgsi_opcode opcode,
171 const int s[TGSI_QUAD_SIZE],
172 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
173 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
174
175 void (*get_dims)(const struct tgsi_buffer *buffer,
176 const struct tgsi_buffer_params *params,
177 int *dim);
178 };
179
180 /**
181 * Information for sampling textures, which must be implemented
182 * by code outside the TGSI executor.
183 */
184 struct tgsi_sampler
185 {
186 /** Get samples for four fragments in a quad */
187 /* this interface contains 5 sets of channels that vary
188 * depending on the sampler.
189 * s - the first texture coordinate for sampling.
190 * t - the second texture coordinate for sampling - unused for 1D,
191 layer for 1D arrays.
192 * r - the third coordinate for sampling for 3D, cube, cube arrays,
193 * layer for 2D arrays. Compare value for 1D/2D shadows.
194 * c0 - Compare value for shadow cube and shadow 2d arrays,
195 * layer for cube arrays.
196 * derivs - explicit derivatives.
197 * offset - texel offsets
198 * lod - lod value, except for shadow cube arrays (compare value there).
199 */
200 void (*get_samples)(struct tgsi_sampler *sampler,
201 const unsigned sview_index,
202 const unsigned sampler_index,
203 const float s[TGSI_QUAD_SIZE],
204 const float t[TGSI_QUAD_SIZE],
205 const float r[TGSI_QUAD_SIZE],
206 const float c0[TGSI_QUAD_SIZE],
207 const float c1[TGSI_QUAD_SIZE],
208 float derivs[3][2][TGSI_QUAD_SIZE],
209 const int8_t offset[3],
210 enum tgsi_sampler_control control,
211 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
212 void (*get_dims)(struct tgsi_sampler *sampler,
213 const unsigned sview_index,
214 int level, int dims[4]);
215 void (*get_texel)(struct tgsi_sampler *sampler,
216 const unsigned sview_index,
217 const int i[TGSI_QUAD_SIZE],
218 const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
219 const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
220 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
221 void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
222 const unsigned sview_index,
223 const unsigned sampler_index,
224 const float s[TGSI_QUAD_SIZE],
225 const float t[TGSI_QUAD_SIZE],
226 const float p[TGSI_QUAD_SIZE],
227 const float c0[TGSI_QUAD_SIZE],
228 const enum tgsi_sampler_control control,
229 float mipmap[TGSI_QUAD_SIZE],
230 float lod[TGSI_QUAD_SIZE]);
231 };
232
233 #define TGSI_EXEC_NUM_TEMPS 4096
234
235 /*
236 * Locations of various utility registers (_I = Index, _C = Channel)
237 */
238 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 0)
239 #define TGSI_EXEC_TEMP_KILMASK_C 0
240
241 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 0)
242 #define TGSI_EXEC_TEMP_OUTPUT_C 1
243
244 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 0)
245 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
246
247 /* 4 register buffer for various purposes */
248 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 1)
249 #define TGSI_EXEC_NUM_TEMP_R 4
250
251 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 5)
252 #define TGSI_EXEC_NUM_ADDRS 3
253
254 #define TGSI_EXEC_TEMP_PRIMITIVE_S1_I (TGSI_EXEC_NUM_TEMPS + 8)
255 #define TGSI_EXEC_TEMP_PRIMITIVE_S1_C 0
256 #define TGSI_EXEC_TEMP_PRIMITIVE_S2_I (TGSI_EXEC_NUM_TEMPS + 9)
257 #define TGSI_EXEC_TEMP_PRIMITIVE_S2_C 1
258 #define TGSI_EXEC_TEMP_PRIMITIVE_S3_I (TGSI_EXEC_NUM_TEMPS + 10)
259 #define TGSI_EXEC_TEMP_PRIMITIVE_S3_C 2
260
261 #define TGSI_EXEC_NUM_TEMP_EXTRAS 11
262
263
264
265 #define TGSI_EXEC_MAX_NESTING 32
266 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
267 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
268 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
269 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
270
271 /* The maximum number of input attributes per vertex. For 2D
272 * input register files, this is the stride between two 1D
273 * arrays.
274 */
275 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
276
277 /* The maximum number of bytes per constant buffer.
278 */
279 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE (4096 * sizeof(float[4]))
280
281 /* The maximum number of vertices per primitive */
282 #define TGSI_MAX_PRIM_VERTICES 6
283
284 /* The maximum number of primitives to be generated */
285 #define TGSI_MAX_PRIMITIVES 64
286
287 /* The maximum total number of vertices */
288 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
289
290 #define TGSI_MAX_MISC_INPUTS 8
291
292 #define TGSI_MAX_VERTEX_STREAMS 4
293
294 /** function call/activation record */
295 struct tgsi_call_record
296 {
297 uint CondStackTop;
298 uint LoopStackTop;
299 uint ContStackTop;
300 int SwitchStackTop;
301 int BreakStackTop;
302 uint ReturnAddr;
303 };
304
305
306 /* Switch-case block state. */
307 struct tgsi_switch_record {
308 uint mask; /**< execution mask */
309 union tgsi_exec_channel selector; /**< a value case statements are compared to */
310 uint defaultMask; /**< non-execute mask for default case */
311 };
312
313
314 enum tgsi_break_type {
315 TGSI_EXEC_BREAK_INSIDE_LOOP,
316 TGSI_EXEC_BREAK_INSIDE_SWITCH
317 };
318
319
320 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
321
322 typedef float float4[4];
323
324 struct tgsi_exec_machine;
325
326 typedef void (* apply_sample_offset_func)(
327 const struct tgsi_exec_machine *mach,
328 unsigned attrib,
329 unsigned chan,
330 float ofs_x,
331 float ofs_y,
332 union tgsi_exec_channel *out_chan);
333
334 /**
335 * Run-time virtual machine state for executing TGSI shader.
336 */
337 struct tgsi_exec_machine
338 {
339 /* Total = program temporaries + internal temporaries
340 */
341 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS +
342 TGSI_EXEC_NUM_TEMP_EXTRAS];
343
344 unsigned ImmsReserved;
345 float4 *Imms;
346
347 struct tgsi_exec_vector *Inputs;
348 struct tgsi_exec_vector *Outputs;
349 apply_sample_offset_func *InputSampleOffsetApply;
350
351 /* System values */
352 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
353 struct tgsi_exec_vector SystemValue[TGSI_MAX_MISC_INPUTS];
354
355 struct tgsi_exec_vector *Addrs;
356
357 struct tgsi_sampler *Sampler;
358
359 struct tgsi_image *Image;
360 struct tgsi_buffer *Buffer;
361 unsigned ImmLimit;
362
363 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
364 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
365
366 const struct tgsi_token *Tokens; /**< Declarations, instructions */
367 enum pipe_shader_type ShaderType; /**< PIPE_SHADER_x */
368
369 /* GEOMETRY processor only. */
370 unsigned *Primitives[TGSI_MAX_VERTEX_STREAMS];
371 unsigned *PrimitiveOffsets[TGSI_MAX_VERTEX_STREAMS];
372 unsigned NumOutputs;
373 unsigned MaxGeometryShaderOutputs;
374 unsigned MaxOutputVertices;
375
376 /* FRAGMENT processor only. */
377 const struct tgsi_interp_coef *InterpCoefs;
378 struct tgsi_exec_vector QuadPos;
379 float Face; /**< +1 if front facing, -1 if back facing */
380 bool flatshade_color;
381
382 /* Compute Only */
383 void *LocalMem;
384 unsigned LocalMemSize;
385
386 /* See GLSL 4.50 specification for definition of helper invocations */
387 uint NonHelperMask; /**< non-helpers */
388 /* Conditional execution masks */
389 uint CondMask; /**< For IF/ELSE/ENDIF */
390 uint LoopMask; /**< For BGNLOOP/ENDLOOP */
391 uint ContMask; /**< For loop CONT statements */
392 uint FuncMask; /**< For function calls */
393 uint ExecMask; /**< = CondMask & LoopMask */
394
395 /* Current switch-case state. */
396 struct tgsi_switch_record Switch;
397
398 /* Current break type. */
399 enum tgsi_break_type BreakType;
400
401 /** Condition mask stack (for nested conditionals) */
402 uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
403 int CondStackTop;
404
405 /** Loop mask stack (for nested loops) */
406 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
407 int LoopStackTop;
408
409 /** Loop label stack */
410 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
411 int LoopLabelStackTop;
412
413 /** Loop continue mask stack (see comments in tgsi_exec.c) */
414 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
415 int ContStackTop;
416
417 /** Switch case stack */
418 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
419 int SwitchStackTop;
420
421 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
422 int BreakStackTop;
423
424 /** Function execution mask stack (for executing subroutine code) */
425 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
426 int FuncStackTop;
427
428 /** Function call stack for saving/restoring the program counter */
429 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
430 int CallStackTop;
431
432 struct tgsi_full_instruction *Instructions;
433 uint NumInstructions;
434
435 struct tgsi_full_declaration *Declarations;
436 uint NumDeclarations;
437
438 struct tgsi_declaration_sampler_view
439 SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
440
441 boolean UsedGeometryShader;
442
443 int pc;
444 };
445
446 struct tgsi_exec_machine *
447 tgsi_exec_machine_create(enum pipe_shader_type shader_type);
448
449 void
450 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
451
452
453 void
454 tgsi_exec_machine_bind_shader(
455 struct tgsi_exec_machine *mach,
456 const struct tgsi_token *tokens,
457 struct tgsi_sampler *sampler,
458 struct tgsi_image *image,
459 struct tgsi_buffer *buffer);
460
461 uint
462 tgsi_exec_machine_run(
463 struct tgsi_exec_machine *mach, int start_pc );
464
465
466 void
467 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
468
469
470 extern void
471 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
472 unsigned num_bufs,
473 const void **bufs,
474 const unsigned *buf_sizes);
475
476
477 static inline int
tgsi_exec_get_shader_param(enum pipe_shader_cap param)478 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
479 {
480 switch(param) {
481 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
482 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
483 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
484 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
485 return INT_MAX;
486 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
487 return TGSI_EXEC_MAX_NESTING;
488 case PIPE_SHADER_CAP_MAX_INPUTS:
489 return TGSI_EXEC_MAX_INPUT_ATTRIBS;
490 case PIPE_SHADER_CAP_MAX_OUTPUTS:
491 return 32;
492 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
493 return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
494 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
495 return PIPE_MAX_CONSTANT_BUFFERS;
496 case PIPE_SHADER_CAP_MAX_TEMPS:
497 return TGSI_EXEC_NUM_TEMPS;
498 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
499 return 1;
500 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
501 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
502 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
503 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
504 return 1;
505 case PIPE_SHADER_CAP_SUBROUTINES:
506 return 1;
507 case PIPE_SHADER_CAP_INTEGERS:
508 return 1;
509 case PIPE_SHADER_CAP_INT64_ATOMICS:
510 case PIPE_SHADER_CAP_FP16:
511 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
512 case PIPE_SHADER_CAP_INT16:
513 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
514 return 0;
515 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
516 return PIPE_MAX_SAMPLERS;
517 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
518 return PIPE_MAX_SHADER_SAMPLER_VIEWS;
519 case PIPE_SHADER_CAP_PREFERRED_IR:
520 return PIPE_SHADER_IR_TGSI;
521 case PIPE_SHADER_CAP_SUPPORTED_IRS:
522 return 1 << PIPE_SHADER_IR_TGSI;
523 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
524 return 1;
525 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
526 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
527 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
528 return 1;
529 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
530 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
531 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
532 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
533 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
534 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
535 return 0;
536 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
537 return PIPE_MAX_SHADER_BUFFERS;
538 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
539 return PIPE_MAX_SHADER_IMAGES;
540
541 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
542 return 32;
543 }
544 /* if we get here, we missed a shader cap above (and should have seen
545 * a compiler warning.)
546 */
547 return 0;
548 }
549
550 #if defined __cplusplus
551 } /* extern "C" */
552 #endif
553
554 #endif /* TGSI_EXEC_H */
555