/art/compiler/optimizing/ |
D | common_arm.h | 150 vixl::aarch32::DRegister d = vixl::aarch32::DRegister(s.GetCode() / 2); in DRegisterFromS() 204 return Location::RegisterLocation(reg.GetCode()); in LocationFrom() 208 return Location::FpuRegisterLocation(reg.GetCode()); in LocationFrom() 213 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom() 218 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
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D | code_generator_arm64.h | 103 return Location::RegisterLocation(vixl::aarch64::x15.GetCode()); in FixedTempLocation() 112 ? vixl::aarch64::x21.GetCode() 113 : vixl::aarch64::x20.GetCode()), 114 vixl::aarch64::x30.GetCode()); 117 vixl::aarch64::d8.GetCode(), 118 vixl::aarch64::d15.GetCode()); 992 DCHECK(reg < vixl::aarch64::lr.GetCode() && in CheckValidReg() 993 reg != vixl::aarch64::ip0.GetCode() && in CheckValidReg() 994 reg != vixl::aarch64::ip1.GetCode()) << reg; in CheckValidReg()
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D | common_arm64.h | 215 return Location::RegisterLocation(ARTRegCodeFromVIXL(reg.GetCode())); in LocationFrom() 219 return Location::FpuRegisterLocation(fpreg.GetCode()); in LocationFrom() 223 return Location::FpuRegisterLocation(zreg.GetCode()); in LocationFrom()
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D | optimizing_compiler.cc | 1204 &stack_map_allocator, jni_compiled_method, jni_compiled_method.GetCode().size()); in JniCompile() 1208 jni_compiled_method.GetCode(), in JniCompile() 1263 &stack_map_allocator, jni_compiled_method, jni_compiled_method.GetCode().size()); in JitCompile() 1269 jni_compiled_method.GetCode().size(), in JitCompile() 1297 info.code_size = jni_compiled_method.GetCode().size(); in JitCompile() 1308 jni_compiled_method.GetCode(), in JitCompile() 1323 jit_logger->WriteLog(code, jni_compiled_method.GetCode().size(), method); in JitCompile()
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D | code_generator_arm_vixl.cc | 132 DCHECK_EQ(raw_adr[3] & 0x8fu, rd_.GetCode()); // Check bits 8-11 and 15. in ~EmitAdrCode() 762 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.GetCode())); in EmitNativeCode() 790 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg.GetCode())); in EmitNativeCode() 791 if (codegen->IsCoreCalleeSaveRegister(index_reg.GetCode())) { in EmitNativeCode() 898 uint32_t ref = RegisterFrom(ref_).GetCode(); in FindAvailableCallerSaveRegister() 899 uint32_t obj = RegisterFrom(obj_).GetCode(); in FindAvailableCallerSaveRegister() 938 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.GetCode())); in EmitNativeCode() 1051 for (uint32_t i = regs.GetFirstSRegister().GetCode(); in ComputeSRegisterListMask() 1052 i <= regs.GetLastSRegister().GetCode(); in ComputeSRegisterListMask() 2077 for (uint32_t i = kFpuCalleeSaves.GetFirstSRegister().GetCode(); in SetupBlockedRegisters() [all …]
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D | code_generator_arm64.cc | 161 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in OneRegInReferenceOutSaveEverythingCallerSaves() 162 DCHECK_EQ(calling_convention.GetRegisterAt(0).GetCode(), in OneRegInReferenceOutSaveEverythingCallerSaves() 164 DataType::Type::kReference).GetCode()); in OneRegInReferenceOutSaveEverythingCallerSaves() 737 size_t ref = static_cast<int>(XRegisterFrom(ref_).GetCode()); in FindAvailableCallerSaveRegister() 738 size_t obj = static_cast<int>(XRegisterFrom(obj_).GetCode()); in FindAvailableCallerSaveRegister() 890 return Location::RegisterLocation(x15.GetCode()); in GetMethodLocation() 1351 blocked_core_registers_[reserved_core_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters() 1357 blocked_fpu_registers_[reserved_fp_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters() 1366 blocked_fpu_registers_[reserved_fp_registers_debuggable.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters() 2841 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in VisitBoundsCheck() [all …]
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D | intrinsics_arm64.cc | 1163 Location::RegisterLocation(old_value_temp.GetCode()), in ReadBarrierCasSlowPathARM64() 1164 Location::RegisterLocation(old_value.GetCode()), in ReadBarrierCasSlowPathARM64() 1165 Location::RegisterLocation(base.GetCode()), in ReadBarrierCasSlowPathARM64() 1167 /*index=*/ Location::RegisterLocation(offset.GetCode())); in ReadBarrierCasSlowPathARM64() 1171 Location::RegisterLocation(old_value.GetCode()), in ReadBarrierCasSlowPathARM64() 1172 Location::RegisterLocation(old_value_temp.GetCode()), in ReadBarrierCasSlowPathARM64() 1173 Location::RegisterLocation(base.GetCode()), in ReadBarrierCasSlowPathARM64() 1175 /*index=*/ Location::RegisterLocation(offset.GetCode())); in ReadBarrierCasSlowPathARM64() 1369 Location::RegisterLocation(x0.GetCode()))); in VisitUnsafeCASObject() 1370 locations->AddTemp(Location::RegisterLocation(x0.GetCode())); in VisitUnsafeCASObject() [all …]
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D | intrinsics_arm_vixl.cc | 177 Thread::ReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode()); in EmitNativeCode() 3350 Location::RegisterLocation(old_value_temp.GetCode()), in ReadBarrierCasSlowPathARMVIXL() 3351 Location::RegisterLocation(old_value.GetCode()), in ReadBarrierCasSlowPathARMVIXL() 3352 Location::RegisterLocation(base.GetCode()), in ReadBarrierCasSlowPathARMVIXL() 3354 /*index=*/ Location::RegisterLocation(offset.GetCode())); in ReadBarrierCasSlowPathARMVIXL() 3358 Location::RegisterLocation(old_value.GetCode()), in ReadBarrierCasSlowPathARMVIXL() 3359 Location::RegisterLocation(old_value_temp.GetCode()), in ReadBarrierCasSlowPathARMVIXL() 3360 Location::RegisterLocation(base.GetCode()), in ReadBarrierCasSlowPathARMVIXL() 3362 /*index=*/ Location::RegisterLocation(offset.GetCode())); in ReadBarrierCasSlowPathARMVIXL() 5114 Location::RegisterLocation(RegisterFrom(out).GetCode()), in GenerateVarHandleGetAndUpdate() [all …]
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D | codegen_test.cc | 875 uint32_t reg_code = reg_list.PopLowestIndex().GetCode(); in TEST_F() 895 uint32_t reg_code = reg_list.PopLowestIndex().GetCode(); in TEST_F()
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D | code_generator_arm_vixl.h | 850 DCHECK(reg < vixl::aarch32::ip.GetCode() && reg != mr.GetCode()) << reg; in CheckValidReg()
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/art/compiler/utils/arm/ |
D | assembler_arm_vixl.cc | 252 CHECK_NE(base.GetCode(), kIpCode); in StoreToOffset() 253 if ((reg.GetCode() != kIpCode) && in StoreToOffset() 255 ((type != kStoreWordPair) || (reg.GetCode() + 1 != kIpCode))) { in StoreToOffset() 264 tmp_reg = (base.GetCode() != 5) ? r5 : r6; in StoreToOffset() 266 if (base.GetCode() == kSpCode) { in StoreToOffset() 287 ___ Strd(reg, vixl32::Register(reg.GetCode() + 1), MemOperand(base, offset)); in StoreToOffset() 293 if ((tmp_reg.IsValid()) && (tmp_reg.GetCode() != kIpCode)) { in StoreToOffset() 348 ___ Ldrd(dest, vixl32::Register(dest.GetCode() + 1), MemOperand(base, offset)); in LoadFromOffset() 392 DCHECK_EQ(regs & (1u << base.GetCode()), 0u); in StoreRegisterList()
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D | jni_macro_assembler_arm_vixl.cc | 101 if (core_spill_mask == (1u << lr.GetCode()) && in BuildFrame() 107 core_spill_mask |= 1u << r3.GetCode(); in BuildFrame() 160 if ((core_spill_mask & (1u << lr.GetCode())) != 0u && !emit_code_before_return) { in RemoveFrame() 161 DCHECK_EQ(core_spill_mask & (1u << pc.GetCode()), 0u); in RemoveFrame() 162 core_spill_mask ^= (1u << lr.GetCode()) | (1u << pc.GetCode()); in RemoveFrame() 166 if (fp_spill_mask == 0u && (core_spill_mask & (1u << pc.GetCode())) != 0u) { in RemoveFrame() 171 } else if (frame_size == 8u && core_spill_mask == (1u << pc.GetCode())) { in RemoveFrame() 174 ___ Pop(RegisterList((1u << r3.GetCode()) | (1u << pc.GetCode()))); in RemoveFrame() 201 core_spill_mask != (1u << pc.GetCode()) && in RemoveFrame() 212 if ((core_spill_mask & (1u << pc.GetCode())) == 0u) { in RemoveFrame() [all …]
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D | assembler_arm_vixl.h | 44 return dwarf::Reg::ArmCore(static_cast<int>(reg.GetCode())); in DWARFReg() 48 return dwarf::Reg::ArmFp(static_cast<int>(reg.GetCode())); in DWARFReg()
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/art/compiler/utils/arm64/ |
D | assembler_arm64.h | 49 return dwarf::Reg::Arm64Fp(reg.GetCode()); in DWARFReg() 51 DCHECK_LT(reg.GetCode(), 31u); // X0 - X30. in DWARFReg() 52 return dwarf::Reg::Arm64Core(reg.GetCode()); in DWARFReg()
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D | jni_macro_assembler_arm64.cc | 786 core_reg_list.Combine(reg_x(reg.AsXRegister()).GetCode()); in BuildFrame() 789 fp_reg_list.Combine(reg_d(reg.AsDRegister()).GetCode()); in BuildFrame() 822 core_reg_list.Combine(reg_x(reg.AsXRegister()).GetCode()); in RemoveFrame() 825 fp_reg_list.Combine(reg_d(reg.AsDRegister()).GetCode()); in RemoveFrame() 865 << "core_reg_list should not contain scratch register X" << temp.GetCode(); in RemoveFrame()
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/art/runtime/jit/ |
D | jit_code_cache.cc | 126 DCHECK(entrypoint == OatQuickMethodHeader::FromCodePointer(GetCode())->GetEntryPoint()); in UpdateEntryPoints() 159 const void* GetCode() const { in GetCode() function in art::jit::JitCodeCache::JniStubData 164 return GetCode() != nullptr; in IsCompiled() 319 return data.GetCode(); in GetJniStubCode() 475 FreeCodeAndData(method_header->GetCode()); in FreeAllMethodHeaders() 522 method_headers.insert(OatQuickMethodHeader::FromCodePointer(it->second.GetCode())); in RemoveMethodsIn() 824 FreeCodeAndData(it->second.GetCode()); in RemoveMethodLocked() 1026 const void* code = method_header->GetCode(); in Run() 1048 const void* code = method_header->GetCode(); in Run() 1168 if (!data.IsCompiled() || IsInZygoteExecSpace(data.GetCode())) { in GarbageCollectCache() [all …]
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/art/disassembler/ |
D | disassembler_arm64.cc | 48 if (reg.GetCode() == TR) { in AppendRegisterNameToOutput() 51 } else if (reg.GetCode() == LR) { in AppendRegisterNameToOutput()
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/art/compiler/jni/quick/ |
D | jni_compiler.h | 50 ArrayRef<const uint8_t> GetCode() const { return ArrayRef<const uint8_t>(code_); } in GetCode() function
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/art/compiler/driver/ |
D | compiled_method_storage.cc | 134 ArrayRef<const uint8_t> GetCode() const { in GetCode() function in art::CompiledMethodStorage::ThunkMapValue 246 return value.GetCode(); in GetThunkCode()
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/art/runtime/ |
D | oat_quick_method_header.h | 85 ALWAYS_INLINE const uint8_t* GetCode() const { in GetCode() function
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D | art_method.cc | 631 << " " << (uintptr_t)(method_header->GetCode() + method_header->GetCodeSize()); in GetOatQuickMethodHeader()
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/art/dex2oat/linker/ |
D | relative_patcher_test.h | 294 *code = value.GetCode(); in GetThunkCode() 355 ArrayRef<const uint8_t> GetCode() const { return ArrayRef<const uint8_t>(code_); } in GetCode() function
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/art/dex2oat/linker/arm/ |
D | relative_patcher_arm_base.cc | 48 ArrayRef<const uint8_t> GetCode() const { in GetCode() function in art::linker::ArmBaseRelativePatcher::ThunkData 216 if (UNLIKELY(!WriteThunk(out, pending_thunks_.front()->GetCode()))) { in WriteThunks()
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/art/oatdump/ |
D | oatdump.cc | 1213 : method_header->GetCode() - oat_file_.Begin(); in DumpOatMethod()
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