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Searched refs:movl (Results 1 – 25 of 39) sorted by relevance

12

/art/runtime/interpreter/mterp/x86/
Dmain.S193 movl rPC, OFF_FP_DEX_PC_PTR(rFP)
200 movl rSELF, rIBASE
201 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE
213 movl rSELF, rIBASE
214 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE
221 movl THREAD_CURRENT_IBASE_OFFSET(\_reg), rIBASE
278 movl VREG_ADDRESS(\_vreg), \_reg
287 movl \_reg, VREG_ADDRESS(\_vreg)
288 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
299 movl \_reg, VREG_ADDRESS(\_vreg)
[all …]
Dobject.S7 movl rPC, OUT_ARG0(%esp) # arg0: Instruction* inst
8 movl rINST, OUT_ARG1(%esp) # arg1: uint16_t inst_data
10 movl %eax, OUT_ARG2(%esp) # arg2: ShadowFrame* sf
11 movl rSELF, %eax
12 movl %eax, OUT_ARG3(%esp) # arg3: Thread* self
26 movl %eax, OUT_ARG0(%esp)
28 movl %ecx, OUT_ARG1(%esp)
29 movl OFF_FP_METHOD(rFP),%eax
30 movl %eax, OUT_ARG2(%esp)
31 movl rSELF, %ecx
[all …]
Dinvoke.S9 movl rSELF, %ecx
10 movl %ecx, OUT_ARG0(%esp)
12 movl %eax, OUT_ARG1(%esp)
13 movl rPC, OUT_ARG2(%esp)
15 movl rINST, OUT_ARG3(%esp)
20 movl rSELF, %eax
35 movl rSELF, %ecx
36 movl %ecx, OUT_ARG0(%esp)
38 movl %eax, OUT_ARG1(%esp)
39 movl rPC, OUT_ARG2(%esp)
[all …]
Dother.S9 movl %eax, OUT_ARG0(%esp)
10 movl rINST, OUT_ARG1(%esp)
12 movl %eax, OUT_ARG2(%esp)
13 movl rSELF, %eax
14 movl %eax, OUT_ARG3(%esp)
29 movl 2(rPC), %eax # grab all 32 bits at once
42 movl $$0xf, rINST
70 movl 2(rPC), %eax # eax <- BBBB
71 movl %eax, OUT_ARG0(%esp)
72 movl rINST, OUT_ARG1(%esp)
[all …]
Dcontrol_flow.S80 movl 2(rPC), rINST # rINST <- AAAAAAAA
131 movl 2(rPC), %ecx # ecx <- BBBBbbbb
134 movl %eax, OUT_ARG1(%esp) # ARG1 <- vAA
135 movl %ecx, OUT_ARG0(%esp) # ARG0 <- switchData
139 movl %eax, rINST
151 movl rSELF, %eax
154 movl %eax, OUT_ARG0(%esp)
167 movl rSELF, %eax
170 movl %eax, OUT_ARG0(%esp)
184 movl rSELF, %eax
[all …]
Darray.S42 movl %eax, OUT_ARG0(%esp)
43 movl %ecx, OUT_ARG1(%esp)
45 movl rSELF, %ecx
110 movl %eax, OUT_ARG0(%esp)
111 movl rPC, OUT_ARG1(%esp)
113 movl rINST, OUT_ARG2(%esp)
152 movl MIRROR_ARRAY_LENGTH_OFFSET(%ecx), rINST
159 movl 2(rPC), %ecx # ecx <- BBBBbbbb
162 movl %eax, OUT_ARG0(%esp)
163 movl %ecx, OUT_ARG1(%esp)
[all …]
Darithmetic.S14 movl %eax, %edx
26 movl $special, $result
39 movl %eax, %edx
71 movl $special, $result
103 movl $special, %eax
130 movl $special, %eax
240 movl rIBASE, LOCAL0(%esp) # save rIBASE
246 movl LOCAL0(%esp), rIBASE # restore rIBASE
295 movl $$0x80000000, %eax
323 movl $$0, VREG_ADDRESS(%ecx)
[all …]
/art/runtime/arch/x86/
Djni_entrypoints_x86.S28 movl (%esp), %eax // Thread* self
29 movl THREAD_TOP_QUICK_FRAME_OFFSET(%eax), %eax // uintptr_t tagged_quick_frame
31 movl (%eax), %eax // ArtMethod* method
58 movl (%esp), %ecx
73 movl (%esp), %edx
81 movl %eax, %ecx
108 movl %edx, FRAME_SIZE_SAVE_REFS_AND_ARGS - __SIZEOF_POINTER__(%eax)
112 movl RUNTIME_SAVE_REFS_AND_ARGS_METHOD_OFFSET(%ecx), %ebx
114 movl %eax, %ecx // Prepare untagged managed SP for the runtime method.
118 movl %ebx, (%eax)
[all …]
Dquick_entrypoints_x86.S39 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
62 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
89 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
91 movl 12(%esp), REG_VAR(got_reg)
121 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
134 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
192 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
341 movl (FRAME_SIZE_SAVE_EVERYTHING - 2 * __SIZEOF_POINTER__)(%esp), %eax
342 movl %edi, (FRAME_SIZE_SAVE_EVERYTHING - 2 * __SIZEOF_POINTER__)(%esp)
399 movl %esp, %edx // remember SP
[all …]
D__x86.get_pc_thunk.S28 movl (%esp), %ebx
/art/runtime/interpreter/mterp/x86_64ng/
Dinvoke.S24 movl (rFP, %r11, 4), %esi
26 movl (%esi), %eax
59 movl (rFP, %r11, 4), %esi
61 movl (%esi), %eax
69 movl (rFP, %r11, 4), %esi
71 movl (%esi), %eax
85 movl (rFP, %r11, 4), %esi
86 movl MIRROR_OBJECT_CLASS_OFFSET(%esi), %edx
158 movl (rFP, %r11, 4), %esi
160 movl MIRROR_OBJECT_CLASS_OFFSET(%esi), %edx
[all …]
Dmain.S145 movl VREG_ADDRESS(\_vreg), \_reg
149 movl VREG_REF_ADDRESS(\_vreg), \_reg
158 movl \_reg, VREG_ADDRESS(\_vreg)
159 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
170 movl \_reg, VREG_ADDRESS(\_vreg)
171 movl \_reg, VREG_REF_ADDRESS(\_vreg)
175 movl VREG_HIGH_ADDRESS(\_vreg), \_reg
179 movl \_reg, VREG_HIGH_ADDRESS(\_vreg)
180 movl MACRO_LITERAL(0), VREG_REF_HIGH_ADDRESS(\_vreg)
184 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
[all …]
Dother.S6 movl 2(rPC), %eax # grab all 32 bits at once
124 movl rINST, %eax # eax <- BA
150 movl rSELF:THREAD_EXCEPTION_OFFSET, %eax
152 movl $$0, rSELF:THREAD_EXCEPTION_OFFSET
197 movl rINST, %ecx # ecx <- BA
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc140 __ movl(Address(ESP, offs), src.AsCpuRegister()); in Store() local
143 __ movl(Address(ESP, offs), src.AsRegisterPairLow()); in Store() local
144 __ movl(Address(ESP, FrameOffset(offs.Int32Value()+4)), src.AsRegisterPairHigh()); in Store() local
164 __ movl(Address(ESP, dest), src.AsCpuRegister()); in StoreRef() local
170 __ movl(Address(ESP, dest), src.AsCpuRegister()); in StoreRawPtr() local
174 __ movl(Address(ESP, dest), Immediate(imm)); in StoreImmediateToFrame() local
180 __ fs()->movl(Address::Absolute(thr_offs), scratch); in StoreStackOffsetToThread()
184 __ fs()->movl(Address::Absolute(thr_offs), ESP); in StoreStackPointerToThread()
199 __ movl(dest.AsCpuRegister(), Address(ESP, src)); in Load() local
202 __ movl(dest.AsRegisterPairLow(), Address(ESP, src)); in Load() local
[all …]
/art/runtime/interpreter/mterp/x86_64/
Dmain.S266 movl VREG_ADDRESS(\_vreg), \_reg
275 movl \_reg, VREG_ADDRESS(\_vreg)
276 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
287 movl \_reg, VREG_ADDRESS(\_vreg)
288 movl \_reg, VREG_REF_ADDRESS(\_vreg)
292 movl VREG_HIGH_ADDRESS(\_vreg), \_reg
296 movl \_reg, VREG_HIGH_ADDRESS(\_vreg)
297 movl MACRO_LITERAL(0), VREG_REF_HIGH_ADDRESS(\_vreg)
301 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
305 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
[all …]
Dother.S25 movl 2(rPC), %eax # grab all 32 bits at once
38 movl $$0xf, rINST
66 movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB
143 movl rINST, %eax # eax <- BA
170 movl THREAD_EXCEPTION_OFFSET(%rcx), %eax
172 movl $$0, THREAD_EXCEPTION_OFFSET(%rcx)
200 movl (%rax), %eax # r0 <- result.i.
221 movl rINST, %ecx # ecx <- BA
Darithmetic.S66 movl rINST, %ecx # rcx <- BA
128 movl rINST, %eax # rax <- 000000BA
226 movl rINST, %ecx # rcx <- A+
245 movl rINST, %eax # rax <- 000000BA
290 movl rINST, %ecx # rcx <- A+
305 movl rINST, %ecx # rcx <- A+
331 movl rINST, %ecx # ecx <- BA
352 movl rINST, %ecx # rcx <- A+
417 movl $$-1, %esi
470 movl rINST, %ecx # rcx <- A+
[all …]
Dinvoke.S13 movl rINST, OUT_32_ARG3
36 movl rINST, OUT_32_ARG3
/art/runtime/arch/x86_64/
Dquick_entrypoints_x86_64.S391 movl (%r11), REG_VAR(gpr_reg32)
447 movl %edx, %r10d
460 movl %r10d, %ecx // Place size of args in rcx.
469 movl (%r11), %esi // rsi := this pointer
541 movl %edx, %r10d
554 movl %r10d, %ecx // Place size of args in rcx.
731 movl %eax, %edi // pass the index of the constant as arg0
810 movl MIRROR_CLASS_OBJECT_SIZE_ALLOC_FAST_PATH_OFFSET(%rdi), %eax
835 movl %eax, (%rcx)
851 movl %edi, MIRROR_OBJECT_CLASS_OFFSET(%rax)
[all …]
/art/compiler/optimizing/
Dcode_generator_x86.cc131 __ movl(reg_, Immediate(0)); in EmitNativeCode() local
175 __ movl(length_loc.AsRegister<Register>(), array_len); in EmitNativeCode() local
255 __ movl(calling_convention.GetRegisterAt(0), Immediate(string_index.index_)); in EmitNativeCode() local
293 __ movl(calling_convention.GetRegisterAt(0), Immediate(type_index.index_)); in EmitNativeCode() local
601 __ movl(temp_, ref_reg); in EmitNativeCode() local
648 __ movl(EAX, temp_); in EmitNativeCode() local
662 __ movl(value, base); in EmitNativeCode() local
799 __ movl(free_reg, index_reg); in EmitNativeCode() local
855 __ movl(calling_convention.GetRegisterAt(2), Immediate(offset_)); in EmitNativeCode() local
995 __ movl(Address(ESP, stack_index), static_cast<Register>(reg_id)); in SaveCoreRegister() local
[all …]
Dintrinsics_x86_64.cc97 __ movl(CpuRegister(TMP), Address(src_curr_addr, 0)); in EmitNativeCode() local
108 __ movl(Address(dst_curr_addr, 0), CpuRegister(TMP)); in EmitNativeCode() local
347 __ movl(out, Immediate(0)); // does not change flags in VisitMathRoundFloat() local
388 __ movl(out, Immediate(0)); // does not change flags, implicit zero extension to 64-bit in VisitMathRoundDouble() local
631 __ movl(temp, Address(input, length_offset)); in CheckPosition() local
659 __ movl(temp, Address(input, length_offset)); in CheckPosition() local
718 __ movl(count, Immediate(length.GetConstant()->AsIntConstant()->GetValue())); in VisitSystemArrayCopyChar() local
720 __ movl(count, length.AsRegister<CpuRegister>()); in VisitSystemArrayCopyChar() local
938 __ movl(temp1, Address(dest, class_offset)); in VisitSystemArrayCopy() local
940 __ movl(temp2, Address(src, class_offset)); in VisitSystemArrayCopy() local
[all …]
Dintrinsics_x86.cc124 __ movl(temp2, Address(src, temp1, ScaleFactor::TIMES_4, adjusted_offset)); in EmitNativeCode() local
127 __ movl(temp2, Address(src, temp2, ScaleFactor::TIMES_4, offset)); in EmitNativeCode() local
147 __ movl(Address(dest, temp1, ScaleFactor::TIMES_4, adjusted_offset), temp2); in EmitNativeCode() local
150 __ movl(Address(dest, temp3, ScaleFactor::TIMES_4, offset), temp2); in EmitNativeCode() local
314 __ movl(output_lo, input_hi); in VisitLongReverseBytes() local
315 __ movl(output_hi, input_lo); in VisitLongReverseBytes() local
457 __ movl(out, Immediate(kPrimIntMax)); in VisitMathRoundFloat() local
461 __ movl(out, Immediate(0)); // does not change flags in VisitMathRoundFloat() local
562 __ movl(out_lo, src_lo); in GenLowestOneBit() local
563 __ movl(out_hi, src_hi); in GenLowestOneBit() local
[all …]
Dcode_generator_x86_64.cc221 __ movl(length_loc.AsRegister<CpuRegister>(), array_len); in EmitNativeCode() local
275 __ movl(CpuRegister(RAX), Immediate(type_index.index_)); in EmitNativeCode() local
327 __ movl(CpuRegister(RAX), Immediate(string_index.index_)); in EmitNativeCode() local
611 __ movl(temp1_, ref_cpu_reg); in EmitNativeCode() local
659 __ movl(CpuRegister(RAX), temp1_); in EmitNativeCode() local
674 __ movl(CpuRegister(value_reg), base); in EmitNativeCode() local
812 __ movl(CpuRegister(free_reg), CpuRegister(index_reg)); in EmitNativeCode() local
865 __ movl(CpuRegister(calling_convention.GetRegisterAt(2)), Immediate(offset_)); in EmitNativeCode() local
1017 __ movl(temp.AsRegister<CpuRegister>(), in LoadMethod() local
1154 __ movl(temp, Address(CpuRegister(receiver), class_offset)); in GenerateVirtualCall() local
[all …]
/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.cc161 __ movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store() local
190 __ movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRef() local
200 __ movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq? in StoreImmediateToFrame() local
227 __ movl(dest.AsCpuRegister(), Address(CpuRegister(RSP), src)); in Load() local
262 __ gs()->movl(dest.AsCpuRegister(), Address::Absolute(src, true)); in LoadFromThread()
297 __ movl(dest.AsCpuRegister(), Address(base.AsCpuRegister(), offs)); in LoadRef() local
440 __ movl(scratch, Address(CpuRegister(RSP), src)); in CopyRef() local
441 __ movl(Address(CpuRegister(RSP), dest), scratch); in CopyRef() local
449 __ movl(scratch, Address(base.AsX86_64().AsCpuRegister(), offs)); in CopyRef() local
453 __ movl(Address(CpuRegister(RSP), dest), scratch); in CopyRef() local
[all …]
/art/test/521-regression-integer-field-set/
Dinfo.txt3 a `movw` instruction instead of a `movl` instruction.

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