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Searched refs:out_reg (Results 1 – 19 of 19) sorted by relevance

/art/tools/dexanalyze/
Ddexanalyze_bytecode.cc266 uint32_t out_reg = inst->VRegA_22c(); in ProcessCodeItem() local
274 ExtendPrefix(&out_reg, &field_idx); in ProcessCodeItem()
275 CHECK(InstNibbles(new_opcode, {out_reg, field_idx})); in ProcessCodeItem()
286 CHECK(InstNibbles(new_opcode, {out_reg, receiver, type_idx, field_idx})); in ProcessCodeItem()
296 uint32_t out_reg = is_jumbo ? inst->VRegA_31c() : inst->VRegA_21c(); in ProcessCodeItem() local
303 ExtendPrefix(&out_reg, &idx); in ProcessCodeItem()
304 CHECK(InstNibbles(opcode, {out_reg, idx})); in ProcessCodeItem()
324 uint32_t out_reg = inst->VRegA_21c(); in ProcessCodeItem() local
334 ExtendPrefix(&out_reg, &field_idx); in ProcessCodeItem()
335 if (InstNibbles(new_opcode, {out_reg, field_idx})) { in ProcessCodeItem()
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/art/compiler/jni/quick/
Djni_compiler.cc305 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local
306 __ CreateJObject(out_reg, in ArtJniCompileMethodInternal()
406 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local
407 __ Load(out_reg, method_offset, static_cast<size_t>(kPointerSize)); in ArtJniCompileMethodInternal()
409 method_register = out_reg; in ArtJniCompileMethodInternal()
523 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local
524 __ Move(out_reg, saved_cookie_register, cookie_size); in ArtJniCompileMethodInternal()
539 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local
540 __ Load(out_reg, method_offset, static_cast<size_t>(kPointerSize)); in ArtJniCompileMethodInternal()
549 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local
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/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.cc548 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); in CreateJObject() local
552 in_reg = out_reg; in CreateJObject()
557 CHECK(out_reg.IsCpuRegister()); in CreateJObject()
561 if (!out_reg.Equals(in_reg)) { in CreateJObject()
562 __ xorl(out_reg.AsCpuRegister(), out_reg.AsCpuRegister()); in CreateJObject()
566 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), spilled_reference_offset)); in CreateJObject()
569 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), spilled_reference_offset)); in CreateJObject()
Djni_macro_assembler_x86_64.h153 void CreateJObject(ManagedRegister out_reg,
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc473 X86ManagedRegister out_reg = mout_reg.AsX86(); in CreateJObject() local
476 CHECK(out_reg.IsCpuRegister()); in CreateJObject()
480 if (!out_reg.Equals(in_reg)) { in CreateJObject()
481 __ xorl(out_reg.AsCpuRegister(), out_reg.AsCpuRegister()); in CreateJObject()
485 __ leal(out_reg.AsCpuRegister(), Address(ESP, spilled_reference_offset)); in CreateJObject()
488 __ leal(out_reg.AsCpuRegister(), Address(ESP, spilled_reference_offset)); in CreateJObject()
Djni_macro_assembler_x86.h133 void CreateJObject(ManagedRegister out_reg,
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc657 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); in CreateJObject() local
661 CHECK(out_reg.IsXRegister()) << out_reg; in CreateJObject()
667 LoadWFromOffset(kLoadWord, out_reg.AsOverlappingWRegister(), SP, in CreateJObject()
669 in_reg = out_reg; in CreateJObject()
672 if (!out_reg.Equals(in_reg)) { in CreateJObject()
673 LoadImmediate(out_reg.AsXRegister(), 0, eq); in CreateJObject()
675 AddConstant(out_reg.AsXRegister(), SP, spilled_reference_offset.Int32Value(), ne); in CreateJObject()
677 AddConstant(out_reg.AsXRegister(), SP, spilled_reference_offset.Int32Value(), al); in CreateJObject()
Djni_macro_assembler_arm64.h142 void CreateJObject(ManagedRegister out_reg,
/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc852 vixl::aarch32::Register out_reg = AsVIXLRegister(mout_reg.AsArm()); in CreateJObject() local
856 temps.Exclude(out_reg); in CreateJObject()
862 asm_.LoadFromOffset(kLoadWord, out_reg, sp, spilled_reference_offset.Int32Value()); in CreateJObject()
863 in_reg = out_reg; in CreateJObject()
870 if (!out_reg.Is(in_reg)) { in CreateJObject()
875 ___ mov(eq, out_reg, 0); in CreateJObject()
876 asm_.AddConstantInIt(out_reg, sp, spilled_reference_offset.Int32Value(), ne); in CreateJObject()
882 asm_.AddConstantInIt(out_reg, sp, spilled_reference_offset.Int32Value(), ne); in CreateJObject()
889 asm_.AddConstant(out_reg, sp, spilled_reference_offset.Int32Value()); in CreateJObject()
Djni_macro_assembler_arm_vixl.h160 void CreateJObject(ManagedRegister out_reg,
/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc4659 vixl32::Register out_reg = OutputRegister(rem); in VisitRem() local
4669 __ Mls(out_reg, temp, reg2, reg1); in VisitRem()
4674 DCHECK(out_reg.Is(r1)); in VisitRem()
4967 vixl32::Register out_reg = RegisterFrom(locations->Out()); in VisitAbs() local
4970 __ Add(out_reg, in_reg, mask); in VisitAbs()
4971 __ Eor(out_reg, out_reg, mask); in VisitAbs()
5236 vixl32::Register out_reg = OutputRegister(op); in HandleShift() local
5241 __ And(out_reg, second_reg, kMaxIntShiftDistance); in HandleShift()
5243 __ Lsl(out_reg, first_reg, out_reg); in HandleShift()
5245 __ Asr(out_reg, first_reg, out_reg); in HandleShift()
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Dinstruction_builder.h126 void BuildCheckedDivRem(uint16_t out_reg,
Dcode_generator_arm64.cc5981 Register out_reg = OutputRegister(abs); in VisitAbs() local
5983 __ Cneg(out_reg, in_reg, lt); in VisitAbs()
5989 VRegister out_reg = OutputFPRegister(abs); in VisitAbs() local
5990 __ Fabs(out_reg, in_reg); in VisitAbs()
6396 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadOneRegister() local
6404 out_reg, in GenerateReferenceLoadOneRegister()
6415 __ Mov(temp_reg, out_reg); in GenerateReferenceLoadOneRegister()
6417 __ Ldr(out_reg, HeapOperand(out_reg, offset)); in GenerateReferenceLoadOneRegister()
6423 __ Ldr(out_reg, HeapOperand(out_reg, offset)); in GenerateReferenceLoadOneRegister()
6424 GetAssembler()->MaybeUnpoisonHeapReference(out_reg); in GenerateReferenceLoadOneRegister()
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Dcode_generator_x86_64.cc7319 CpuRegister out_reg = out.AsRegister<CpuRegister>(); in GenerateReferenceLoadOneRegister() local
7326 instruction, out, out_reg, offset, /* needs_null_check= */ false); in GenerateReferenceLoadOneRegister()
7333 __ movl(maybe_temp.AsRegister<CpuRegister>(), out_reg); in GenerateReferenceLoadOneRegister()
7335 __ movl(out_reg, Address(out_reg, offset)); in GenerateReferenceLoadOneRegister()
7341 __ movl(out_reg, Address(out_reg, offset)); in GenerateReferenceLoadOneRegister()
7342 __ MaybeUnpoisonHeapReference(out_reg); in GenerateReferenceLoadOneRegister()
7352 CpuRegister out_reg = out.AsRegister<CpuRegister>(); in GenerateReferenceLoadTwoRegisters() local
7364 __ movl(out_reg, Address(obj_reg, offset)); in GenerateReferenceLoadTwoRegisters()
7370 __ movl(out_reg, Address(obj_reg, offset)); in GenerateReferenceLoadTwoRegisters()
7371 __ MaybeUnpoisonHeapReference(out_reg); in GenerateReferenceLoadTwoRegisters()
Dcode_generator_x86.cc8241 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadOneRegister() local
8248 instruction, out, out_reg, offset, /* needs_null_check= */ false); in GenerateReferenceLoadOneRegister()
8255 __ movl(maybe_temp.AsRegister<Register>(), out_reg); in GenerateReferenceLoadOneRegister()
8257 __ movl(out_reg, Address(out_reg, offset)); in GenerateReferenceLoadOneRegister()
8263 __ movl(out_reg, Address(out_reg, offset)); in GenerateReferenceLoadOneRegister()
8264 __ MaybeUnpoisonHeapReference(out_reg); in GenerateReferenceLoadOneRegister()
8274 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadTwoRegisters() local
8286 __ movl(out_reg, Address(obj_reg, offset)); in GenerateReferenceLoadTwoRegisters()
8292 __ movl(out_reg, Address(obj_reg, offset)); in GenerateReferenceLoadTwoRegisters()
8293 __ MaybeUnpoisonHeapReference(out_reg); in GenerateReferenceLoadTwoRegisters()
Dintrinsics_arm64.cc565 Register out_reg = is_double ? XRegisterFrom(l->Out()) : WRegisterFrom(l->Out()); in GenMathRound() local
569 __ Fcvtas(out_reg, in_reg); in GenMathRound()
572 __ Tbz(out_reg, out_reg.GetSizeInBits() - 1, &done); in GenMathRound()
580 __ Cinc(out_reg, out_reg, eq); in GenMathRound()
Dintrinsics_arm_vixl.cc427 vixl32::Register out_reg = OutputRegister(invoke); in VisitMathRoundFloat() local
435 __ Vmov(out_reg, temp1); in VisitMathRoundFloat()
438 __ Cmp(out_reg, 0); in VisitMathRoundFloat()
455 __ add(eq, out_reg, out_reg, 1); in VisitMathRoundFloat()
/art/compiler/utils/
Djni_macro_assembler.h215 virtual void CreateJObject(ManagedRegister out_reg,
/art/oatdump/
Doatdump.cc1437 for (size_t out_reg = 0; out_reg < num_outs; out_reg++) { in DumpVregLocations() local
1438 if (out_reg == 0) { in DumpVregLocations()
1442 uint32_t offset = GetOutVROffset(out_reg, GetInstructionSet()); in DumpVregLocations()
1443 os << " v" << out_reg << "[sp + #" << offset << "]"; in DumpVregLocations()