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/art/runtime/interpreter/mterp/armng/
Dinvoke.S17 FETCH r1, 2
19 and r1, r1, #0xf
21 GET_VREG r1, r1
22 cmp r1, #0
27 ldr r1, [sp]
59 FETCH r1, 2
60 and r1, r1, #0xf
61 GET_VREG r1, r1
62 cmp r1, #0
70 FETCH r1, 2
[all …]
Darithmetic.S22 GET_VREG r1, r3 @ r1<- vCC
25 cmp r1, #0 @ is second operand zero?
55 GET_VREG r1, r3 @ r1<- vB
58 cmp r1, #0 @ is second operand zero?
84 FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended)
89 cmp r1, #0 @ is second operand zero?
123 $extract @ optional; typically r1<- ssssssCC (sign extended)
125 @cmp r1, #0 @ is second operand zero?
160 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1
191 mov r1, rINST, lsr #12 @ r1<- B
[all …]
Dobject.S4 FETCH_FROM_THREAD_CACHE r1, 3f
19 ldr r1, [sp]
22 mov r1, r0
32 FETCH_FROM_THREAD_CACHE r1, 3f
42 ubfx r1, rINST, #8, #4 // r1<- A
43 SET_VREG r0, r1
49 ldr r1, [sp]
52 mov r1, r0
82 ldrd r0, r1, [r3]
85 SET_VREG_WIDE_BY_ADDR r0, r1, r2 // fp[A] <- value
[all …]
Dother.S8 FETCH r1, 2 @ r1<- BBBB (high)
10 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb
26 sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended)
30 SET_VREG r1, r0 @ fp[A]<- r1
49 mov r1, rINST, lsr #8 @ r1<- AA
56 SET_VREG_OBJECT r0, r1 // vAA <- value
61 ldr r1, [sp]
89 FETCH r1, 2 @ r1<- BBBB (low middle)
91 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb (low word)
94 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
[all …]
Dcontrol_flow.S9 mov r1, rINST, lsr #12 @ r1<- B
11 GET_VREG r3, r1 @ r3<- vB
77 FETCH r1, 2 // r1<- AAAA (hi)
78 orrs rINST, r0, r1, lsl #16 // wINST<- AAAAaaaa
129 FETCH r1, 2 @ r1<- BBBB (hi)
131 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb
132 GET_VREG r1, r3 @ r1<- vAA
152 GET_VREG_WIDE_BY_ADDR r0, r1, r2 // r0,r1 <- vAA
155 vmov d0, r0, r1
185 mov r1, rSELF
Darray.S12 GET_VREG r1, r3 @ r1<- vCC (requested index)
16 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width
17 cmp r1, r3 @ compare unsigned index, length
74 GET_VREG r1, r3 @ r1<- vCC (requested index)
78 cmp r1, r3 @ compare unsigned index, length
87 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width
94 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width
124 mov r1, rINST, lsr #12 @ r1<- B
126 GET_VREG r0, r1 @ r0<- vB (object ref)
139 FETCH r1, 2 @ r1<- BBBB (hi)
[all …]
Dmain.S468 mov r1, #0
617 str r1, [rNEW_FP, rINST]
618 str r1, [r4, rINST]
673 str r1, [rNEW_FP, r0]
674 str r1, [r4, r0]
690 mov r1, rPC
694 mov r1, rPC
698 FETCH r1, 1
927 vmov r0, r1, d0
937 FETCH r1, 1
[all …]
/art/runtime/interpreter/mterp/arm/
Darithmetic.S22 GET_VREG r1, r3 @ r1<- vCC
25 cmp r1, #0 @ is second operand zero?
55 GET_VREG r1, r3 @ r1<- vB
58 cmp r1, #0 @ is second operand zero?
84 FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended)
89 cmp r1, #0 @ is second operand zero?
123 $extract @ optional; typically r1<- ssssssCC (sign extended)
125 @cmp r1, #0 @ is second operand zero?
160 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1
191 mov r1, rINST, lsr #12 @ r1<- B
[all …]
Dother.S9 mov r1, rINST, lsr #8 @ r1<- AA
30 FETCH r1, 2 @ r1<- BBBB (high)
32 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb
48 sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended)
52 SET_VREG r1, r0 @ fp[A]<- r1
82 mov r1, rINST, lsr #8 @ r1<- AA
83 orr r0, r0, r2, lsl #16 @ r1<- BBBBbbbb
97 FETCH r1, 2 @ r1<- BBBB (low middle)
99 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb (low word)
102 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
[all …]
Darray.S18 GET_VREG r1, r3 @ r1<- vCC (requested index)
22 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width
23 cmp r1, r3 @ compare unsigned index, length
52 GET_VREG r1, r3 @ r1<- vCC (requested index)
54 ldr r1, [rSELF, #THREAD_EXCEPTION_OFFSET]
56 cmp r1, #0
78 GET_VREG r1, r3 @ r1<- vCC (requested index)
82 add r0, r0, r1, lsl #3 @ r0<- arrayObj + index*width
83 cmp r1, r3 @ compare unsigned index, length
110 GET_VREG r1, r3 @ r1<- vCC (requested index)
[all …]
Dcontrol_flow.S9 mov r1, rINST, lsr #12 @ r1<- B
11 GET_VREG r3, r1 @ r3<- vB
77 FETCH r3, 2 @ r1<- AAAA (hi)
129 FETCH r1, 2 @ r1<- BBBB (hi)
131 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb
132 GET_VREG r1, r3 @ r1<- vAA
153 mov r1, #0
167 mov r1, #0
183 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1 <- vAA/vAA+1
196 GET_VREG r1, r2 @ r1<- vAA (exception object)
[all …]
Dobject.S7 mov r1, rINST @ arg1: uint16_t inst_data
25 mov r1, rINST, lsr #8 @ r1<- AA
26 VREG_INDEX_TO_ADDR r1, r1 @ r1<- &object
40 ubfx r1, rPC, #2, #THREAD_INTERPRETER_CACHE_SIZE_LOG2 @ entry index
41 add r0, r0, r1, lsl #3 @ entry address within the cache
42 ldrd r0, r1, [r0] @ entry key (pc) and value (offset)
Dfloating_point.S337 ubfx r2, r1, #20, #11 @ grab the exponent
347 adds r1, r1, r1 @ sign bit to carry
349 mov r1, #0x7fffffff @ assume maxlong for msw
351 adc r1, r1, #0 @ convert maxlong to minlong if exp negative
354 orrs r3, r0, r1, lsl #12
389 mov r1, #0x7fffffff @ assume maxlong for msw
391 adc r1, r1, #0 @ convert maxlong to minlong if exp negative
Dmain.S402 str r1, [r2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET]
410 add rPC, r1, r0, lsl #1 @ Create direct pointer to 1st dex opcode
419 add r1, rFP, #OFF_FP_SHADOWFRAME
436 add r1, rFP, #OFF_FP_SHADOWFRAME
472 add r1, rFP, #OFF_FP_SHADOWFRAME
481 add r1, rFP, #OFF_FP_SHADOWFRAME
490 add r1, rFP, #OFF_FP_SHADOWFRAME
499 add r1, rFP, #OFF_FP_SHADOWFRAME
508 add r1, rFP, #OFF_FP_SHADOWFRAME
517 add r1, rFP, #OFF_FP_SHADOWFRAME
[all …]
Dinvoke.S10 add r1, rFP, #OFF_FP_SHADOWFRAME
33 add r1, rFP, #OFF_FP_SHADOWFRAME
/art/runtime/arch/arm/
Dmemcmp16_arm.S33 pld [r1, #0]
36 cmp r0, r1
56 pld [r1, #32]
59 ldrh ip, [r1], #2
78 ldrh ip, [r1], #2
91 eor r0, r3, r1
101 ldr ip, [r1]
107 pld [r1, #64]
109 ldr lr, [r1, #4]!
112 ldreq ip, [r1, #4]!
[all …]
Djni_entrypoints_arm.S25 push {r0, r1, r2, r3, lr} @ spill regs
50 pop {r0, r1, r2, r3, lr} @ restore regs
98 pop {r0, r1, r2, r3}
106 stmia ip, {r1-r3, r5-r8, r10-r11, lr} // LR: Save return address for tail call from JNI stub.
120 pop {r1, lr}
128 ldr ip, [r1, #ART_METHOD_ACCESS_FLAGS_OFFSET] // Load access flags.
138 RUNTIME_CURRENT1 r1
139 ldr r1, [r1, #RUNTIME_SAVE_REFS_AND_ARGS_METHOD_OFFSET]
145 str r1, [r4]
164 add r1, r4, #FRAME_SIZE_SAVE_REFS_AND_ARGS - 40
[all …]
Dquick_entrypoints_arm.S73 .cfi_rel_offset r1, 4
96 .cfi_restore r1
455 strd r0, [r10] @ Store r0/r1 into result pointer
466 mov r1, r0
468 bl memcpy @ memcpy (dest r0, src r1, bytes r2)
478 vldm r1, {s0-s31} @ Load all fprs from argument fprs_.
502 ldr r1, [rSELF, #THREAD_ID_OFFSET]
506 eor r3, r2, r1 @ Prepare the value to store if unlocked
517 .Lnot_unlocked: @ r2: original lock word, r1: thread_id, r3: r2 ^ r1
608 SETUP_SAVE_REFS_ONLY_FRAME r1
[all …]
Dinstruction_set_features_assembly_tests.S30 mov r1,#1
54 vmov r1, s0
62 vmov s0, r1
Dasm_support_arm.S217 CONDITIONAL_CBZ \reg, r1, \dest
242 push {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves and args.
244 .cfi_rel_offset r1, 0
272 pop {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves and args.
273 .cfi_restore r1
352 RETURN_OR_DELIVER_PENDING_EXCEPTION_REG r1
/art/runtime/interpreter/mterp/arm64/
Dfloating_point.S21 %def fbinopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2"):
31 GET_VREG_DOUBLE $r1, w1 // w1<- vBB
57 %def fbinopWide2addr(instr="fadd d0, d0, d1", r0="d0", r1="d1"):
64 GET_VREG_DOUBLE $r1, w1 // x1<- vB
72 %def fcmp(wide="", r1="s1", r2="s2", cond="lt"):
82 % if r1.startswith("d"):
83 GET_VREG_DOUBLE $r1, w2
86 GET_VREG $r1, w2
89 fcmp $r1, $r2
179 % fbinopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2")
[all …]
/art/libartbase/base/
Ddata_hash.h51 static constexpr uint32_t r1 = 15; in operator() local
65 k = (k << r1) | (k >> (32 - r1)); in operator()
86 k1 = (k1 << r1) | (k1 >> (32 - r1)); in operator()
/art/test/1922-owned-monitors-info/src/art/
DTest1922.java194 for (Function<Runnable, Runnable> r1 = li1.next(); li1.hasNext(); r1 = li1.next()) { in runTestsOtherThread()
203 r1.apply(null).getClass(), in runTestsOtherThread()
209 final Thread thr = new Thread(r1.apply(r2.apply(r3.apply(pause)))); in runTestsOtherThread()
238 for (Function<Runnable, Runnable> r1 = li1.next(); li1.hasNext(); r1 = li1.next()) { in runTestsCurrentThread()
247 r1.apply(null).getClass(), in runTestsCurrentThread()
251 r1.apply(r2.apply(r3.apply(printer))).run(); in runTestsCurrentThread()
/art/test/1978-regular-obsolete-then-structural-obsolescence/src/art/
DTest1978.java40 public static void sayHi(Runnable r1, Runnable r2) { in sayHi() argument
42 r1.run(); in sayHi()
/art/test/800-smali/smali/
Db_134061982.smali22 # Start with r1 == null
32 # Make r1 not-reference.

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