Searched refs:reg_w (Results 1 – 3 of 3) sorted by relevance
/art/compiler/utils/arm64/ |
D | jni_macro_assembler_arm64.cc | 36 #define reg_w(W) Arm64Assembler::reg_w(W) macro 108 ___ Strb(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset() 111 ___ Strh(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset() 114 ___ Str(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset() 217 ___ Ldrsb(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset() 220 ___ Ldrsh(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset() 223 ___ Ldrb(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset() 226 ___ Ldrh(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset() 229 ___ Ldr(reg_w(dest), MEM_OP(reg_x(base), offset)); in LoadWFromOffset() 259 ___ Ldr(reg_w(dest.AsWRegister()), MEM_OP(reg_x(base), offset)); in Load() [all …]
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D | managed_register_arm64_test.cc | 636 EXPECT_TRUE(vixl::aarch64::w0.Is(Arm64Assembler::reg_w(W0))); in TEST() 637 EXPECT_TRUE(vixl::aarch64::w1.Is(Arm64Assembler::reg_w(W1))); in TEST() 638 EXPECT_TRUE(vixl::aarch64::w2.Is(Arm64Assembler::reg_w(W2))); in TEST() 639 EXPECT_TRUE(vixl::aarch64::w3.Is(Arm64Assembler::reg_w(W3))); in TEST() 640 EXPECT_TRUE(vixl::aarch64::w4.Is(Arm64Assembler::reg_w(W4))); in TEST() 641 EXPECT_TRUE(vixl::aarch64::w5.Is(Arm64Assembler::reg_w(W5))); in TEST() 642 EXPECT_TRUE(vixl::aarch64::w6.Is(Arm64Assembler::reg_w(W6))); in TEST() 643 EXPECT_TRUE(vixl::aarch64::w7.Is(Arm64Assembler::reg_w(W7))); in TEST() 644 EXPECT_TRUE(vixl::aarch64::w8.Is(Arm64Assembler::reg_w(W8))); in TEST() 645 EXPECT_TRUE(vixl::aarch64::w9.Is(Arm64Assembler::reg_w(W9))); in TEST() [all …]
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D | assembler_arm64.h | 173 static vixl::aarch64::Register reg_w(int code) { in reg_w() function
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