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Searched refs:reg_x (Results 1 – 4 of 4) sorted by relevance

/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc35 #define reg_x(X) Arm64Assembler::reg_x(X) macro
55 ___ Mov(reg_x(dest.AsArm64().AsXRegister()), reg_x(TR)); in GetCurrentThread()
90 ___ Add(reg_x(rd), reg_x(rn), value); in AddConstant()
95 temps.Exclude(reg_x(rd), reg_x(rn)); in AddConstant()
97 ___ Add(temp, reg_x(rn), value); in AddConstant()
98 ___ Csel(reg_x(rd), temp, reg_x(rd), cond); in AddConstant()
108 ___ Strb(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset()
111 ___ Strh(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset()
114 ___ Str(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset()
123 ___ Str(reg_x(source), MEM_OP(reg_x(base), offset)); in StoreToOffset()
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Dassembler_arm64.cc95 temps.Exclude(reg_x(dst.AsXRegister()), reg_x(base.AsXRegister())); in LoadRawPtr()
96 ___ Ldr(reg_x(dst.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value())); in LoadRawPtr()
106 temps.Exclude(reg_x(base.AsXRegister()), reg_x(scratch.AsXRegister())); in JumpTo()
107 ___ Ldr(reg_x(scratch.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value())); in JumpTo()
108 ___ Br(reg_x(scratch.AsXRegister())); in JumpTo()
194 vixl::aarch64::Register mr = reg_x(MR); // Marking Register. in GenerateMarkingRegisterCheck()
195 vixl::aarch64::Register tr = reg_x(TR); // Thread Register. in GenerateMarkingRegisterCheck()
Dmanaged_register_arm64_test.cc595 EXPECT_TRUE(vixl::aarch64::x0.Is(Arm64Assembler::reg_x(X0))); in TEST()
596 EXPECT_TRUE(vixl::aarch64::x1.Is(Arm64Assembler::reg_x(X1))); in TEST()
597 EXPECT_TRUE(vixl::aarch64::x2.Is(Arm64Assembler::reg_x(X2))); in TEST()
598 EXPECT_TRUE(vixl::aarch64::x3.Is(Arm64Assembler::reg_x(X3))); in TEST()
599 EXPECT_TRUE(vixl::aarch64::x4.Is(Arm64Assembler::reg_x(X4))); in TEST()
600 EXPECT_TRUE(vixl::aarch64::x5.Is(Arm64Assembler::reg_x(X5))); in TEST()
601 EXPECT_TRUE(vixl::aarch64::x6.Is(Arm64Assembler::reg_x(X6))); in TEST()
602 EXPECT_TRUE(vixl::aarch64::x7.Is(Arm64Assembler::reg_x(X7))); in TEST()
603 EXPECT_TRUE(vixl::aarch64::x8.Is(Arm64Assembler::reg_x(X8))); in TEST()
604 EXPECT_TRUE(vixl::aarch64::x9.Is(Arm64Assembler::reg_x(X9))); in TEST()
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Dassembler_arm64.h163 static vixl::aarch64::Register reg_x(int code) { in reg_x() function